0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
BTS5200-4EKA

BTS5200-4EKA

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    DSOIC14-48_EP

  • 描述:

    BTS5200-4EKA

  • 数据手册
  • 价格&库存
BTS5200-4EKA 数据手册
PR OFET™ + 12V BTS5200-4EKA Smart High-Side Power Switch Quad Channel, 200mΩ Data Sheet PROFET™+ 12V Rev. 1.0, 2014-02-06 Automotive Power BTS5200-4EKA Table of Contents Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 3.1 3.2 3.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4.1 4.2 4.3 4.3.1 4.3.2 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 PCB set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Thermal Impedence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 5.1 5.2 5.3 5.3.1 5.3.2 5.4 5.5 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output ON-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Turn ON/OFF Characteristics with Resistive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverse Current Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 14 14 15 15 15 16 18 6 6.1 6.2 6.3 6.4 6.5 6.5.1 6.5.2 6.5.3 6.6 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Loss of Ground Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Limitation in the Power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Appearance with Channels in Parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics for the Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 20 20 21 22 22 22 23 24 25 7 7.1 7.2 7.3 7.3.1 7.3.2 7.3.3 7.3.3.1 7.3.3.2 7.3.3.3 7.3.4 7.3.5 7.3.6 7.4 Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Different Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in the Nominal Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal Variation as a Function of Temperature and Load Current . . . . . . . . . . . . . . . . . . . SENSE Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load in ON Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load in OFF Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load Diagnostic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Short Circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Case of Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Case of Inverse Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Diagnostic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 26 27 27 28 29 30 30 30 31 32 32 32 33 8 8.1 Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Data Sheet PROFET™+ 12V 2 7 7 7 8 Rev. 1.0, 2014-02-06 BTS5200-4EKA Table of Contents 8.2 8.3 8.4 DEN / DSEL0,1 Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Input Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 9 9.1 9.2 9.3 9.4 9.5 Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnostic Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Data Sheet PROFET™+ 12V 3 38 38 39 41 42 43 Rev. 1.0, 2014-02-06 Smart High-Side Power Switch 1 BTS5200-4EKA Overview Application • • • Suitable for resistive, inductive and capacitive loads Replaces electromechanical relays, fuses and discrete circuits Most suitable for loads with high inrush current, such as lamps Basic Features • • • • • • • • • Quad channel device Very low stand-by current 3.3 V and 5 V compatible logic inputs Electrostatic discharge protection (ESD) Optimized electromagnetic compatibility Logic ground independent from load ground Very low power DMOS leakage current in OFF state Green product (RoHS compliant) AEC qualified PG-DSO-14-48-EP Description The BTS5200-4EKA is a 200 mΩ quad channel Smart High-Side Power Switch, embedded in a PG-DSO-14-48EP, Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 technology. It is specially designed to drive lamps up to R5W, as well as LEDs in the harsh automotive environment. Table 1 Product Summary Parameter Symbol Value Operating voltage range VS(OP) VS(LD) RDS(ON) IL(NOM)1 IL(NOM)2 kILIS IL5(SC) IS(OFF) 5 V ... 28 V Maximum supply voltage Maximum ON state resistance at TJ = 150 °C per channel Nominal load current (one channel active) Nominal load current (all channels active) Typical current sense ratio Minimum current limitation Maximum standby current with load at TJ = 25 °C 41 V 400 mΩ 1A 0.8 A 300 5.6 A 500 nA Type Package Marking BTS5200-4EKA PG-DSO-14-48-EP BTS5200-4EKA Data Sheet PROFET™+ 12V 4 Rev. 1.0, 2014-02-06 BTS5200-4EKA Overview Diagnostic Functions • • • • • • Proportional load current sense multiplexed for the 4 channels Open load detection in ON and OFF Short circuit to battery and ground indication Overtemperature switch off detection Stable diagnostic signal during short circuit Enhanced kILIS dependency with temperature and load current Protection Functions • • • • • • • Stable behavior during undervoltage Reverse polarity protection with external components Secure load turn-off during logic ground disconnection with external components Overtemperature protection with restart Overvoltage protection with external components Enhanced short circuit operation Voltage dependent current limitation Data Sheet PROFET™+ 12V 5 Rev. 1.0, 2014-02-06 BTS5200-4EKA Block Diagram 2 Block Diagram Channel 0 VS voltage sensor internal power supply IN0 DEN over temperature driver logic gate control & charge pump ESD protection T clamp for inductive load over current switch limit load current sense and open load detection IS OUT 0 forward voltage drop detection VS Channel 1 T IN1 Control and protection circuit equivalent to channel 0 DSEL0 DSEL1 OUT 1 Channel 2 T Control and protection circuit equivalent to channel 0 IN2 OUT 2 Channel 3 T Control and protection circuit equivalent to channel 0 IN3 OUT 3 GND Figure 1 Block diagram DxS.vsd Block Diagram for the BTS5200-4EKA Data Sheet PROFET™+ 12V 6 Rev. 1.0, 2014-02-06 BTS5200-4EKA Pin Configuration 3 Pin Configuration 3.1 Pin Assignment OUT0 1 14 OUT2 OUT1 2 13 OUT3 NC 3 12 IS DSEL1 4 11 GND DSEL0 5 10 DEN IN1 6 9 IN3 IN0 7 8 IN2 Pinout quad SO 14.vsd Figure 2 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 OUT0 OUTput 0; Protected high side power output channel 01) 2 OUT1 OUTput 1; Protected high side power output channel 1 1) 3 NC Not Connected; No internal connection to the chip 4 DSEL1 Diagnostic SELection; Digital signal to select the channel to be diagnosed 5 DSEL0 Diagnostic SELection; Digital signal to select the channel to be diagnosed 6 IN1 INput channel 1; Input signal for channel 1 activation 7 IN0 INput channel 0; Input signal for channel 0 activation 8 IN2 INput channel 2; Input signal for channel 2 activation 9 IN3 INput channel 3; Input signal for channel 3 activation 10 DEN Diagnostic ENable; Digital signal to enable/disable the diagnosis of the device 11 GND GrouND; Ground connection 12 IS Sense; Sense current of the selected channel 13 OUT3 OUTput 3; Protected high side power output channel 3 1) 14 OUT2 OUTput 2; Protected high side power output channel 2 1) Cooling Tab VS Voltage Supply; Battery voltage 1) All PCB traces that are connected to the ouput pin have to be designed to withstand the maximum current which can flow. Data Sheet PROFET™+ 12V 7 Rev. 1.0, 2014-02-06 BTS5200-4EKA Pin Configuration 3.3 Voltage and Current Definition Figure 3 shows all terms used in this data sheet, with associated convention for positive values. VDS0 IS VS VDS1 VDS2 VDS3 VOUT2 VOUT3 VS IIN0 VIN0 IN0 IOUT0 OUT0 IIN1 IN1 VIN1 IIN2 IOUT1 IN2 VIN2 IIN3 VIN3 OUT1 IN3 IDEN V DEN DEN DSEL0 IDSEL1 VDSEL 0 IOUT2 OUT2 IDSEL0 IIS VDSEL 1 VIS DSEL1 IOUT3 OUT3 IS GND IGND VOUT0 VOUT 1 voltage and current convention.vsd Figure 3 Voltage and Current Definition Data Sheet PROFET™+ 12V 8 Rev. 1.0, 2014-02-06 BTS5200-4EKA General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 2 Absolute Maximum Ratings 1) TJ = -40°C to 150°C; (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. VS -VS(REV) -0.3 – 28 V – P_4.1.1 0 – 16 V P_4.1.2 VBAT(SC) 0 – 24 V t < 2 min TA = 25 °C RL≥ 25 Ω RGND = 150 Ω 2) RECU = 20 mΩ RCable= 16 mΩ/m LCable= 1 μH/m, l = 0 or 5 m Supply Voltages Supply voltage Reverse polarity voltage Supply voltage for short circuit protection P_4.1.3 See Chapter 6 and Figure 28 Supply voltage for Load dump VS(LD) protection 3) RI = 2 Ω RL = 25 Ω – – 41 V nRSC1 – – 100 4) k cycles tON = 300ms P_4.1.4 VIN -0.3 – – 6 7 V P_4.1.13 IIN VDEN -2 – 2 mA – P_4.1.14 -0.3 – – 6 7 V – t < 2 min P_4.1.15 IDEN VDSEL -2 – 2 mA – P_4.1.16 -0.3 – – 6 7 V – P_4.1.17 IDSEL -2 – 2 mA – P_4.1.18 VIS IIS -0.3 – VS V – P_4.1.19 -25 – 50 mA – P_4.1.20 Load current | IL | – – IL(LIM) A – P_4.1.21 Power dissipation (DC) PTOT – – 1.4 W TA = 85 °C TJ < 150 °C P_4.1.22 P_4.1.12 Short Circuit Capability Permanent short circuit IN pin toggles Input Pins Voltage at INPUT pins Current through INPUT pins Voltage at DEN pin Current through DEN pin Voltage at DSEL pin Current through DSEL pin – t < 2 min t < 2 min Sense Pin Voltage at IS pin Current through IS pin Power Stage Data Sheet PROFET™+ 12V 9 Rev. 1.0, 2014-02-06 BTS5200-4EKA General Product Characteristics Table 2 Absolute Maximum Ratings (cont’d)1) TJ = -40°C to 150°C; (unless otherwise specified) Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. Maximum energy dissipation EAS Single pulse (one channel) – – 50 mJ IL(0) = 0.5 A TJ(0) = 150 °C VS = 13.5 V P_4.1.23 Maximum Energy dissipation EAR repetitive pulse – – 20 mJ 1Mio cycles TA < 105 °C VS = 13.5 V IL(0) = 350 mA P_4.1.25 VDS – – 41 V – P_4.1.26 I GND -10 -150 – 10 20 mA – P_4.1.27 TJ TSTG -40 – 150 °C – P_4.1.28 -55 – 150 °C – P_4.1.30 VESD VESD -2 – 2 kV 5) HBM P_4.1.31 -4 – 4 kV 5) HBM P_4.1.32 VESD VESD -500 – 500 V 6) CDM P_4.1.33 V 6) CDM P_4.1.34 Voltage at power transistor Currents Current through ground pin t < 2 min Temperatures Junction temperature Storage temperature ESD Susceptibility ESD susceptibility (all pins) ESD susceptibility OUT Pin vs. GND and VS connected ESD susceptibility ESD susceptibility pin (corner pins) -750 – 750 1) Not subject to production test. Specified by design. 2) Hardware set-up in accordance to AEC Q100-012 and AEC Q101-006. 3) VS(LD) is setup without the DUT connected to the generator per ISO 7637-1. 4) EOL tests according to AECQ100-012. Threshold limit for short circuit failures: 100 ppm. Please refer to the legal disclaimer for short-circuit capability at the end of this document. 5) ESD susceptibility HBM according to ANSI/ESDA/JEDEC JS-001 6) “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet PROFET™+ 12V 10 Rev. 1.0, 2014-02-06 BTS5200-4EKA General Product Characteristics 4.2 Functional Range Table 3 Functional Range TJ = -40°C to 150°C; (unless otherwise specified) Parameter Symbol Min. Typ. Max. Nominal operating voltage VNOM VS(OP) 8 13.5 18 Minimum functional supply voltage VS(OP)_MIN 3.5 4.3 5 V Undervoltage shutdown VS(UV) 2.6 3.5 4.1 V Extended operating voltage Values 5 – 28 Unit Note / Test Condition Number V – P_4.2.1 V 2) VIN = 4.5 V RL = 25 Ω VDS < 0.5 V 1) VIN = 4.5 V RL = 25 Ω From IOUT = 0 A to VDS < 0.5 V; 1) VIN = 4.5 V VDEN = 0 V RL = 25 Ω From VDS < 1 V; P_4.2.2 P_4.2.3 P_4.2.4 to IOUT = 0 A See Chapter 9.1 Undervoltage shutdown hysteresis VS(UV)_HYS – 850 – mV 2) Operating current All channels active IGND_4 – 4 11 mA P_4.2.6 VIN = 5.5 V VDEN = 5.5 V Device in RDS(ON) VS = 18 V Standby current for whole device with load (ambiente) IS(OFF) – 0.1 0.5 µA – P_4.2.13 See Chapter 9.1 Maximum standby current for IS(OFF)_150 whole device with load Standby current for whole device with load, diagnostic active IS(OFF_DEN) – – 10 µA – 1.2 – mA 1) VS = 18 V P_4.2.7 VOUT = 0 V VIN floating VDEN floating TJ ≤ 85 °C VS = 18 V VOUT = 0 V VIN floating VDEN floating TJ = 150 °C 2) VS = 18 V VOUT = 0 V VIN floating VDEN = 5.5 V P_4.2.10 P_4.2.8 1) Test at TJ = -40°C only 2) Not subject to production test. Specified by design. Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Data Sheet PROFET™+ 12V 11 Rev. 1.0, 2014-02-06 BTS5200-4EKA General Product Characteristics 4.3 Thermal Resistance Table 4 Thermal Resistance Parameter Symbol Junction to soldering point RthJS RthJA Junction to ambient All channels active Values Min. Typ. Max. – 5 – – 40 – Unit Note / Test Condition Number K/W 1) P_4.3.1 K/W 1)2) P_4.3.2 1) Not subject to production test. Specified by design. 2) Specified Rthja value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (chip + package) was simulated on a 76.4 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad contacts the first inner copper layer. Please refer to Figure 4. 4.3.1 PCB set up 70µm 1.5mm 35µm 0.3mm Figure 4 PCB 2s2p.vsd 2s2p PCB Cross Section Data Sheet PROFET™+ 12V 12 Rev. 1.0, 2014-02-06 BTS5200-4EKA General Product Characteristics 4.3.2 Thermal Impedence Zth‐JA [K/W] 100 10 1s0p‐footprint 1s0p‐300mm² 1s0p‐600mm² 2s2p 1 1.00E‐04 1.00E‐03 1.00E‐02 1.00E‐01 1.00E+00 1.00E+01 1.00E+02 1.00E+03 Time [s] Figure 5 Typical Thermal Impedance. 2s2p PCB set up according Figure 4 110 100 Rthja [K/W] 90 80 70 1s0p 60 50 40 0 footprint Figure 6 100 200 300 400 500 600 700 Area [mm2] Typical Thermal Resistance. PCB set-up 1s0p Data Sheet PROFET™+ 12V 13 Rev. 1.0, 2014-02-06 BTS5200-4EKA Power Stage 5 Power Stage The power stages are built using an N-channel vertical power MOSFET (DMOS) with charge pump. 5.1 Output ON-state Resistance The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature TJ. Figure 7 shows the dependencies in terms of temperature and supply voltage for the typical ON-state resistance. The behavior in reverse polarity is described in Chapter 6.4. 400 350 350 RDS(ON) [mΩ ] RDS(ON) [mΩ ] 300 250 300 250 200 200 150 150 100 -50 Figure 7 0 50 100 Junction Temperature TJ [°C] 150 0 5 10 15 20 25 Supply Voltage VS [V] 30 35 Typical ON-state Resistance A high signal at the input pin (see Chapter 8) causes the power DMOS to switch ON with a dedicated slope, which is optimized in terms of EMC emission. 5.2 Turn ON/OFF Characteristics with Resistive Load Figure 8 shows the typical timing when switching a resistive load. IN VIN_H VIN_L t VOUT dV/dt ON dV/dt t ON 90% VS tOFF_delay 70% VS 30% VS 10% VS OFF tON_delay tOFF t Switching times.vsd Figure 8 Switching a Resistive Load Timing Data Sheet PROFET™+ 12V 14 Rev. 1.0, 2014-02-06 BTS5200-4EKA Power Stage 5.3 Inductive Load 5.3.1 Output Clamping When switching OFF inductive loads with high side switches, the voltage VOUT drops below ground potential, because the inductance intends to continue driving the current. To prevent the destruction of the device by avalanche due to high voltages, there is a voltage clamp mechanism ZDS(AZ) implemented that limits negative output voltage to a certain level (VS - VDS(AZ)). Please refer to Figure 9 and Figure 10 for details. Nevertheless, the maximum allowed load inductance is limited. VS ZDS(AZ) VDS INx LOGIC IL VBAT GND VIN OUTx L, RL VOUT ZGND Output clamp.vsd Figure 9 Output Clamp IN t V OUT VS t V S-VDS(AZ) IL t Switching an inductance.vsd Figure 10 Switching an Inductive Load Timing 5.3.2 Maximum Load Inductance During demagnetization of inductive loads, energy has to be dissipated in the BTS5200-4EKA. This energy can be calculated with following equation: V S – V DS ( AZ ) RL × IL ⎞ L E = V DS ( AZ ) × ------ × -------------------------------× ln ⎛ 1 – -------------------------------+ IL ⎝ RL RL V S – V DS ( AZ )⎠ Data Sheet PROFET™+ 12V 15 (1) Rev. 1.0, 2014-02-06 BTS5200-4EKA Power Stage Following equation simplifies under the assumption of RL = 0 Ω. VS 2 1 ⎞ E = --- × L × I × ⎛⎝ 1 – -------------------------------2 V S – V DS ( AZ )⎠ (2) The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 11 for the maximum allowed energy dissipation as a function of the load current. EAS (mJ) 100 10 1 0 0.5 1 1.5 2 IL(A) 2.5 3 3.5 Figure 11 Maximum Energy Dissipation Single Pulse, TJ_START = 150 °C; VS = 13.5V 5.4 Inverse Current Capability 4 In case of inverse current, meaning a voltage VINV at the OUTput higher than the supply voltage VS, a current IINV will flow from output to VS pin via the body diode of the power transistor (please refer to Figure 12). The output stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that particular case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current IINV should not be higher than IL(INV). If the channel is OFF, the diagnostic will detect an open load at OFF. If the affected channel is ON, the diagnostic will detect open load at ON (the overtemperature signal is inhibited). At the appearance of VINV, a parasitic diagnostic can be observed. After, the diagnosis is valid and reflects the output state. At VINV vanishing, the diagnosis is valid and reflects the output state. During inverse current, no protection functions are available. Data Sheet PROFET™+ 12V 16 Rev. 1.0, 2014-02-06 BTS5200-4EKA Power Stage VBAT VS Gate driver IL(INV) OL comp. Device logic INV Comp. VINV OUT GND IS ZGND inverse current.vsd Figure 12 Inverse Current Circuitry Data Sheet PROFET™+ 12V 17 Rev. 1.0, 2014-02-06 BTS5200-4EKA Power Stage 5.5 Electrical Characteristics Power Stage Table 5 Electrical Characteristics: Power Stage VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter ON-state resistance per channel Symbol RDS(ON)_150 Values Min. Typ. Max. 300 360 400 Unit Note / Test Condition Number mΩ IL = IL4 = 0.5 A VIN = 4.5 V TJ = 150 °C P_5.5.1 TJ = 25 °C P_5.5.21 TA=85 °C P_5.5.2 See Figure 7 ON-state resistance per channel RDS(ON)_25 – 200 – mΩ 1) Nominal load current One channel active IL(NOM)1 – 1 – A 1) Nominal load current All channels active IL(NOM)2 – 0.8 – A Output voltage drop limitation VDS(NL) at small load currents – 10 25 mV IL = IL0 = 25 mA See Chapter 9.3 P_5.5.4 TJ < 150 °C P_5.5.3 Drain to source clamping voltage VDS(AZ) = [VS - VOUT] VDS(AZ) 41 47 53 V IDS = 20 mA See Figure 10 See Chapter 9.1 P_5.5.5 Output leakage current TJ ≤ 85 °C per channel IL(OFF) – 0.1 0.5 μA 2) P_5.5.6 Output leakage current TJ = 150 °C per channel IL(OFF)_150 – – 2.5 μA Inverse current capability IL(NV) dV/dtON – 0.8 – A 0.1 0.25 0.5 V/μs VIN floating VOUT = 0 V TJ ≤ 85 °C VIN floating VOUT = 0 V TJ = 150 °C 1) VS< VOUTX RL = 25 Ω VS = 13.5 V Slew rate 70% to 30% VS -dV/dtOFF 0.1 0.25 0.5 V/μs See Figure 8 See Chapter 9.1 P_5.5.12 Slew rate matching dV/dtON - dV/dtOFF ∆dV/dt -0.15 0 0.15 V/μs P_5.5.13 Turn-ON time to VOUT = 90% tON 30 90 230 μs P_5.5.14 Turn-OFF time to VOUT = 10% tOFF 30 90 230 μs P_5.5.15 -50 5 50 μs P_5.5.16 Turn-ON time to VOUT = 10% tON_delay 10 35 100 μs P_5.5.17 Turn-OFF time to VOUT = 90% tOFF_delay 10 35 100 μs P_5.5.18 Slew rate 30% to 70% VS P_5.5.8 P_5.5.9 P_5.5.11 VS VS Turn-ON / OFF matching tOFF - tON ∆tSW VS VS Data Sheet PROFET™+ 12V 18 Rev. 1.0, 2014-02-06 BTS5200-4EKA Power Stage Table 5 Electrical Characteristics: Power Stage (cont’d) VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter Switch ON energy Symbol EON Values Min. Typ. Max. – 210 – Unit Note / Test Condition Number µJ 1) P_5.5.19 RL = 25 Ω VOUT = 90% VS VS = 18 V See Chapter 9.1 Switch OFF energy EOFF – 140 – µJ 1) RL = 25 Ω VOUT = 10% VS VS = 18 V P_5.5.20 See Chapter 9.1 1) Not subject to production test, specified by design. 2) Test at TJ = -40°C only Data Sheet PROFET™+ 12V 19 Rev. 1.0, 2014-02-06 BTS5200-4EKA Protection Functions 6 Protection Functions The device provides integrated protection functions. These functions are designed to prevent the destruction of the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are designed for neither continuous nor repetitive operation. 6.1 Loss of Ground Protection In case of loss of the module ground and the load remains connected to ground, the device protects itself by automatically turning OFF (when it was previously ON) or remains OFF, regardless of the voltage applied on IN pins. In case of loss of device ground, it’s recommended to use input resistors between the microcontroller and the BTS5200-4EKA to ensure switching OFF of channels. In case of loss of module or device ground, a current (IOUT(GND)) can flow out of the DMOS. Figure 13 sketches the situation. ZGND is recommended to be a diode in parallel to a resistor (1 kΩ). ZIS(AZ) VS ZD(AZ) IS RSENSE VBAT ZDS(AZ) DSEL0 R DSEL DSEL1 R DSEL DEN R DEN LOGIC INx R IN IOUT(GND) OUTx ZDESD GND RIS IS ZGND Loss of ground protection .vsd Figure 13 Loss of Ground Protection with External Components 6.2 Undervoltage Protection Between VS(UV) and VS(OP), the undervoltage mechanism is triggered. VS(OP) represents the minimum voltage where the switching ON and OFF can takes place. VS(UV) represents the minimum voltage the switch can hold ON. If the supply voltage is below the undervoltage mechanism VS(UV), the device is OFF (turns OFF). As soon as the supply voltage is above the undervoltage mechanism VS(OP), then the device can be switched ON. When the switch is ON, protection functions are operational. Nevertheless, the diagnosis is not guaranteed until VS is in the VNOM range. Figure 14 sketches the undervoltage mechanism. Data Sheet PROFET™+ 12V 20 Rev. 1.0, 2014-02-06 BTS5200-4EKA Protection Functions VOUT undervoltage behavior .vsd VS(UV) Figure 14 Undervoltage Behavior 6.3 Overvoltage Protection VS(OP) VS There is an integrated clamp mechanism for overvoltage protection (ZD(AZ)). To guarantee this mechanism operates properly in the application, the current in the Zener diode has to be limited by a ground resistor. Figure 15 shows a typical application to withstand overvoltage issues. In case of supply voltage higher than VS(AZ), the power transistor switches ON and the voltage across the logic section is clamped. As a result, the internal ground potential rises to VS - VS(AZ). Due to the ESD Zener diodes, the potential at pin INx, DSELx, and DEN rises almost to that potential, depending on the impedance of the connected circuitry. In the case the device was ON, prior to overvoltage, the BTS5200-4EKA remains ON. In the case the BTS5200-4EKA was OFF, prior to overvoltage, the power transistor can be activated. In the case the supply voltage is in above VBAT(SC) and below VDS(AZ), the output transistor is still operational and follows the input. If at least one channel is in the ON state, parameters are no longer guaranteed and lifetime is reduced compared to the nominal supply voltage range. This especially impacts the short circuit robustness, as well as the maximum energy EAS capability. ZGND with a resistor (27 Ω) in series to the diode will offer better results. ISOV ZIS(AZ) VS ZD(AZ) IS RSENSE VBAT ZDS(AZ) DSEL0 R DSEL DSEL1 R DSEL DEN R DEN LOGIC INx R IN OUTx ZDESD GND R IS ZGND Overvoltage protection.vsd Figure 15 Overvoltage Protection with External Components Data Sheet PROFET™+ 12V 21 Rev. 1.0, 2014-02-06 BTS5200-4EKA Protection Functions 6.4 Reverse Polarity Protection In case of reverse polarity, the intrinsic body diodes of the power DMOS causes power dissipation. The current in this intrinsic body diode is limited by the load itself. Additionally, the current into the ground path and the logic pins has to be limited to the maximum current described in Chapter 4.1 with an external resistor. Figure 16 shows a typical application. RGND resistor is used to limit the current in the Zener protection of the device. Resistors RDSEL, RDEN, and RIN are used to limit the current in the logic of the device and in the ESD protection stage. RSENSE is used to limit the current in the sense transistor which behaves as a diode. The recommended value for RDEN = RDSEL = RIN = RSENSE = 4.7 kΩ. ZGND is recommended to be a 1 kΩ resistor in parallel to a diode. During reverse polarity, no protection functions are available. Micro controller protection diodes Z IS(AZ) VS ZD(AZ) IS RSENSE ZDS(AZ) VDS(REV) DSEL0 RDSEL0 DSEL1 RDSEL1 DEN R DEN LOGIC INx R IN -V S(REV) IN0 OUTx ZDESD GND IS R IS ZGND Reverse Polarity.vsd Figure 16 Reverse Polarity Protection with External Components 6.5 Overload Protection In case of overload, such as high inrush of cold lamp filament, or short circuit to ground, the BTS5200-4EKA offers several protection mechanisms. 6.5.1 Current Limitation At first step, the instantaneous power in the switch is maintained at a safe value by limiting the current to the maximum current allowed in the switch IL(SC). During this time, the DMOS temperature is increasing, which affects the current flowing in the DMOS. The current limitation value is VDS dependent. Figure 17 shows the behavior of the current limitation as a function of the drain to source voltage. Data Sheet PROFET™+ 12V 22 Rev. 1.0, 2014-02-06 BTS5200-4EKA Protection Functions 8 7 IL5(SC) 6 Current Limit IL(SC) (A) typical 5 4 3 IL28(SC) 2 1 0 2 7 12 17 Drain Source Voltage VDS (V) Figure 17 Current Limitation (typical behavior) 6.5.2 Temperature Limitation in the Power DMOS 22 27 current limitation _200m.vsd Each channel incorporates an absolute (TJ(SC)) temperature sensor and a switch OFF timer that is started by an overcurrent event. The activation of these protection mechanisms will cause an overheated channel to switch OFF to prevent destruction. A temperature limitation switch OFF latches the output until the temperature has reached an acceptable value. Figure 18 gives a sketch of the situation. A retry strategy is implemented such that when the DMOS temperature has cooled down enough, the switch is switched ON again, if the IN pin signal is still high (restart behavior). Data Sheet PROFET™+ 12V 23 Rev. 1.0, 2014-02-06 BTS5200-4EKA Protection Functions IN t IL LOAD CURRENT LIMITATION PHASE IL(x)SC LOAD CURRENT BELOW LIMITATION PHASE IL(NOM) t TDMOS ΔTJ(SW) TJ(SC) ΔTJ(SW) ΔTJ(SW) TA tsIS(FAULT) t ΔTSTEP IIS tsIS(OT_blank) IIS(FAULT) IL( NOM) / kILIS 0A V DEN t tsIS(OFF) 0V t Hard start.vsd Figure 18 Overload Protection Note: For better understanding, the time scale is not linear. The real timing of this drawing is application dependant and cannot be described. 6.5.3 Short Circuit Appearance with Channels in Parallel The four channels are not synchronised in the restart event. When the channels are in temperature limitation, the channel which has cooled down the fastest doesn’t wait for the other to be cooled down as well to restart. Thus, it is not recommended to use the device with channels in parallel. Data Sheet PROFET™+ 12V 24 Rev. 1.0, 2014-02-06 BTS5200-4EKA Protection Functions 6.6 Electrical Characteristics for the Protection Functions Table 6 Electrical Characteristics: Protection VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter Symbol Values Unit Note / Test Condition Number Min. Typ. Max. – 0.1 – mA 1)2) VS = 28 V See Figure 13 P_6.6.1 200 650 700 mV 3) P_6.6.2 Loss of Ground Output leakage current while IOUT(GND) GND disconnected Reverse Polarity Drain source diode voltage during reverse polarity VDS(REV) IL = - 0.5 A TJ = 150 °C See Figure 16 Overvoltage Overvoltage protection VS(AZ) 41 47 53 V ISOV = 5 mA P_6.6.3 See Figure 15 Overload Condition Load current limitation IL5(SC) 5.6 7.3 9 A 4) VDS = 5 V See Figure 17 and Chapter 9.3 P_6.6.4 Load current limitation IL28(SC) – 3 – A 2) VDS = 28 V See Figure 17 and Chapter 9.3 P_6.6.7 Short circuit average current after several minutes of thermal toggling IL(RMS) – 1 – A 2) VIN = 4.5 V RSHORT = 100 mΩ LSHORT = 5 µH P_6.6.12 Thermal shutdown temperature TJ(SC) 150 170 200 °C 3) 5) P_6.6.10 20 – K 2) Thermal shutdown hysteresis ΔTJ(SC) – 1) All pins are disconnected except VS and OUT. 2) 3) 4) 5) See Figure 18 See Figure 18 P_6.6.11 Not Subject to production test, specified by design Test at TJ = +150°C only Test at TJ = -40°C only Functional test only Data Sheet PROFET™+ 12V 25 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 7 Diagnostic Functions For diagnosis purpose, the BTS5200-4EKA provides a combination of digital and analog signals at pin IS. In case the diagnostic is disabled via DEN, pin IS becomes high impedance. In case DEN is activated, the sense current of the channel X is enabled/disabled via associated pins DSEL0 and DSEL1. Table 7 gives the truth table. Table 7 Diagnostic Truth Table DEN DSEL1 DSEL0 IS0 IS1 IS2 IS3 0 don’t care don’t care Z Z Z Z 1 0 0 IIS0 0 0 0 1 0 1 0 IIS1 0 0 1 1 0 0 0 IIS2 0 1 1 1 0 0 0 IIS3 7.1 IS Pin The BTS5200-4EKA provides a sense signal called IIS at pin IS. As long as no “hard” failure mode occurs (short circuit to GND / current limitation / overtemperature / excessive dynamic temperature increase or open load at OFF) a proportional signal to the load current (ratio kILIS = IL / IIS) is provided. The complete IS pin and diagnostic mechanism is described on Figure 19. The accuracy of the sense current depends on temperature and load current. The sense pin multiplexes the currents IIS(0), IIS(1), IIS(2) and IIS(3) via the pins DSEL0 and DSEL1. Thanks to this multiplexing, the matching between kILISCHANNEL0, kILISCHANNEL1, kILISCHANNEL2 and kILISCHANNEL3 is optimized. Due to the ESD protection, in connection to VS, it is not recommended to share the IS pin with other devices if these devices are using another battery feed. The consequence is that the unsupplied device would be fed via the IS pin of the supplied device. VS I IS0 = I L0 / k ILIS IIS(FAULT) IIS1 = IL1 / kILIS I IS2 = I L2 / kILIS IIS 3 = IL3 / kILIS ZIS(AZ) 0 0 IS 0 FAULT 1 1 1 0 DEN 1 FAULT DSEL1 DSEL0 Figure 19 Sense schematic.vsd Diagnostic Block Diagram Data Sheet PROFET™+ 12V 26 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 7.2 SENSE Signal in Different Operating Modes Table 8 gives a quick reference for the state of the IS pin during device operation. Table 8 Sense Signal, Function of Operation Mode Operation Mode Input level Channel X DEN1) Normal operation OFF H Output Level Diagnostic Output Z Z Short circuit to GND ~ GND Z Overtemperature Z Z Short circuit to VS IIS(FAULT) Current limitation VS < VOL(OFF) > VOL(OFF)2) ~ VINV ~ VS < VS Short circuit to GND ~ GND Overtemperature TJ(SW) event Z IIS(FAULT) IIS(FAULT) IIS = IL / kILIS IIS(FAULT) IIS(FAULT) IIS(FAULT) Short circuit to VS VS ~ VS3) ~ VINV ~ VS5) IIS < IL / kILIS IIS < IIS(OL) IIS < IIS(OL)4) IS(OL) < IIS < IL / kILIS Don’t care Z Open Load Inverse current Normal operation ON Open Load Inverse current Underload Don’t care 1) 2) 3) 4) 5) Don’t care L Z The table doesn’t indicate but it is assumed that the appropriate channel is selected via the DSEL pins. Stable with additional pull-up resistor. The output current has to be smaller than IL(OL). After maximum tINV. The output current has to be higher than IL(OL). 7.3 SENSE Signal in the Nominal Current Range Figure 20 and Figure 21 show the current sense as a function of the load current in the power DMOS. Usually, a pull-down resistor RIS is connected to the current sense IS pin. This resistor has to be higher than 560 Ω to limit the power losses in the sense circuitry. A typical value is 1.2 kΩ. The blue curve represents the ideal sense current, assuming an ideal kILIS factor value. The red curves shows the accuracy the device provides across full temperature range at a defined current. Data Sheet PROFET™+ 12V 27 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 3 IIS = 2.5 IL kILIS kILIS4 IIS [mA] 2 1.5 1 kILIS3 0.5 kILIS2 kILIS1 min/max Sense Current typical Sense Current 0 0 0.1 0.2 0.3 0.4 IL [A] 0.5 0.6 0.7 BTS5200-4EKA Figure 20 Current Sense for Nominal Load 7.3.1 SENSE Signal Variation as a Function of Temperature and Load Current In some applications a better accuracy is required at smaller currents. To achieve this accuracy requirement, a calibration on the application is possible. To avoid multiple calibration points at different load and temperature conditions, the BTS5200-4EKA allows limited derating of the kILIS value, at a given point (IL3; TJ = +25 °C). This derating is described by the parameter ∆kILIS. Figure 21 shows the behavior of the sense current, assuming one calibration point at nominal load at +25 °C. The blue line indicates the ideal kILIS ratio. The green lines indicate the derating on the parameter across temperature and voltage, assuming one calibration point at nominal temperature and nominal battery voltage. The red lines indicate the kILIS accuracy without calibration. Data Sheet PROFET™+ 12V 28 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 550 calibrated k ILIS min/max kILIS 500 typical kILIS 450 400 k ILIS Calibration Point 350 300 250 200 150 0 0.05 0.1 0.15 0.2 0.25 IL [A] 0.3 0.35 0.4 0.45 0.5 BTS5200-4EKA Figure 21 Improved Current Sense Accuracy with One Calibration Point 7.3.2 SENSE Signal Timing Figure 22 shows the timing during settling and disabling of the SENSE. VINx t ILx tONx tOFFx tONx 90% of IL static t VDEN IIS tsIS(LC) tsIS(ON) 90% of IIS static tsIS(OFF) t tsIS(chC) tsIS(ON_DEN) t VDSEL t VINy t ILy tONy t current sense settling disabling time .vsd Figure 22 Current Sense Settling / Disabling Timing Data Sheet PROFET™+ 12V 29 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 7.3.3 SENSE Signal in Open Load 7.3.3.1 Open Load in ON Diagnostic If the channel is ON, a leakage current can still flow through an open load, for example due to humidity. The parameter IL(OL) gives the threshold of recognition for this leakage current. If the current IL flowing out the power DMOS is below this value, the device recognizes a failure, if the DEN (and DSEL) is selected. In that case, the SENSE current is below IIS(OL). Otherwise, the minimum SENSE current is given above parameter IIS(OL). Figure 23 shows the SENSE current behavior in this area. The red curve shows a typical product curve. The blue curve shows the ideal current sense. I IS IIS(OL) IL IL(OL) Sense for OL .vsd Figure 23 Current Sense Ratio for Low Currents 7.3.3.2 Open Load in OFF Diagnostic For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For the calculation of pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) have to be taken into account. Figure 24 gives a sketch of the situation. Ileakage defines the leakage current in the complete system, including IL(OFF) (see Chapter 5.5) and external leakages, e.g, due to humidity, corrosion, etc... in the application. To reduce the stand-by current of the system, an open load resistor switch SOL is recommended. If the channel x is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is recognized by the device as an open load. The voltage threshold is given by VOL(OFF). In that case, the SENSE signal is switched to the IIS(FAULT). An additional RPD resistor can be used to pull VOUT to 0V. Otherwise, the OUT pin is floating. This resistor can be used as well for short circuit to battery detection, see Chapter 7.3.4. Data Sheet PROFET™+ 12V 30 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions Vbat SOL VS R OL IIS(FAULT) OL comp. OUT IS ILOFF Ileakage GND Rleakage VOL(OFF) R PD RIS ZGND Open Load in OFF.vsd Figure 24 Open Load Detection in OFF Electrical Equivalent Circuit 7.3.3.3 Open Load Diagnostic Timing Figure 25 shows the timing during either Open Load in ON or OFF condition when the DEN pin is HIGH. Please note that a delay tsIS(FAULT_OL_OFF) has to be respected after the falling edge of the input, when applying an open load in OFF diagnosis request, otherwise the diagnosis can be wrong. Load is present Open load VIN VOUT t VS-VOL(OFF) RDS(ON) x IL shutdown with load t IOUT IIS tsIS(FAULT_OL_OFF) t tsIS(LC) 90% of IIIS(FAULT) static Error Settling Disabling Time.vsd Figure 25 t Sense Signal in Open Load Timing Data Sheet PROFET™+ 12V 31 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 7.3.4 SENSE Signal in Short Circuit to VS In case of a short circuit between the OUTput-pin and the VS pin, all or portion (depending on the short circuit impedance) of the load current will flow through the short circuit. As a result, a lower current compared to the normal operation will flow through the DMOS of the BTS5200-4EKA, which can be recognized at the current sense signal. The open load at OFF detection circuitry can also be used to distinguish a short circuit to VS. In that case, an external resistor to ground RSC_VS is required. Figure 26 gives a sketch of the situation. Vbat VS IIS(FAULT) VBAT OL comp. IS OUT V OL(OFF) GND RIS IS ZGND RSC_VS Short circuit to Vs.vsd Figure 26 Short Circuit to Battery Detection in OFF Electrical Equivalent Circuit 7.3.5 SENSE Signal in Case of Overload An overload condition is defined by a current flowing out of the DMOS reaching the current limitation and / or the absolute dynamic temperature swing TJ(SW) is reached, and / or the junction temperature reaches the thermal shutdown temperature TJ(SC). Please refer to Chapter 6.5 for details. In that case, the SENSE signal given is by IIS(FAULT) when the diagnostic is selected. The device has an thermal restart behavior, such that when the overtemperature or the exceed dynamic temperature condition has disappeared, the DMOS is reactivated if the IN is still at logical level one. If the DEN pin is activated, and DSEL pin is selected to the correct channel, the IS pin is not toggling with the restart mechanism and remains to IIS(FAULT). 7.3.6 SENSE Signal in Case of Inverse Current In the case of inverse current, the sense signal of the affected channel will indicate open load in OFF state and indicate open load in ON state. The unaffected channels indicate normal behavior as long as the IINV current is not exceeding the maximum value specified in Chapter 5.4. Data Sheet PROFET™+ 12V 32 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions 7.4 Electrical Characteristics Diagnostic Function Measurement setup used for kILIS (unless otherwise specified): All channels are ON at the same time with equal IL. Table 9 Electrical Characteristics: Diagnostics VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition – 6 V Number Load Condition Threshold for Diagnostic Open load detection threshold in OFF state VS - VOL(OFF) 4 1) VIN = 0 V VDEN = 4.5 V P_7.5.1 See Figure 25 Open load detection threshold in ON state IL(OL) 2 – 9 mA VIN = VDEN = 4.5 V IIS(OL) = 15 µA P_7.5.2 See Figure 23 See Chapter 9.4 Sense Pin IS pin leakage current when sense is disabled IIS_(DIS) – Sense signal saturation voltage VS VIS(RANGE) 1 – 1 – 3 μA V 1) VIN = 4.5 V P_7.5.4 VDEN = 0 V IL = IL4 = 0.5 A 3) VIN = 0 V VOUT = VS > 10 V VDEN = 4.5 V IIS = 6 mA P_7.5.6 See Chapter 9.4 Sense signal maximum current in fault condition IIS(FAULT) 6 15 30 mA VIS = VIN = VDSEL = 0 V P_7.5.7 VOUT = VS > 10 V VDEN = 4.5 V See Figure 19 See Chapter 9.4 Sense pin maximum voltage VIS(AZ) 41 47 53 V IIS = 5 mA P_7.5.3 See Figure 19 Current Sense Ratio Signal in the Nominal Area, Stable Load Current Condition kILIS0 -50% 360 +50% Current sense ratio IL1 = 0.025 A kILIS1 -35% 350 +35% Current sense ratio kILIS2 -22% 340 +22% P_7.5.10 kILIS3 -18% 330 +18% P_7.5.11 Current sense ratio kILIS4 IL4 = 0.5 A kILIS derating with current and ∆kILIS -10% 320 +10% P_7.5.12 -8 0 +8 Current sense ratio IL0 = 10 mA IL2 = 0.05 A Current sense ratio IL3 = 0.1 A temperature VIN = 4.5 V VDEN = 4.5 V P_7.5.8 See Figure 20 P_7.5.9 TJ = -40 °C; 150 °C % 3) kILIS4 versus kILIS3 See Figure 21 P_7.5.17 Diagnostic Timing in Normal Condition Data Sheet PROFET™+ 12V 33 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions Table 9 Electrical Characteristics: Diagnostics (cont’d) VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter Symbol Current sense settling time to tsIS(ON) kILIS function stable after positive input slope on both INput and DEN Current sense settling time with load current stable and transition of the DEN tsIS(ON_DEN) Values Min. Typ. Max. Unit Note / Test Condition 0 – 250 μs 3) VDEN = VIN = 0 to 4.5 V VS = 13.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL4 = 0.5 A P_7.5.18 0 – 20 μs 1) P_7.5.19 VIN = 4.5 V Number VDEN = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL4 = 0.5 A See Figure 22 Current sense settling time to tsIS(LC) IIS stable after positive input slope on current load 0 – 20 μs 1) VIN = 4.5 V P_7.5.20 VDEN = 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL3 = 0.1 A to IL = IL4 = 0.5 A See Figure 22 Diagnostic Timing in Open Load Condition Current sense settling time to tsIS(FAULT_OL_ 0 IIS stable for open load OFF) detection in OFF state – 100 μs 1) VIN = 0V VDEN = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VOUT = VS = 13.5 V P_7.5.22 See Figure 25 200 450 μs 1) VIN = 4.5V to 0 VDEN = 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VOUT = VS = 13.5 V P_7.5.23 0 – 250 μs 1)2) VIN = VDEN = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VDS = 5 V See Figure 18 P_7.5.24 – 350 – μs 3) P_7.5.32 Current sense settling time to tsIS(FAULT_OL_ 0 IIS stable for open load ON_OFF) detection in ON-OFF transition Diagnostic Timing in Overload Condition Current sense settling time to tsIS(FAULT) IIS stable for overload detection Current sense over temperature blanking time tsIS(OT_blank) VIN = VDEN = 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VDS = 5 V to 0 V See Figure 18 Data Sheet PROFET™+ 12V 34 Rev. 1.0, 2014-02-06 BTS5200-4EKA Diagnostic Functions Table 9 Electrical Characteristics: Diagnostics (cont’d) VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter Diagnostic disable time DEN transition to IIS < 50% IL /kILIS Symbol tsIS(OFF) Values Min. Typ. Max. Unit Note / Test Condition 0 – 30 μs 1) VIN = 4.5 V VDEN = 4.5 V to 0 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL4 = 0.5 A Number P_7.5.25 See Figure 22 Current sense settling time from one channel to another tsIS(ChC) 0 – 20 μs VIN0 = VIN1 = 4.5 V VDEN = 4.5 V VDSEL = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL(OUT0) = IL4 = 0.5 A IL(OUT1) == IL3= 0.1 A P_7.5.26 See Figure 22 1) DSEL pin select channel 0 only. 2) Test at TJ = -40°C only 3) Not subject to production test, specified by design Data Sheet PROFET™+ 12V 35 Rev. 1.0, 2014-02-06 BTS5200-4EKA Input Pins 8 Input Pins 8.1 Input Circuitry The input circuitry is compatible with 3.3 and 5 V microcontrollers. The concept of the input pin is to react to voltage thresholds. An implemented Schmitt trigger avoids any undefined state if the voltage on the input pin is slowly increasing or decreasing. The output is either OFF or ON but cannot be in a linear or undefined state. The input circuitry is compatible with PWM applications. Figure 27 shows the electrical equivalent input circuitry. In case the pin is not needed, it must be left opened, or must be connected to device ground (and not module ground) via an input resistor. IN GND Figure 27 Input Pin Circuitry 8.2 DEN / DSEL0,1 Pin Input circuitry .vsd The DEN / DSEL0,1 pins enable and disable the diagnostic functionality of the device. The pins have the same structure as the INput pins, please refer to Figure 27. 8.3 Input Pin Voltage The IN, DSEL and DEN use a comparator with hysteresis. The switching ON / OFF takes place in a defined region, set by the thresholds VIN(L) Max. and VIN(H) Min. The exact value where the ON and OFF take place are unknown and depends on the process, as well as the temperature. To avoid cross talk and parasitic turn ON and OFF, a hysteresis is implemented. This ensures a certain immunity to noise. Data Sheet PROFET™+ 12V 36 Rev. 1.0, 2014-02-06 BTS5200-4EKA Input Pins 8.4 Electrical Characteristics Table 10 Electrical Characteristics: Input Pins VS = 8 V to 18 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 13.5 V, TJ = 25 °C Parameter Symbol Values Min. Typ. Unit Max. Note / Test Condition Number INput Pins Characteristics Low level input voltage range VIN(L) -0.3 – 0.8 V See Chapter 9.5 P_8.4.1 High level input voltage range VIN(H) 2 – 6 V See Chapter 9.5 P_8.4.2 P_8.4.3 Input voltage hysteresis VIN(HYS) – 250 – mV 1) Low level input current IIN(L) IIN(H) 1 10 20 µA 2 10 25 µA VIN = 0.8 V VIN = 5.5 V See Chapter 9.5 High level input current P_8.4.4 P_8.4.5 See Chapter 9.5 DEN Pin Low level input voltage range VDEN(L) -0.3 – 0.8 V – P_8.4.6 High level input voltage range VDEN(H) 2 – 6 V – P_8.4.7 P_8.4.8 P_8.4.9 Input voltage hysteresis Low level input current High level input current VDEN(HYS) IDEN(L) IDEN(H) – 250 – mV 1) 1 10 20 µA 2 10 25 µA VDEN = 0.8V VDEN = 5.5 V P_8.4.10 DSEL Pins Low level input voltage range VDSEL(L) -0.3 – 0.8 V – P_8.4.11 High level input voltage range VDSEL(H) 2 – 6 V – P_8.4.12 – 250 – mV 1) P_8.4.13 1 10 20 µA P_8.4.14 2 10 25 µA VDSEL = 0.8V VDSEL = 5.5 V Input voltage hysteresis Low level input current High level input current VDSEL(HYS) IDSEL(L) IDSEL(H) P_8.4.15 1) Not subject to production test, specified by design Data Sheet PROFET™+ 12V 37 Rev. 1.0, 2014-02-06 BTS5200-4EKA Characterization Results 9 Characterization Results The characterization have been performed on 3 lots, with 3 devices each. Characterization have been performed at 8 V, 13.5 V and 18 V over temperature range. When there is no voltage dependency seen, only a single curve is sketched. 9.1 General Product Characteristics P_4.2.3 P_4.2.4 4 4.7 3.9 3.8 3.7 VS(UV) [V] VS(OP)_MIN [V] 4.65 4.6 4.55 3.6 3.5 3.4 3.3 4.5 3.2 3.1 4.45 3 ‐50 ‐25 0 25 50 75 100 125 150 ‐50 ‐25 0 JunctionTemperature[°C]  50 75 100 125 150 JunctionTemperature[°C]  Undervoltage Threshold VS(UV) = f(TJ) Minimum Functional Supply Voltage VS(OP)_MIN = f(TJ) P_4.2.6 P_4.2.7, P_4.2.10 9 1.8 8 1.6 VS=8V VS=13.5 V 1.4 7 VS=18V 1.2 6 IS(OFF) IGND_4 [mA] 25 VS=8V VS=13.5 V 5 VS=18V 1 0.8 0.6 4 0.4 3 0.2 0 2 ‐50 ‐25 0 25 50 75 100 125 ‐50 150 ‐25 Current Consumption for Whole Device with Load. All Channels Active IGND_4 = f(TJ;VS) Data Sheet PROFET™+ 12V 0 25 50 75 100 125 150 JunctionTemperature[°C]  JunctionTemperature[°C] Standby Current for Whole Device with Load. IS(OFF) = f(TJ;VS) 38 Rev. 1.0, 2014-02-06 BTS5200-4EKA Characterization Results 9.2 Power Stage P_5.5.4 P_5.5.5 14 46.3 13 46.2 12 46.1 VS=13.5 V VS=18V 46 10 9 VS=8V 8 VS=13.5 V 7 VS=18V VDS(AZ) VDS(NL) [mV] 11 VS=8V 45.9 45.8 45.7 6 45.6 5 45.5 4 45.4 ‐50 ‐25 0 25 50 75 100 125 150 ‐50 ‐25 0 JunctionTemperature[°C] Output Voltage Drop Limitation at Low Load Current VDS(NL) = f(TJ;VS) 50 75 100 125 150 Drain to Source Clamp Voltage VDS(AZ) = f(TJ) P_5.5.12 0.35 0.24 0.3 0.22 0.25 0.2 ‐dV/dtOFF [V/μs] P_5.5.11 dV/dtON [V/μs] 25 JunctionTemperature[°C] 0.2 0.15 VS=8V 0.1 0.18 VS=8V 0.16 VS=13.5 V VS=18V 0.14 VS=13.5 V 0.05 0.12 VS=18V 0.1 0 ‐50 ‐25 0 25 50 75 100 125 150 ‐50 JunctionTemperature[°C]  Slew Rate at Turn ON dV/dtON = f(TJ;VS), RL = 25 Ω Data Sheet PROFET™+ 12V ‐25 0 25 50 75 100 125 150 JunctionTemperature[°C] Slew Rate at Turn OFF - dV/dtOFF = f(TJ;VS), RL = 25 Ω 39 Rev. 1.0, 2014-02-06 BTS5200-4EKA Characterization Results P_5.5.14 P_5.5.15 130 180 VS=8V VS=13.5 V 120 VS=13.5 V 140 VS=18V VS=18V 120 tOFF [us] 110 tON [us] VS=8V 160 100 90 100 80 60 40 80 20 70 0 ‐50 ‐25 0 25 50 75 100 125 150 ‐50 ‐25 JunctionTemperature[°C]  0 25 50 75 100 Turn ON TON = f(TJ;VS), RL = 25 Ω Turn OFF TOFF = f(TJ;VS), RL = 25 Ω P_5.5.19 P_5.5.20 300.00 250.00 150 VS=8V VS=8V VS=13.5 V 200.00 125 JunctionTemperature[°C] VS=13.5 V 250.00 VS=18V VS=18V 150.00 EOF  [uJ] EON  [uJ] 200.00 100.00 150.00 100.00 50.00 50.00 0.00 0.00 ‐50 ‐25 0 25 50 75 100 125 150 ‐50 JunctionTemperature[°C]  Switch ON Energy EON = f(TJ;VS), RL = 25 Ω Data Sheet PROFET™+ 12V ‐25 0 25 50 75 100 125 150 JunctionTemperature[°C] Switch OFF Energy EOFF = f(TJ;VS), RL = 25 Ω 40 Rev. 1.0, 2014-02-06 BTS5200-4EKA Characterization Results 9.3 Protection Functions P_6.6.4 P_6.6.7 9 5 4.5 8.5 IL28(SC) [A] IL5(SC) [A] 4 8 7.5 7 3.5 3 2.5 2 6.5 1.5 6 1 ‐50 ‐25 0 25 50 75 100 125 150 ‐50 JunctionTemperature[°C]  Overload Condition in the Low Voltage Area IL5(SC) = f(TJ); Data Sheet PROFET™+ 12V ‐25 0 25 50 75 100 125 150 JunctionTemperature[°C]  Overload Condition in the High Voltage Area IL28(SC) = f(TJ); 41 Rev. 1.0, 2014-02-06 BTS5200-4EKA Characterization Results 9.4 Diagnostic Mechanism P_7.5.2 3 7 2.5 6.5 2 6 VS=8V VS=13.5 V 1.5 IL(OL)  [mA] IIS [uA] VS=18V VS=8V VS=13.5V 1 VS=18V 5.5 5 4.5 0.5 4 0 ‐50 ‐25 0 25 50 75 100 125 ‐50 150 ‐25 0 25 50 75 100 125 150 JunctionTemperature[°C]  JunctionTemperature[°C]  Current Sense at no Load IIS = f(TJ), IL = 0 Open Load Detection ON State Threshold IIL(OL) = f(TJ;VS) P_7.5.3 P_7.5.7 44.6 VS=13.5 V 44.4 20 VS=18V IIS(FAULT) [mA] 44.3 VIS(RANGE) [V] 25 VS=8V 44.5 44.2 44.1 44 43.9 15 VS=8V 10 VS=13.5 V VS=18V 43.8 5 43.7 43.6 0 43.5 ‐50 ‐25 0 25 50 75 100 125 ‐50 150 Sense Signal Maximum Voltage (Clamping Voltage) Data Sheet PROFET™+ 12V 0 25 50 75 100 125 150 JunctionTemperature[°C]  JunctionTemperature[°C]  VIS(AZ) = f(TJ) ‐25 Sense Signal Maximum Current in Fault Condition IS(FAULT) = f(TJ) 42 Rev. 1.0, 2014-02-06 BTS5200-4EKA Characterization Results 9.5 Input Pins P_8.4.1 P_8.4.2 1.36 1.57 VS=8V 1.34 1.32 VS=13.5 V 1.55 VS=18V 1.3 VS=18V 1.54 VVIN(H) [V] VVIN(L) [V] VS=8V 1.56 VS=13.5 V 1.28 1.26 1.24 1.53 1.52 1.51 1.22 1.5 1.2 1.49 1.18 1.48 1.47 1.16 ‐50 ‐25 0 25 50 75 100 125 ‐50 150 ‐25 0 25 Input Voltage Threshold VVIN(L)= f(TJ;VS) Input Voltage Threshold VVIN(H)= f(TJ;VS) P_8.4.3 P_8.4.5 75 100 125 150 16 350 14 300 12 IIN(H) [uA] 250 VIN(HYS) [mV] 50 JunctionTemperature[°C]  JunctionTemperature[°C]  200 VS=8V 150 VS=13.5 V 10 8 VS=8V VS=13.5 V 6 VS=18V VS=18V 100 4 50 2 0 ‐50 ‐25 0 25 50 75 100 125 0 150 ‐50 JunctionTemperature[°C]  Input Voltage Hysteresis VIN(HYS) = f(TJ;VS) Data Sheet PROFET™+ 12V ‐25 0 25 50 75 100 125 150 JunctionTemperature[°C]  Input Current High Level IIN(H) = f(TJ) 43 Rev. 1.0, 2014-02-06 BTS5200-4EKA Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. VBAT Voltage Regulator OUT VS GND Z CVS VS VDD R DEN DEN I/O R DSEL DSEL0 I/O OUT0 R PD I/O 86 30 85 87 OUT1 DSEL1 R DSEL Relay RPD Micro I/O controller I/O R IN IN0 R IN IN1 + OUT2 E.C.U. R IN IN2 I/O R IN IN3 OUT3 IS R SENSE GND R5W CSENSE LED R IS GND D R GND Figure 28 OUT4 RPD A/D R LED I/O R PD OUT3 Application Diagram with BTS5200-4EKA Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Table 11 Bill of Material Reference Value Purpose RIN 10 kΩ Protection of the microcontroller during overvoltage, reverse polarity Guarantee BTS5200-4EKA channels OFF during loss of ground RDSEL RDEN RPD 10 kΩ Protection of the microcontroller during overvoltage, reverse polarity 10 kΩ Protection of the microcontroller during overvoltage, reverse polarity 47 kΩ Polarization of the output for short circuit to VS detection Improve BTS5200-4EKA immunity to electomagnetic noise RIS RSENSE 1.2 kΩ Sense resistor 4.7 kΩ Overvoltage, reverse polarity, loss of ground. Value to be tuned with micro controller specification. Data Sheet PROFET™+ 12V 44 Rev. 1.0, 2014-02-06 BTS5200-4EKA Application Information Table 11 Bill of Material (cont’d) Reference Value Purpose CSENSE RLED RGND 100 pF Sense signal filtering. 680 Ω Overvoltage protection of the LED. Value to be tuned with LED specification. 1 kΩ Protection of the BTS5200-4EKA during loss of inductive load D BAS21 Protection of the BTS5200-4EKA during reverse polarity Z 36 V Zener diode Protection of the device during overvoltage CVS 100 nF Filtering of voltage spikes at the battery line Data Sheet PROFET™+ 12V 45 Rev. 1.0, 2014-02-06 BTS5200-4EKA Application Information 10.1 Further Application Information Please contact us to get • • Existing App. Notes For further information you may visit http://www.infineon.com/profet Data Sheet PROFET™+ 12V 46 Rev. 1.0, 2014-02-06 BTS5200-4EKA Package Outlines 11 Package Outlines 0.35 x 45˚ 0.41±0.09 0˚...8˚ C 2) 0.2 M 0.19 +0.06 0.1 C D 2x 8˚ MAX. 0.08 C Seating Plane C A-B D 14x 0˚...8˚ 0.64 ±0.25 6 ±0.2 D 0.2 8˚ MAX. 1.27 1.7 MAX. 0.2 -0.1 8˚ MAX. Stand Off (1.47) 0.1+0 -0.1 3.9 ±0.11) M D Bottom View 14 8 1 1 7 14 7 8 2.65 ±0.1 6.4 ±0.1 A B 8.65 ±0.1 Index Marking 0.1 C A-B 2x 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.13 max. 3) JEDEC reference MS-012 variation BB Figure 29 GPS01207 PG-DSO-14-48-EP (Plastic Dual Small Outline Package) (RoHS-Compliant) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Data Sheet PROFET™+ 12V 47 Rev. 1.0, 2014-02-06 BTS5200-4EKA Revision History 12 Revision History Revision Date Changes 1.0 Creation of the document 2014-02-06 Data Sheet PROFET™+ 12V 48 Rev. 1.0, 2014-02-06 Edition 2014-02-06 Published by Infineon Technologies AG 81726 Munich, Germany © 2014 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Legal Disclaimer for short-circuit capability Infineon disclaims any warranties and liabilities, whether expressed nor implied, for any short-circuit failures below the threshold limit. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
BTS5200-4EKA 价格&库存

很抱歉,暂时无法提供与“BTS5200-4EKA”相匹配的价格&库存,您可以联系我们找货

免费人工找货
BTS5200-4EKA
  •  国内价格 香港价格
  • 2500+17.705332500+2.13110

库存:0

BTS5200-4EKA
    •  国内价格
    • 2500+7.23600

    库存:0

    BTS5200-4EKA
      •  国内价格
      • 1+12.03120
      • 10+10.40040
      • 30+9.38520
      • 100+8.34840
      • 500+7.87320
      • 1000+7.66800

      库存:0