BTS 5440G
Smart High-Side Power Switch
Four Channels: 4 x 25mΩ
IntelliSense
Product Summary
Operating voltage
Package
V bb(on)
4,5...28
V
( Loaddump: 40 V )
Active channels
one
four parallel
On-state resistance
RON
25
6.5
Nominal load current
IL(nom)
6.2
13.9
Current limitation
Low
IL(SCr)
High
10
mΩ
P-DSO-28 -19
A
A
40
General Description
• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and
diagnostic feedback, monolithically integrated in Smart SIPMOS technology.
• Providing embedded protective functions.
• Extern adjustable current limitation.
Application
• All types of resistive, inductive and capacitive loads
• µC compatible high-side power switch with diagnostic feedback for 12 V grounded loads
• Due to the adjustable current limitation best suitable for loads with high inrush currents, so as lamps
• Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
Block Diagram
• Very low standby current
• CMOS compatible input
• Improved electromagnetic compatibility (EMC)
• Stable behaviour at low battery voltage
Vbb
IN1
IS1
IS2
IN2
Protection Functions
• Reverse battery protection with external resistor
• Short circuit protection
• Overload protection
• Current limitation
• Thermal Shutdown
• Overvoltage protection with external resistor
• Loss of GND and loss of Vbb protection
• Electrostatic discharge Protection (ESD)
Logic
Channel 1
Channel 2
Load 1
CLA 1/2
IN3
IS3
IS4
Load 2
Logic
Channel 3
Channel 4
Load 3
IN4
CLA 3/4
GND
Load 4
Diagnostic Functions: IntelliSense
• Proportional load current sense ( with defined fault signal during thermal shutdown and overload )
• Additional open load detection in OFF - state
• Suppressed thermal toggling of fault signal
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2005-06-03
BTS 5440G
Functional diagram
overvoltage
protection
internal
voltage
supply
logic
gate
control
+
charge
pump
current limit
VBB
clamp for
inductive load
OUT1
IN1
IS1
ESD
temperature
sensor
openload
dedection
LOAD
Current
sense
CLA 1/2
IN2
IS2
control and protection circuit
of
channel 2
GND1/2
IN3
IS3
OUT2
control and protection circuit
of
channel 3
OUT3
CLA 3/4
IN4
IS4
control and protection circuit
of
channel 4
GND3/4
OUT4
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BTS 5440G
Pin definition and function
Pin
Symbol
Function
1,14,
Vbb
Positive power supply voltage. Design the wiring for the
15,28
simultaneous max. short circuit currents from channel 1 to 4
and also for low thermal resistance
3
IN1
Input 1,2,3,4 activates channel 1,2,3,4 in case of logic high signal
6
IN2
9
IN3
12
IN4
25,26,27
OUT1
Output 1,2,3,4 protected high-side power output of channel 1,2,3,4.
22,23,24
OUT2
Design the wiring for the max. short circuit current
19,20,21
OUT3
16,17,18
OUT4
4
IS1
Diagnostic feedback 1...4 of channel 1 to 4
5
IS2
On state: advanced current sense with defined signal in case
10
IS3
of overload or short circuit
11
IS4
Off state: High on failure
7
CLA 1/2
Current limit adjust; the current limit for channels 1/2 and 3/4 can
13
CLA 3/4
be chosen as high ( potential < 2V ) or low ( potential > 4V ).
2
GND 1/2
Ground of chip 1 ( channel 1,2 )
8
GND 3/4
Ground of chip 2 ( channel 3,4 )
Pin configuration
(top view )
V bb
GND ½
IN 1
IS 1
IS 2
IN 2
C LA ½
GND ¾
IN 3
IS 3
IS 4
IN 4
C LA ¾
V bb
1
2
3
4
5
6
7
8
9
10
11
12
13
14
•
28 V b b
27
26
25
24
23
22
21
20
19
18
17
16
15
O U T1
O U T1
O U T1
OUT2
OUT2
OUT2
OUT3
OUT3
OUT3
OUT4
O U T4
O U T4
V bb
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BTS 5440G
Maximum Ratings at Tj=25°C, unless otherwise specified
Parameter
Symbol
Value
Supply voltage (overvoltage protection see page 6)
Vbb
281)
Supply voltage for full short circuit protection;Tj = -40...150°C
Vbb(SC)
282)
Maximum voltage across DMOS
VON
Load dump protection 3) VLoadDump = V A + VS; VA = 13,5 V
VLoaddump
Unit
V
52
In = low or high; td = 400 ms; RI4) = 2 Ω
RL = 2.25 Ω
40
RL = 6.8 Ω
53
IL(lim)5)
Load current (Short - circuit current, see page 7)
IL
Operating temperature range
Tj
-40...+150 °C
Storage temperature range
Tstg
-55...+150
Dynamical temperature rise at switching
dT
60
K
Ptot
1,6
W
Power dissipation6) (DC), all channels active
TA = 85 °C
Maximal switchable inductance, single pulse
Vbb=12V, T jstart=150°C;
mH
ZL(s)
(see diagrams on page 12)
IL = 6 A, EAS = 0.319 J, RL = 0 Ω,
IL = 12 A, EAS = 0.679 J, RL = 0 Ω,
one channel:
9.8
two parallel channels:
5.2
Electrostatic discharge voltage
IN: VESD
IS:
(Human Body Model)
according to ANSI EOS/ESD - S5.1 - 1993 , ESD STM5.1 - 1998
OUT:
1,0
4,0
VIN
-10...16
Voltage at current limit adjustment pin
VCLA
-10...16
Current through current limit adjustment pin
I CLA
±5.0
Current through input pin (DC)
I IN
±5.0
I IS
-5...+10
(see page 11)
kV
2,0
Continuous input voltage
Current through sense pin (DC)
A
V
mA
118...28 V for 100 hours
2only single pulse, R = 200 mΩ ; L = 8 µH ; R and L are describing the complete circuit impedance including
L
line, contact and generator impedances.
3Supply voltage higher than V
bb(AZ) require an external current limit for the GND (150Ω resistor) and sense pin.
4R = internal resistance of the load dump test pulse generator.
I
5Current limit is a protection function. Operation in current limitation is considered as "outside" normal operating
range. Protection functions are not designed for continuous repetitive operation.
6Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for V
bb
connection. PCB is vertical without blown air.
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BTS 5440G
Electrical Characteristics
Parameter and Conditions, each of the four channels
Symbol
at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified
Values
Unit
min.
typ.
max.
RthJS
-
-
25
K/W
one channel active: RthJA
-
40
-
K/W
Thermal Resistance
junction - soldering point1)
junction - ambient2)
each channel:
all channels active:
32
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT),
(see page 13)
RON
mΩ
Tj = 25 °C, IL = 5 A,
each channel:
-
21
25
Tj = 150 °C,
each channel:
-
42
50
Tj = 25 °C,
two parallel channels:
-
11
13
Tj = 25 °C,
four parallel channels:
-
5.5
6.5
Nominal load current2)
Ta = 85°C, Tj ≤ 150°C ,
A
I L(nom)
one channel active:
5.7
6.2
-
two channels active, per channel:
4.0
4.4
-
four channels active, per channel:
3.1
3.4
-
Output voltage drop limitation at small load currents VON(NL)
IL = 0.5 A
-
40
-
mV
Output current while GND disconnected 3)
-
-
2
mA
I L(GNDhigh)
( see diagram page 12 )
VIN = 0 V
1Soldering point is measured at Vbb-pin
2Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for V
bb
connection. PCB is vertical without blown air.
3not subject to production test, specified by design
Page 5
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BTS 5440G
Electrical Characteristics
Parameter and Conditions, each of the four channels
Symbol
at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified
Values
Unit
min.
typ.
max.
ton
-
90
200
toff
-
100
220
dV/dton
0.1
0.25
0.45 V/µs
-dV/dtoff
0.09
0.25
0.4
Operating voltage2)
Vbb(on)
4.5
-
28
Overvoltage protection3)
Vbb(AZ)
41
47
52
Load Switching Capabilities and Characteristics
Turn-on time1)
to 90% VOUT
µs
RL = 12 Ω, V bb = 12 V
Turn-off time 1)
to 10% VOUT
RL = 12 Ω, V bb = 12 V
Slew rate on 1)
10 to 30% VOUT,
RL = 12 Ω, V bb = 12 V
Slew rate off 1)
70 to 40% VOUT ,
RL = 12 Ω, V bb = 12 V
Operating Parameters
V
Ibb = 40 mA
Standby current 4)
µA
I bb(off)
(see diagram on page 13)
Tj = -40...+25 °C, VIN = 0 V
-
10
15
Tj = 150 °C
-
-
40
1See timing diagram on page 14.
218V...28V for 100 hours
3Supply voltages higher than V
bb(AZ) require an external current limit for the status pin and GND pin (e.g. 150Ω).
See also VOut(CL) in table of protection functions and circuit diagram on page 11.
4Measured with load; for the whole device; all channels off.
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BTS 5440G
Electrical Characteristics
Parameter and Conditions, each of the four channels
Symbol
at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified
Values
Unit
min.
typ.
max.
IL(off)
-
1.5
8
µA
IGND
-
1.6
4
mA
Operating Parameters
Off-State output current (included in Ibb(off) )
VIN = 0 V, each channel
Operating current 1)
VIN = 5 V, per active channel
Protection Functions2)
Current limit, ( see timing diagrams, page 15 )
A
I L(LIM)
Low level; if potential at CLA = high
7
11
14
High level; if potential at CLA = low
40
50
60
VCLA(T-)
2.0
-
-
VCLA(T+)
-
-
4.0
Current limit adjustment threshold voltage
Repetitive short circuit current limit
V
A
I L(SCr)
Tj = Tjt (see timing diagrams on page 15)
High level
one active channel:
-
40
-
two active channels 3):
-
40
-
one active channel:
-
7
-
two active channels 3):
-
7
-
-
3.5
-
-
0.75
-
-
-15
-
V
Low level
Initial short circuit shutdown time
low level:
Tj,start = 25°C ; Vbb = 13,5 V
high level:
Output clamp (inductive load switch off) 4)
t off(SC)
VOut(CL)
ms
IL = 40 mA
Thermal overload trip temperature
T jt
150
170
-
°C
Thermal hysteresis
∆Tjt
-
10
-
K
1Add I , if I > 0
IS
IS
2Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as "outside" normal operating range.
Protection functions are not designed for continuous repetitive operation.
3At the beginning of the short circuit the fourfold current is possible for a short time.
4If channels are connected in parallel, output clamp is usually accomplished by the
channel with the lowest VOut(CL) .
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BTS 5440G
Electrical Characteristics
Parameter and Conditions, each of the four channels
Symbol
at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified
Values
Unit
min.
typ.
max.
Diagnostic Characteristics
Open load detection voltage
VOUT(OL)
2
3.2
4.4
V
Internal output pull down1)
ROUT(PD)
11
23
35
kΩ
4640
4900
4900
5800
5400
5350
6960
5900
5800
VOUT = 13.5 V
Current sense ratio, static on-condition
kILIS = IL :IIS
IL = 0.5 A
IL = 3 A
IL = 6 A
kILIS
Sense signal in case of fault-conditions 2)
Vfault
5
6.2
7.5
Current saturation of sense fault signal
I fault
4
-
-
mA
Sense signal delay after thermal shutdown3)
t delay(fault)
-
-
1.2
ms
Current sense output voltage limitation
VIS(lim)
5.4
6.5
7.3
V
I IS(LH)
-
-
5
µA
t son(IS)
-
-
400
µs
t slc(IS)
-
-
300
V
in off-state
IIS = 0 , IL = 5 A
Current sense leakage/offset current
VIN = 5 V, IL = 0 , VIS = 0
Current sense settling time to IIS static ±10%
after positive input slope 4) , IL = 0 to 5A
Current sense settling time to IIS static ±10%
after change of load current4) , IL = 2.5 to 5A
1In case of floating output, the status doesn´t show open load.
2Fault condition means output voltage exceeds open load detection voltageV
OUT(OL)
3In the case of thermal shutdown the V
fault signal remains for t delay(fault) longer
than the restart of the switch ( see diagram on page 16 ). Not subject to production test,
specified by design.
4not subject to production test, specified by design
Page 8
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BTS 5440G
Electrical Characteristics
Parameter
Symbol
at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified
Values
Unit
min.
typ.
max.
Diagnostic Characteristics
Status invalid after negative input slope
td(SToff)
-
-
1.2
ms
Status invalid after positive input slope
td(STOL)
-
-
20
µs
2.0
3.5
5.5
kΩ
V
with open load
Input Feedback1)
Input resistance (see circuit page 11)
RI
Input turn-on threshold voltage
VIN(T+)
-
-
2.4
Input turn-off threshold voltage
VIN(T-)
1.0
-
-
Input threshold hysteresis
∆V IN(T)
-
0.5
-
Off state input current
I IN(off)
3
-
40
I IN(on)
20
50
90
Reverse battery voltage
-Vbb
-
-
27
Drain-source diode voltage (VOUT > Vbb)
-VON
-
330
-
µA
VIN = 0.4 V
On state input current
VIN = 5 V
Reverse Battery2)
V
mV
Tj = 150 °C, Ibb = -10 mA
1If ground resistors R
GND are used, add the voltage drop across these resistor.
2Requires a 150Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode
has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions
due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse
current operation! Input and status currents have to be limited. (see max. ratings page 4 )
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BTS 5440G
Truth Table - for each of the four channels
Input
Output
Diagnostic
level
level
output
Normal
L
L
Z 1)
Operation
H
Vbb
I IS = IL / kilis
H
Vbb
Vfault
Short circuit
L
L
Z1)
to GND
H
L
Vfault
Overtemperature
L
L
Z1)
H
L
Vfault
Short circuit
L
Vbb
Vfault
to Vbb
H
Vbb
Open load
L
>Vout(OL)
< IIS = IL / kilis3)
Vfault
H
Vbb
Z1)
Current
Limitation 2)
L = " Low" Level
Z = high impedance, potential depends on external circuit
H = "High" Level Vfault = 5V typ., constant voltage independent of external sense resistor.
Parallel switching of channels is possible by connecting the inputs and outputs parallel.
The current sense ouputs have to be connected with a single sense resistor.
Terms
Ibb
V
Leadframe
bb
I IN1
I IN2
V
V
IN1 IN2
3
6
I IS1
4
I IS2
5
V
V
IS2 IS1
7
IN1
V bb
OUT1
IN2
IS1
CLA1/2
V
CLA1/2
25
26
27
PROFET
OUT2
IS2
V
ON1
V
ON2
22
23
24
I
I
GND
I IN3
L1
I IN4
I IS3
I L2
VIN3 V
IN4
V
OUT1
GND1/2
2
Leadframe
V bb
I IS4
V
V
IS4 IS3
V
OUT2
9
12
10
11
13
IN3
Vbb
OUT3
IN4
IS3
CLA3/4
V
CLA3/4
19
20
21
PROFET
OUT4
IS4
V
ON3
V
ON4
16
17
18
I
L3
I L4
V
OUT3
GND3/4
8
I
GND
V
OUT4
Leadframe (Vbb ) is connected to pin 1, 14, 15, 28
1L-potential by using a sense resistor
2Current limitation is only possible while the device is switched on.
3Low ohmic short to V may reduce the output current I and therefore also the sense current I .
bb
L
IS
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BTS 5440G
Input circuit ( ESD protection ), IN1...IN4
R
IN
Inductive and overvoltage output clamp,
OUT1...OUT4
I
+Vbb
V
ESD-ZD I
I
Z
I
OUT
GND
V OUT
The use of ESD zener diodes as voltage clamp
at DC conditions is not recommended.
GND
Power GND
V Out clamped to VOut(CL) = -15 V typ.
Sense-Status output, IS1...IS4
ON-State: Normal operation: IS = IL / kILIS
V IS = IS * RIS; RIS = 1kΩ nominal
Overvolt. Protection of logic part
OUT1...OUT4
RIS > 500Ω
I
IS
Sense output
logic
IS
V
+ V bb
V
IS
IN
RI
Z2
Logic
IS
Vf
V
ESD-ZD
R
PR O F ET
Z1
IS
GND
R IS
GND
R GND
Sig na l G N D
V Z1 = 6,1V typ., V Z2 = 47V typ., R GND = 150Ω ,
ESD zener diode: VESD = 6,1 V typ., max. 14 mA ;
RIS = 1kΩ , R I = 3,5kΩ typ.
ON-State: Fault condition so as thermal shut down
or current limitation
Sense output
logic
Vfault
Vfault
Vf
ESD-ZD
R
IS
GND
Vfault = 6 V typ ; Vfault < VESD under all conditions
OFF-State diagnostic condition:
Open Load, if VOUT > 3 V typ.; IN low
Int. 5V
IS - ST
RIS
GND
ESDZD
ESD-Zener diode: 6,1V typ., max. 5mA; RST(ON) < 375Ω
at 1,6mA.. The use of ESD zener diodes as voltage clamp
at DC conditions is not recommended.
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BTS 5440G
Vbb disconnect with energized inductive
load
Reverse battery protection
OUT1...OUT4
- V bb
V
IN
RI
Z2
high
IN
L o g ic
Vbb
PROFET
IS
OUT
OUT
IS
V
GND
Z1
PROFET
-I G N D
R IS
R GND
S ig n a l G N D
V
R Load
bb
Load G N D
V Z1 = 6,1V typ., VZ2 = 47V typ., RGND = 150Ω
RIS = 1kΩ, RI = 3,5kΩ typ.
In case of reverse battery the load current has to
be limited by the load. Protection functions are
not active.
For inductive load currents up to the limits defined
by ZL each switch is protected against loss of Vbb.
(max. ratings and diagram on page 12)
Consider at your PCB layout that in the case of Vbb
disconnection with energized inductive load all the
load current flows through the GND connection.
Open load detection, OUT1...OUT4
Off-state diagnostic condition:
Open load, if VOUT > 3 V typ.; IN = low
V
R
Inductive load switch-off energy
dissipation
E bb
bb
E AS
E XT
IN
O FF
V
PROFET
OUT
=
Lo g ic
u n it
O p e n lo a d
d e tec tio n
ELoad
Vbb
OUT
L
IS
GND
ZL
{
EL
ER
R
L
S ig na l G N D
Energy stored in load inductance: EL = ½ * L * IL2
GND disconnect
While demagnetizing load inductance,
the enérgy dissipated in PROFET is
EAS = Ebb + EL - ER = VON(CL) * iL(t) dt,
Vbb
IN
PROFET
with an approximate solution for RL > 0Ω:
OUT
IS
GND
V
bb
V V
IN IS
V
GND
E AS =
IL * L
IL * R L
*(V bb + | V OUT ( CL )| )* ln(1 +
)
2 * RL
| V OUT ( CL )|
Any kind of load.
Page 12
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BTS 5440G
Typ. standby current
Maximum allowable load inductance
I bb(off) = f(T j) ; V bb = 16 V ; V IN1...4 = low
for a single switch off (one channel)
L =f(IL); Tjstart = 150°C, Vbb = 12V, RL = 0Ω
16
1000
14
12
10
Ibb(off) [µA]
ZL(s) [mH]
100
8
6
10
4
2
1
0
-40 -20 0
0,1
0
5
10
15
20 40 60 80 100 120 140 160
Tj [°C]
20
I L [A]
Typ. on-state resistance
RON = f(V bb,T j); IL = 5 A ; V in = high
30
28
26
Ron [mOhm]
24
22
20
18
16
14
12
0
5
10
15
20
25
30
35
Vbb [V]
Page 13
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BTS 5440G
Timing diagrams
All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4.
Figure 1a: Switching a resistive load,
change of load current in on-condition
Figure 1c: Behaviour of sense output:
Sense current (I S) and sense voltage (V S)
as function of load current dependent on
the sense resistor.
Shown is VS and IS for three different
sense resistors. Curve 1 refers to a low
resistor, curve 2 to a medium-sized
resistor and curve 3 to a big resistor.
Note, that the sense resistor may not falls
short of a minimum value of 500Ω.
IN
VOUT
t on
IL
t off
tslc(IS)
Load 1
t slc(IS)
VS
Load 2
VESD
Vfault
IS,VS
tson(IS)
t d(SToff)
3
2
t
1
The sense signal is not valid during settling time after
turn on or change of load current. tslc(IS) = 300 µs max.
IL
IS
1
2
Figure 1b: V bb turn on
3
IN
IL(lim)
Vbb
IL
IS = I L / kILIS
V IS = I S * R IS; RIS = 1kΩ nominal
RIS > 500Ω
IL
IS ,V S
proper turn on under all conditions
Page 14
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BTS 5440G
Figure 2a: Switching a lamp
Figure 3a: Short circuit:
Shut down by overtemperature,
reset by cooling
IN
IN
IS
V
IL(lim)
IL
OUT
I
I
L(SCr )
L
t
Figure 2b: Switching a lamp with current limit:
The behaviour of IS and VS is shown for a
resistor, which refers to curve 1 in figure 1c
IN
t d(SToff)
Vfault
VS
Heating up may require several milliseconds,
depending on external conditions.
IL(lim) = 50A typ. increases with
decreasing temperature.
VOUT
Figure 3b: Turn on into short circuit,
shut down by overtemperature, restart by cooling
( channel 1 and 2 switched parallel )
IL
IN1/2
IS
Vfault
R IS
2 x I L( lim )
I L1 + I L2
2 x I L( lim )
VS
V fault
t
I
t
Page 15
t d(SToff)
off(SC)
V S1 , V S2
L( SCr )
V fault
2005-06-03
BTS 5440G
Figure 6a: Current sense ratio 1)
Figure 4a: Overtemperature
Reset if T j < Tjt
7000
The behaviour of IS and V S is shown for a resistor,
which refers to curve 1 in figure 1c.
kILIS
IN
6000
IL
5000
IS
tdelay(fault)
[A] IL
4000
TJ
0 1 2 3 4 5 6 7 8 9 10 11 12 13
t
Figure 5a:Open-load: detection in OFF-state,
turn on/off to open load.
Open load of channel 1; other channels normal
opertaion.
IN1
V OUT1
toff
t off
td(SToff)
td(SToff)
I L1
IS
Vfault
toff = 220µs max.; t d(SToff) = 1,2ms max.
with pull up resistor at output
1This range for the current sense ratio refers to all devices. The accuracy of the k
ILIS can
be raised by calibrating the value of kILIS for every single device.
Page 16
2005-06-03
BTS 5440G
Package and ordering code
all dimensions in mm
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.
P-DSO-28-19
Sales Code
BTS 5440G
Ordering Code
Q67060-S6136
Attention please!
The information herein is given to describe certain
components and shall not be considered as
a guarantee of characteristics.
Terms of delivery and rights to technical change
reserved.
We hereby disclaim any and all warranties, including
but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC
manufacturer.
Information
For further information on technology, delivery
terms and conditions and prices please contact
your nearest Infineon Technologies Office in
Germany or our Infineon Technologies
Representatives worldwide (see address list).
Warnings
Due to technical requirements components may
contain dangerous substances. For information
on the types in question please contact your
nearest Infineon Technologies Office.
Infineon Technologies Components may only be
used in life-support devices or systems with the
express written approval of Infineon Technologies,
if a failure of such components can reasonably be
expected to cause the failure of that life-support
device or system, or to affect the safety or
effectiveness of that device or system. Life support
devices or systems are intended to be implanted in
the human body, or to support and/or maintain and
sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or
other persons may be endangered.
Page 17
2005-06-03
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