BTT6100-2ERA

PROFET™ +24 V BTT6100-2ERA Smart Hig h-Side Power Switc h Dual Channel, 100 mΩ 1 Package PG-TDSO-14 Marking 6100-2ERA Overview Application • Suitable for resistive, inductive and capacitive loads • Replaces electromechanical relays, fuses and discrete circuits • Most suitable for loads with high inrush current, such as lamps • Suitable for 12 V and 24 V Trucks and Transportation System VBAT Voltage Regulator OUT CVDD T1 VS GND Z CVS ROL VS VDD GPIO RDEN DEN GPIO RDSEL DSEL OUT0 Microcontroller RIN IN0 GPIO RIN IN1 OUT4 COUT RPD GPIO Valve OUT1 IS RSENSE RPD ADC IN GND COUT Bulb GND RIS RGND CSENSE D Application Diagram with BTT6100-2ERA Datasheet www.infineon.com 1 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Overview Basic Features • Dual channel device • Very low stand-by current • 3.3 V and 5 V compatible logic inputs • Electrostatic discharge protection (ESD) • Optimized electromagnetic compatibility • Logic ground independent of load ground • Very low power DMOS leakage current in OFF state • Green product (RoHS compliant) and AEC qualified Description The BTT6100-2ERA is a 100 mΩ dual channel Smart High-Side Power Switch, embedded in a PG-TDSO-14, Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by a N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is specially designed to drive lamps up to 1x P21W 24V or 1x R10W 12V, as well as LEDs in the harsh automotive environment. Table 1 Product Summary Parameter Symbol Value Operating voltage range VS(OP) 5 V ... 36 V Maximum supply voltage VS(LD) 65 V Maximum ON state resistance at TJ = 150°C per channel RDS(ON) 200 mΩ Nominal load current (one channel active) IL(NOM)1 2.6 A Nominal load current (all channels active) IL(NOM)2 2.2 A Typical current sense ratio kILIS 600 Minimum current limitation IL5(SC) 20 A Maximum standby current with load at TJ = 25°C IS(OFF) 500 nA Diagnostic Functions • Proportional load current sense multiplexed for the 2 channels • Open load detection in ON and OFF • Short circuit to battery and ground indication • Overtemperature switch off detection • Stable diagnostic signal during short circuit • Enhanced kILIS dependency with temperature and load current Protection Functions • Stable behavior during undervoltage • Reverse polarity protection with external components • Secure load turn-off during logic ground disconnection with external components • Overtemperature protection with latch • Overvoltage protection with external components • Enhanced short circuit operation Datasheet 2 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Block Diagram 2 Block Diagram Channel 0 VS voltage sen sor int ern al power supply IN0 over temper atu re driver logic DEN ESD prot ec tion IS gat e cont rol & charge p ump T clamp for ind uctive load over cur rent switch limit OUT 0 load cu rrent sense and open load detection forwar d voltage drop detection VS Channel 1 T IN1 Cont rol and pro tec tion circuit equivalent to channel 0 DSEL OUT 1 GND Figure 1 Datasheet Block diagramD xS.vsd Block Diagram for the BTT6100-2ERA 3 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Pin Configuration 3 Pin Configuration 3.1 Pin Assignment GND 1 14 OUT0 IN0 2 13 OUT0 DEN 3 12 OUT0 IS 4 11 NC DSEL 5 10 OUT1 IN1 6 9 OUT1 NC 7 8 OUT1 Pinout dual SO14.vsd Figure 2 Pin Configuration 3.2 Pin Definitions and Functions Table 2 Pin Definitions and Functions Pin Symbol Function 1 GND GrouND; Ground connection 2 IN0 INput channel 0; Input signal for channel 0 activation 3 DEN Diagnostic ENable; Digital signal to enable/disable the diagnosis of the device 4 IS Sense; Sense current of the selected channel 5 DSEL Diagnostic SELection; Digital signal to select the channel to be diagnosed 6 IN1 INput channel 1; Input signal for channel 1 activation 7, 11 NC Not Connected; No internal connection to the chip 8, 9, 10 OUT1 OUTput 1; Protected high side power output channel 11) 12, 13, 14 OUT0 OUTput 0; Protected high side power output channel 01) Cooling Tab VS Voltage Supply; Battery voltage 1) All output pins of a given channel must be connected together on the PCB. All pins of an output are internally connected together. PCB traces have to be designed to withstand the maximum current which can flow. Datasheet 4 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Pin Configuration 3.3 Voltage and Current Definition Figure 3 shows all terms used in this data sheet, with associated convention for positive values. IVS VS VDS0 VS IIN0 IN0 VIN0 OUT0 IN1 VIN1 IDEN VDSEL VOUT0 VDS1 DEN VDEN OUT1 DSEL IIS IS VIS IOUT0 GND IOUT1 VOUT1 IGND voltage and current convention.vsd Figure 3 Datasheet Voltage and Current Definition 5 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 3 Absolute Maximum Ratings1) TJ = -40°C to 150°C; (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number P_4.1.1 Supply Voltages Supply voltage VS -0.3 – 48 V – Reverse polarity voltage -VS(REV) 0 – 28 V t < 2 min P_4.1.2 TA = 25°C RL ≥ 25 Ω ZGND = Diode + 27 Ω Supply voltage for short circuit protection VBAT(SC) 0 – 36 V P_4.1.3 RSupply = 10 mΩ LSupply = 5 µH RECU= 20 mΩ RCable= 16 mΩ/m LCable= 1 µH/m, l = 0 or 5 m See Chapter 6 and Figure 28 Supply voltage for Load dump protection VS(LD) – – 65 V 2) RI = 2 Ω RL = 25 Ω P_4.1.12 nRSC1 – – 100 k cycles 3) P_4.1.4 VIN -0.3 – – 6 7 V – t < 2 min P_4.1.13 Current through INPUT pins IIN -2 – 2 mA – P_4.1.14 Voltage at DEN pin VDEN -0.3 – – 6 7 V – t < 2 min P_4.1.15 Current through DEN pin IDEN -2 – 2 mA – P_4.1.16 Voltage at DSEL pin VDSEL -0.3 – – 6 7 V – t < 2 min P_4.1.17 Current through DSEL pin IDSEL -2 – 2 mA – P_4.1.18 Voltage at IS pin VIS -0.3 – VS V – P_4.1.19 Current through IS pin IIS -25 – 50 mA – P_4.1.20 Short Circuit Capability Permanent short circuit IN pin toggles _ Input Pins Voltage at INPUT pins Sense Pin Datasheet 6 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA General Product Characteristics Table 3 Absolute Maximum Ratings1) TJ = -40°C to 150°C; (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Power Stage Load current | IL | – – IL(LIM) A – P_4.1.21 Power dissipation (DC) PTOT – – 1.8 W TA = 85°C TJ < 150°C P_4.1.22 Maximum energy dissipation Single pulse (one channel) EAS – – 36 mJ IL(0) = 1.5 A TJ(0) = 150°C VS = 28 V P_4.1.23 Voltage at power transistor VDS – – 65 V – P_4.1.26 -20 -150 – 20 20 mA – t < 2 min P_4.1.27 Currents Current through ground pin I GND Temperatures Junction temperature TJ -40 – 150 °C – P_4.1.28 Storage temperature TSTG -55 – 150 °C – P_4.1.30 VESD -2 – 2 kV 4) HBM P_4.1.31 HBM P_4.1.32 ESD Susceptibility ESD susceptibility (all pins) ESD susceptibility OUT Pin vs. GND and VS connected VESD -4 – 4 kV 4) ESD susceptibility VESD -500 – 500 V 5) CDM P_4.1.33 V 5) CDM P_4.1.34 ESD susceptibility pin (corner pins) VESD -750 – 750 1) Not subject to production test. Specified by design 2) VS(LD) is setup without the DUT connected to the generator per ISO 7637-1 3) Threshold limit for short circuit failures: 100 ppm. Please refer to the legal disclaimer for short-circuit capability on the Back Cover of this document 4) ESD susceptibility, Human Body Model "HBM" according to AEC Q100-002 5) ESD susceptibility, Charged Device Model "CDM" according to AEC Q100-011 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Datasheet 7 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA General Product Characteristics 4.2 Functional Range Table 4 Functional Range TJ = -40°C to 150°C; (unless otherwise specified) Parameter Nominal operating voltage Symbol VNOM Values Min. Typ. Max. 8 28 36 Unit Note or Test Condition Number V – P_4.2.1 2) Extended operating voltage VS(OP) 5 – 48 V VIN = 4.5 V RL = 25 Ω VDS < 0.5 V P_4.2.2 Minimum functional supply VS(OP)_MIN voltage 3.8 4.3 5 V 1) VIN = 4.5 V RL = 25 Ω From IOUT = 0 A to VDS < 0.5 V; see Figure 15 P_4.2.3 Undervoltage shutdown VS(UV) 3 3.5 4.1 V 1) P_4.2.4 VIN = 4.5 V VDEN = 0 V RL = 25 Ω From VDS < 1 V; to IOUT = 0 A See Chapter 9.1 and Figure 15 Undervoltage shutdown hysteresis VS(UV)_HYS – 850 – mV 2) Operating current One channel active IGND_1 – 2 4 mA VIN = 5.5 V P_4.2.5 VDEN = 5.5 V Device in RDS(ON) VS = 36 V See Chapter 9.1 Operating current All channels active IGND_2 – 4 6 mA VIN = 5.5 V P_4.2.6 VDEN = 5.5 V Device in RDS(ON) VS = 36 V See Chapter 9.1 Standby current for whole device with load (ambient) IS(OFF) – 0.1 0.5 µA 1) Datasheet 8 – VS = 36 V VOUT = 0 V VIN floating VDEN floating TJ ≤ 85°C P_4.2.13 P_4.2.7 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA General Product Characteristics Table 4 Functional Range TJ = -40°C to 150°C; (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. IS(OFF)_150 – – 10 µA VS = 36 V VOUT = 0 V VIN floating VDEN floating TJ = 150°C P_4.2.10 Standby current for whole IS(OFF_DEN) device with load, diagnostic active – 0.6 – mA 2) P_4.2.8 Maximum standby current for whole device with load VS = 36 V VOUT = 0 V VIN floating VDEN = 5.5 V 1) Test at TJ = -40°C only 2) Not subject to production test. Specified by design. Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Thermal Resistance Table 5 Thermal Resistance Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Junction to case RthJC – 2 – K/W 1) P_4.3.1 Junction to ambient All channels active RthJA – 27 – K/W 1)2) P_4.3.2 1) Not subject to production test. Specified by design. 2) Specified RthJA value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board with 1 W power dissipation equally dissipated for both channels at TA=105°C ; The product (chip + package) was simulated on a 76.4 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad contacts the first inner copper layer. Please refer to Figure 4. 4.3.1 PCB Set-Up 70µm 1.5mm 35µm 0.3mm Figure 4 Datasheet PCB 2 s2p.vsd 2s2p PCB Cross Section 9 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA General Product Characteristics PCB bottom view PCB top view 1 14 2 13 3 12 COOLING TAB 4 11 VS 5 10 6 9 7 8 thermique SO14.vsd Figure 5 PC Board Top and Bottom View for Thermal Simulation with 600 mm2 Cooling Area 4.3.2 Thermal Impedance BTT6100-2ERA 100 ZthJA (K/W) TAMBIENT = 105°C 10 1 2s2p 1s0p - 600 mm² 1s0p - 300 mm² 1s0p - footprint 0,1 0,0001 Figure 6 Datasheet 0,001 0,01 0,1 1 Time (s) 10 100 1000 Typical Thermal Impedance. 2s2p PCB set-up according Figure 5 10 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA General Product Characteristics BTT6100-2ERA 100 1s0p - Tambient = 105°C 90 RthJA (K/W) 80 70 60 50 40 30 0 Figure 7 Datasheet 100 200 300 Cooling area (mm²) 400 500 600 Typical Thermal Resistance. PCB set-up 1s0p 11 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Power Stage 5 Power Stage The power stages are built using an N-channel vertical power MOSFET (DMOS) with charge pump. 5.1 Output ON-State Resistance The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature TJ. Figure 8 shows the dependencies in terms of temperature and supply voltage for the typical ON-state resistance. The behavior in reverse polarity is described in Chapter 6.4. 180 160 150 160 140 130 RDS(ON) [mΩ ] RDS(ON) [mΩ ] 140 120 100 120 110 100 90 80 80 60 40 -40 Figure 8 70 60 -20 0 20 40 60 80 100 Junction Temperature TJ [°C] 120 140 160 0 5 10 15 20 Supply Voltage VS [V] 25 30 35 Typical ON-State Resistance A high signal at the input pin (see Chapter 8) causes the power DMOS to switch ON with a dedicated slope, which is optimized in terms of EMC emission. 5.2 Turn ON/OFF Characteristics with Resistive Load Figure 9 shows the typical timing when switching a resistive load. IN VIN_H VIN_L t VOUT dV/dt ON dV/dt t ON 90% VS tOFF_delay 70% VS 30% VS 10% VS OFF tON_delay tOFF t Switching times.vsd Figure 9 Datasheet Switching a Resistive Load Timing 12 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Power Stage 5.3 Inductive Load 5.3.1 Output Clamping When switching OFF inductive loads with high side switches, the voltage VOUT drops below ground potential, because the inductance intends to continue driving the current. To prevent the destruction of the device by avalanche due to high voltages, there is a voltage clamp mechanism ZDS(AZ) implemented that limits negative output voltage to a certain level (VS - VDS(AZ)). Please refer to Figure 10 and Figure 11 for details. Nevertheless, the maximum allowed load inductance is limited. VS ZDS(AZ) IN VDS LOGIC IL VBAT GND VIN OUT L, RL ZGND VOUT Output_clamp.vsd Figure 10 Output Clamp IN t V OUT VS t V S-VDS(AZ) IL t Switching an inductance.vsd Figure 11 Datasheet Switching an Inductive Load Timing 13 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Power Stage 5.3.2 Maximum Load Inductance During demagnetization of inductive loads, energy has to be dissipated in the BTT6100-2ERA. This energy can be calculated with following equation: RL ⋅ IL L V S – V DS ( AZ-) E = V DS ( AZ ) ⋅ ------ ⋅ -----------------------------⋅ ln ⎛ 1 – -------------------------------⎞ + I L ⎝ V S – V DS ( AZ )⎠ RL RL (5.1) Following equation simplifies under the assumption of RL = 0 Ω. VS 2 1 -⎞ E = --- ⋅ L ⋅ I ⋅ ⎛⎝ 1 – -----------------------------2 V S – V DS ( AZ )⎠ (5.2) EAS (mJ) The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 12 for the maximum allowed energy dissipation as a function of the load current. 100 10 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 IL(A) Figure 12 Datasheet Maximum Energy Dissipation Single Pulse, TJ_START = 150°C; VS = 28 V 14 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Power Stage 5.4 Inverse Current Capability In case of inverse current, meaning a voltage VINV at the OUTput higher than the supply voltage VS, a current IINV will flow from output to VS pin via the body diode of the power transistor (please refer to Figure 13). The output stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that particular case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current IINV should not be higher than IL(INV). If the channel is OFF, the diagnostic will detect an open load at OFF. If the affected channel is ON, the diagnostic will detect open load at ON (the overtemperature signal is inhibited). At the appearance of VINV, a parasitic diagnostic can be observed. After, the diagnosis is valid and reflects the output state. At VINV vanishing, the diagnosis is valid and reflects the output state. During inverse current, no protection functions are available. VBAT VS Gate driver Device logic INV Comp. IL(INV) VINV OUT GND ZGND inverse current.vsd Figure 13 Datasheet Inverse Current Circuitry 15 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Power Stage 5.5 Electrical Characteristics Power Stage Table 6 Electrical Characteristics: Power Stage VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V , TJ = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Number Test Condition ON-state resistance per channel RDS(ON)_150 150 180 200 mΩ IL = IL4 = 2 A VIN = 4.5 V TJ = 150 °C See Figure 8 P_5.5.1 ON-state resistance per channel RDS(ON)_25 – 100 – mΩ 1) P_5.5.21 1) TJ = 25°C Nominal load current One channel active IL(NOM)1 – 2.6 – A Nominal load current All channels active IL(NOM)2 – 2.2 – A Output voltage drop limitation at VDS(NL) small load currents – 10 22 mV IL = IL0 = 50 mA P_5.5.4 See Chapter 9.3 Drain to source clamping voltage VDS(AZ) VDS(AZ) = [VS - VOUT] 65 70 75 V IDS = 20 mA P_5.5.5 See Figure 11 See Chapter 9.1 Output leakage current per channel TJ ≤ 85°C IL(OFF) – 0.1 0.5 µA 2) VIN floating VOUT = 0 V TJ ≤ 85°C P_5.5.6 Output leakage current per channel TJ = 150°C IL(OFF)_150 – 1 5 µA VIN floating VOUT = 0 V TJ = 150°C P_5.5.8 Slew rate 30% to 70% VS dV/dtON 0.3 0.8 1.3 V/µs Slew rate 70% to 30% VS -dV/dtOFF 0.3 0.8 1.3 V/µs P_5.5.11 RL = 25 Ω VS = 28 V See Figure 9 P_5.5.12 See Chapter 9.1 Slew rate matching dV/dtON - dV/dtOFF ΔdV/dt -0.15 0 0.15 V/µs P_5.5.13 Turn-ON time to VOUT = 90% VS tON 20 70 150 µs P_5.5.14 Turn-OFF time to VOUT = 10% VS tOFF 20 70 150 µs P_5.5.15 Turn-ON / OFF matching tOFF - tON ΔtSW -50 0 50 µs P_5.5.16 Turn-ON time to VOUT = 10% VS tON_delay – 35 70 µs P_5.5.17 Turn-OFF time to VOUT = 90% VS tOFF_delay – 35 70 µs P_5.5.18 Datasheet 16 TA= 85°C TJ < 150°C P_5.5.2 P_5.5.3 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Power Stage Table 6 Electrical Characteristics: Power Stage (cont’d) VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V , TJ = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Number Test Condition 1) Switch ON energy EON – 320 – µJ RL = 25 Ω P_5.5.19 VOUT = 90% VS VS = 36 V See Chapter 9.1 Switch OFF energy EOFF – 371 – µJ 1) RL = 25 Ω P_5.5.20 VOUT = 10% VS VS = 36 V See Chapter 9.1 1) Not subject to production test, specified by design. 2) Test at TJ = -40°C only Datasheet 17 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Protection Functions 6 Protection Functions The device provides integrated protection functions. These functions are designed to prevent the destruction of the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are designed for neither continuous nor repetitive operation. 6.1 Loss of Ground Protection In case of loss of the module ground and the load remains connected to ground, the device protects itself by automatically turning OFF (when it was previously ON) or remains OFF, regardless of the voltage applied on IN pins. In case of loss of device ground, it’s recommended to use input resistors between the microcontroller and the BTT6100-2ERA to ensure switching OFF of channels. In case of loss of module or device ground, a current (IOUT(GND)) can flow out of the DMOS. Figure 14 sketches the situation. ZGND is recommended to be a resistor in series to a diode . ZIS(AZ) VS ZD(AZ) IS RSENSE DSEL DEN IN0 RDSEL RDEN RIN VBAT ZDS(AZ) LOGIC IOUT(GND) IN1 RIN OUT GND ZDESD ZGND RIS L, RL RIS Loss of ground protection.vsd Figure 14 Loss of Ground Protection with External Components 6.2 Undervoltage Protection Between VS(UV) and VS(OP), the undervoltage mechanism is triggered. VS(OP) represents the minimum voltage where the switching ON and OFF can takes place. VS(UV) represents the minimum voltage the switch can hold ON. If the supply voltage is below the undervoltage mechanism VS(UV), the device is OFF (turns OFF). As soon as the supply voltage is above the undervoltage mechanism VS(OP), then the device can be switched ON. When the switch is ON, protection functions are operational. Nevertheless, the diagnosis is not guaranteed until VS is in the VNOM range. Figure 15 sketches the undervoltage mechanism. Datasheet 18 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Protection Functions VOUT undervoltage behavior .vsd VS(UV) Figure 15 Undervoltage Behavior 6.3 Overvoltage Protection VS VS(OP) There is an integrated clamp mechanism for overvoltage protection (ZD(AZ)). To guarantee this mechanism operates properly in the application, the current in the Zener diode has to be limited by a ground resistor. Figure 16 shows a typical application to withstand overvoltage issues. In case of supply voltage higher than VS(AZ), the power transistor switches ON and in addition the voltage across the logic section is clamped. As a result, the internal ground potential rises to VS - VS(AZ). Due to the ESD Zener diodes, the potential at pin INx, DSEL, and DEN rises almost to that potential, depending on the impedance of the connected circuitry. In the case the device was ON, prior to overvoltage, the BTT6100-2ERA remains ON. In the case the BTT6100-2ERA was OFF, prior to overvoltage, the power transistor can be activated. In the case the supply voltage is in above VBAT(SC) and below VDS(AZ), the output transistor is still operational and follows the input. If at least one channel is in the ON state, parameters are no longer guaranteed and lifetime is reduced compared to the nominal supply voltage range. This especially impacts the short circuit robustness, as well as the maximum energy EAS capability. ZGND is recommended to be a resistor in series to a diode. ISOV ZIS(AZ) VS IS RSENSE DSEL DEN RDSEL RDEN RIN IN0 ZD(AZ) VBAT ZDS(AZ) LOGIC IN1 RIN OUT ZDESD GND RIS L, RL ZGND Overvoltage protection.vsd Figure 16 Datasheet Overvoltage Protection with External Components 19 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Protection Functions 6.4 Reverse Polarity Protection In case of reverse polarity, the intrinsic body diodes of the power DMOS causes power dissipation. The current in this intrinsic body diode is limited by the load itself. Additionally, the current into the ground path and the logic pins has to be limited to the maximum current described in Chapter 4.1 with an external resistor. Figure 17 shows a typical application. RGND resistor is used to limit the current in the Zener protection of the device. Resistors RDSEL, RDEN, and RIN are used to limit the current in the logic of the device and in the ESD protection stage. RSENSE is used to limit the current in the sense transistor which behaves as a diode. The recommended value for RDEN = RDSEL = RIN = RSENSE = 10 kΩ. ZGND is recommended to be a resistor in series to a diode. During reverse polarity, no protection functions are available. Microcontroller protection diodes VS ZIS(AZ) IS RSENSE DSEL DEN RDSEL RDEN RIN IN0 ZD(AZ) ZDS(AZ) VDS(REV) LOGIC -VS(REV) IN1 RIN OUT ZDESD GND RIS ZGND L, RL Reverse Polarity.vsd Figure 17 Reverse Polarity Protection with External Components 6.5 Overload Protection In case of overload, such as high inrush of cold lamp filament, or short circuit to ground, the BTT6100-2ERA offers several protection mechanisms. 6.5.1 Current Limitation At first step, the instantaneous power in the switch is maintained at a safe value by limiting the current to the maximum current allowed in the switch IL(SC). During this time, the DMOS temperature is increasing, which affects the current flowing in the DMOS. 6.5.2 Temperature Limitation in the Power DMOS Each channel incorporates both an absolute (TJ(SC)) and a dynamic (TJ(SW)) temperature sensor. Activation of either sensor will cause an overheated channel to switch OFF to prevent destruction. Any protective switch OFF latches the output until the temperature has reached an acceptable value. Figure 18 gives a sketch of the situation. No retry strategy is implemented such that when the DMOS temperature has cooled down enough, the switch is switched ON again. Only the IN pin signal toggling can re-activate the power stage (latch behavior). Datasheet 20 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Protection Functions IN t IL LOAD CURRENT LIMITATION PHASE IL(x)SC LOAD CURRENT BELOW LIMITATION PHASE IL(NOM) t TDMOS TJ(SC) Temperature protection phase ΔTJ(SW) TA tsIS(FAULT) t tsIS(OC_blank) IIS IIS(FAULT) IL(NOM) / kILIS 0A VDEN t tsIS(OF F) 0V t Hard start.vsd Figure 18 Overload Protection Note: For better understanding, the time scale is not linear. The real timing of this drawing is application dependant and cannot be described. Datasheet 21 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Protection Functions 6.6 Electrical Characteristics for the Protection Functions Table 7 Electrical Characteristics: Protection VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V , TJ = 25°C Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. IOUT(GND) – 0.1 – mA 1)2) VS = 28 V See Figure 14 P_6.6.1 VDS(REV) 200 650 700 mV 3) IL = - 2 A TJ = 150°C See Figure 17 P_6.6.2 VS(AZ) 65 70 75 V ISOV = 5 mA See Figure 16 P_6.6.3 Load current limitation IL5(SC) 20 25 30 A 4) VDS = 5 V See Figure 18 and Chapter 9.3 P_6.6.4 Dynamic temperature increase while switching ΔTJ(SW) – 80 – K 5) See Figure 18 P_6.6.8 Thermal shutdown temperature TJ(SC) 150 170 5) 200 5) °C 3) See Figure 18 P_6.6.10 Thermal shutdown hysteresis ΔTJ(SC) – 30 – K 2) Loss of Ground Output leakage current while GND disconnected Reverse Polarity Drain source diode voltage during reverse polarity Overvoltage Overvoltage protection Overload Condition 1) 2) 3) 4) 5) P_6.6.11 All pins are disconnected except VS and OUT. Not Subject to production test, specified by design Test at TJ = +150°C only Test at TJ = -40°C only Functional test only Datasheet 22 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7 Diagnostic Functions For diagnosis purposes, the BTT6100-2ERA provides a combination of digital and analog signals at pin IS. These signals are called SENSE. In case the diagnostic is disabled via DEN, pin IS becomes high impedance. In case DEN is activated, the sense current of the channel X is enabled/disabled via associated pin DSEL. Table 8 gives the truth table. Table 8 Diagnostic Truth Table DEN DSEL IS 0 don’t care Z 1 0 Sense output 0 IIS(0) 1 1 Sense output 1 IIS(1) 7.1 IS Pin The BTT6100-2ERA provides a sense signal called IIS at pin IS. As long as no “hard” failure mode occurs (short circuit to GND / current limitation / overtemperature / excessive dynamic temperature increase or open load at OFF) a proportional signal to the load current (ratio kILIS = IL / IIS) is provided. The complete IS pin and diagnostic mechanism is described in Figure 19. The accuracy of the sense current depends on temperature and load current. The sense pin multiplexes the currents IIS(0) and IIS(1) via the pin DSEL. Thanks to this multiplexing, the matching between kILISCHANNEL0 and kILISCHANNEL1 is optimized. Due to the ESD protection, in connection to VS, it is not recommended to share the IS pin with other devices if these devices are using another battery feed. The consequence is that the unsupplied device would be fed via the IS pin of the supplied device. VS IIS0 = IL0 / kILIS IIS(FAULT) IIS1 = IL1 / kILIS ZIS(AZ) 0 1 IS FAULT 0 1 DEN DSEL Figure 19 Datasheet Sens e s che ma ti c.vs d Diagnostic Block Diagram 23 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7.2 SENSE Signal in Different Operating Modes Table 9 gives a quick reference for the state of the IS pin during device operation. Table 9 Sense Signal, Function of Operation Mode Operation Mode Input level Channel X DEN1) Output Level Diagnostic Output Normal operation OFF H Z Z Short circuit to GND ~ GND Z Overtemperature Z Z Short circuit to VS VS IIS(FAULT) Open Load < VOL(OFF) > VOL(OFF)2) Z IIS(FAULT) Inverse current ~ VINV IIS(FAULT) ~ VS IIS = IL/kILIS Current limitation < VS IIS(FAULT) Short circuit to GND ~ GND IIS(FAULT) Overtemperature TJ(SW) event Z IIS(FAULT) Short circuit to VS VS Normal operation ON IIS < IL / kILIS 3) Open Load ~ VS Inverse current ~ VINV IIS < IIS(OL)4) Underload ~ VS5) IIS (OL)< IIS < IL / kILIS Don’t care Z Don’t care 1) 2) 3) 4) 5) Don’t care L IIS < IIS(OL) The table doesn’t indicate but it is assumed that the appropriate channel is selected via the DSEL pins. Stable with additional pull-up resistor. The output current has to be smaller than IL(OL). After maximum tINV. The output current has to be higher than IL(OL). Datasheet 24 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7.3 SENSE Signal in the Nominal Current Range Figure 20 and Figure 21 show the current sense as a function of the load current in the power DMOS. Usually, a pull-down resistor RIS is connected to the current sense IS pin. This resistor has to be higher than 560 Ω to limit the power losses in the sense circuitry. A typical value is 1.2 kΩ. The blue curve represents the ideal sense current, assuming an ideal kILIS factor value. The red curves shows the accuracy the device provides across full temperature range at a defined current. 5 4.5 4 3.5 IIS [mA] 3 2.5 2 1.5 1 0.5 0 min/max Sense Current typical Sense Current 0 0.5 1 1.5 2 IL [A] 2.5 BTT6100-2EKA BTT6100-2ERA Figure 20 Current Sense for Nominal Load 7.3.1 SENSE Signal Variation as a Function of Temperature and Load Current In some applications a better accuracy is required at smaller currents. To achieve this accuracy requirement, a calibration on the application is possible. To avoid multiple calibration points at different load and temperature conditions, the BTT6100-2ERA allows limited derating of the kILIS value, at a given point (IL3; TJ = +25°C). This derating is described by the parameter ΔkILIS. Figure 21 shows the behavior of the sense current, assuming one calibration point at nominal load at +25°C. The blue line indicates the ideal kILIS ratio. The green lines indicate the derating on the parameter across temperature and voltage, assuming one calibration point at nominal temperature and nominal battery voltage. The red lines indicate the kILIS accuracy without calibration. 1000 calibrated k ILIS min/max kILIS 900 typical k ILIS 800 k ILIS 700 600 500 400 300 0 0.5 1 1.5 IL [A] Figure 21 Datasheet 2 2.5 BTT6100-2EKA BTT6100-2ERA Improved Current Sense Accuracy with One Calibration Point at 0.4 A 25 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7.3.2 SENSE Signal Timing Figure 22 shows the timing during settling and disabling of the SENSE. VINx t ILx tONx tOFFx tONx 90% of IL static t VDEN IIS tsIS(LC) tsIS(ON) 90% of IIS static tsIS(OFF) t tsIS(chC) tsIS(ON_DEN) t VDSEL t VINy t ILy tONy t current sense settling disabling time .vsd Figure 22 Datasheet Current Sense Settling / Disabling Timing 26 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7.3.3 SENSE Signal in Open Load 7.3.3.1 Open Load in ON Diagnostic If the channel is ON, a leakage current can still flow through an open load, for example due to humidity. The parameter IL(OL) gives the threshold of recognition for this leakage current. If the current IL flowing out the power DMOS is below this value, the device recognizes a failure, if the DEN (and DSEL) is selected. In that case, the SENSE current is below IIS(OL). Otherwise, the minimum SENSE current is given above parameter IIS(OL). Figure 23 shows the SENSE current behavior in this area. The red curve shows a typical product curve. The blue curve shows the ideal current sense. I IS IIS(OL) IL IL(OL) Sense for OL .vsd Figure 23 Current Sense Ratio for Low Currents 7.3.3.2 Open Load in OFF Diagnostic For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For the calculation of pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) have to be taken into account. Figure 24 gives a sketch of the situation. Ileakage defines the leakage current in the complete system, including IL(OFF) (see Chapter 5.5) and external leakages, e.g, due to humidity, corrosion, etc... in the application. To reduce the stand-by current of the system, an open load resistor switch SOL is recommended. If the channel x is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is recognized by the device as an open load. The voltage threshold is given by VOL(OFF). In that case, the SENSE signal is switched to the IIS(FAULT). An additional RPD resistor can be used to pull VOUT to 0 V. Otherwise, the OUT pin is floating. This resistor can be used as well for short circuit to battery detection, see Chapter 7.3.4. Datasheet 27 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions Vbat SOL VS IIS(FAULT) ROL OL comp. OUT IS ILOFF Ileakage GND RIS VOL(OFF) ZGND Rleakage RPD Open Load in OFF.vsd Figure 24 Open Load Detection in OFF Electrical Equivalent Circuit 7.3.3.3 Open Load Diagnostic Timing Figure 25 shows the timing during either Open Load in ON or OFF condition when the DEN pin is HIGH. Please note that a delay tsIS(FAULT_OL_OFF) has to be respected after the falling edge of the input, when applying an open load in OFF diagnosis request, otherwise the diagnosis can be wrong. Load is present Open load VIN VOUT t VS-V OL(OFF) RDS(ON) x IL shutdown with load t IOUT IIS tsIS(FAULT_OL_ON_OFF) Error Settling Disabling Time.vsd Figure 25 Datasheet t tsIS(LC) t Sense Signal in Open Load Timing 28 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7.3.4 SENSE Signal with OUT in Short Circuit to VS In case of a short circuit between the OUTput-pin and the VS pin, all or portion (depending on the short circuit impedance) of the load current will flow through the short circuit. As a result, a lower current compared to the normal operation will flow through the DMOS of the BTT6100-2ERA, which can be recognized at the current sense signal. The open load at OFF detection circuitry can also be used to distinguish a short circuit to VS. In that case, an external resistor to ground RSC_VS is required. Figure 26 gives a sketch of the situation. Vbat VS IIS(FAULT) VBAT OL Comp. IS OUT VOL(OFF) GND RIS RSC_VS ZGND Short circuit to Vs.vsd Figure 26 Short Circuit to Battery Detection in OFF Electrical Equivalent Circuit 7.3.5 SENSE Signal in Case of Overload An overload condition is defined by a current flowing out of the DMOS reaching the current limitation and / or the absolute dynamic temperature swing TJ(SW) is reached, and / or the junction temperature reaches the thermal shutdown temperature TJ(SC). Please refer to Chapter 6.5 for details. In that case, the SENSE signal given is by IIS(FAULT) when the diagnostic is selected. The device has a thermal latch behavior, such that when the overtemperature or the exceed dynamic temperature condition has disappeared, the DMOS is reactivated only when the IN is toggled LOW to HIGH. If the DEN pin is activated, and DSEL pin is selected to the correct channel, the SENSE follows the output stage. If no reset of the latch occurs, the device remains in the latching phase and IIS(FAULT) at the IS pin, even though the DMOS is OFF. 7.3.6 SENSE Signal in Case of Inverse Current In the case of inverse current, the sense signal of the affected channel will indicate open load in OFF state and indicate open load in ON state. The unaffected channels indicate normal behavior as long as the IINV current is not exceeding the maximum value specified in Chapter 5.4. Datasheet 29 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions 7.4 Electrical Characteristics Diagnostic Function Table 10 Electrical Characteristics: Diagnostics VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V, TJ = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Load Condition Threshold for Diagnostic Open load detection threshold in OFF state VS- VOL(OFF) 4 – 6 V 1) VIN = 0 V VDEN = 4.5 V See Figure 25 P_7.5.1 Open load detection threshold in ON state IL(OL) 5 – 25 mA VIN = VDEN = 4.5 V IIS(OL) = 22.5 μA See Figure 23 See Chapter 9.4 P_7.5.2 – 0.02 1 µA 1) VIN = 4.5 V VDEN = 0 V IL = IL4 = 2 A P_7.5.4 Sense Pin IS pin leakage current when IIS_(DIS) sense is disabled Sense signal saturation voltage VS- VIS (RANGE) 1 – 3.5 V VIN = 0 V VOUT = VS > 10 V VDEN = 4.5 V IIS = 6 mA See Chapter 9.4 P_7.5.6 Sense signal maximum current in fault condition IIS(FAULT) 6 15 35 mA VIS = VIN = VDSEL = 0 V VOUT = VS > 10 V VDEN = 4.5 V See Figure 19 See Chapter 9.4 P_7.5.7 65 70 75 V IIS = 5 mA See Figure 19 P_7.5.3 Sense pin maximum voltage VIS(AZ) Current Sense Ratio Signal in the Nominal Area, Stable Load Current Condition Current sense ratio IL0 = 50 mA kILIS0 -50% 660 +50% Current sense ratio IL1 = 0.1 A kILIS1 -40% 600 +40% Current sense ratio IL2 = 0.4 A kILIS2 -15% 600 +15% P_7.5.10 Current sense ratio IL3 = 1 A kILIS3 -11% 600 +11% P_7.5.11 Current sense ratio IL4 = 2 A kILIS4 -9% 600 +9% P_7.5.12 kILIS derating with current and temperature ΔkILIS -8 0 +8 Datasheet 30 VIN = 4.5 V VDEN = 4.5 V See Figure 20 TJ = -40°C; 150°C % 2) kILIS3 versus kILIS2 See Figure 21 P_7.5.8 P_7.5.9 P_7.5.17 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions Table 10 Electrical Characteristics: Diagnostics (cont’d) VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V, TJ = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Current sense settling time tsIS(ON) to kILIS function stable after positive input slope on both INput and DEN – – 150 µs VDEN = VIN = 0 to 4.5 V P_7.5.18 VS = 28 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL3 = 1 A See Figure 22 Current sense settling time tsIS(ON_DEN) with load current stable and transition of the DEN – – 10 µs 1) VIN = 4.5 V VDEN = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL3 = 1 A See Figure 22 P_7.5.19 Current sense settling time to IIS stable after positive input slope on current load – – 15 µs 1) VIN = 4.5 V VDEN = 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL= IL2 = 0.4 A to IL = IL3 = 1 A See Figure 22 P_7.5.20 – 50 µs 1) VIN = 0V VDEN = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VOUT = VS = 28 V P_7.5.22 200 – µs 2) VIN = 4.5 to 0V VDEN = 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VOUT = VS = 28 V See Figure 25 P_7.5.23 – 150 µs 1) 3) 4) P_7.5.24 Diagnostic Timing in Normal Condition tsIS(LC) 2) Diagnostic Timing in Open Load Condition Current sense settling time to IIS stable for open load detection in OFF state Current sense settling time to IIS stable for open load detection in ON-OFF transition tsIS(FAULT_OL_ – OFF) tsIS(FAULT_OL_ – ON_OFF) Diagnostic Timing in Overload Condition Current sense settling time to IIS stable for overload detection Datasheet tsIS(FAULT) – VIN = VDEN = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VDS = 5 V See Figure 18 31 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Diagnostic Functions Table 10 Electrical Characteristics: Diagnostics (cont’d) VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V, TJ = 25°C Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Current sense over current blanking time tsIS(OC_blank) – 350 – µs 2) VIN = VDEN = 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF VDS = 5 V to 0 V See Figure 18 P_7.5.32 Diagnostic disable time DEN transition to IIS < 50% IL /kILIS tsIS(OFF) – – 20 µs 1) VIN = 4.5 V VDEN = 4.5 V to 0 V RIS = 1.2 kΩ CSENSE < 100 pF IL = IL3 = 1 A See Figure 22 P_7.5.25 Current sense settling time tsIS(ChC) from one channel to another – – 20 µs VIN0 = VIN1 = 4.5 V VDEN = 4.5 V VDSEL = 0 to 4.5 V RIS = 1.2 kΩ CSENSE < 100 pF IL(OUT0) = IL3 = 1 A IL(OUT1) = IL2 = 0.4 A See Figure 22 P_7.5.26 1) 2) 3) 4) DSEL pin select channel 0 only. Not subject to production test, specified by design Functional Test only Test at TJ = -40°C only Datasheet 32 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Input Pins 8 Input Pins 8.1 Input Circuitry The input circuitry is compatible with 3.3 and 5 V microcontrollers. The concept of the input pin is to react to voltage thresholds. An implemented Schmitt trigger avoids any undefined state if the voltage on the input pin is slowly increasing or decreasing. The output is either OFF or ON but cannot be in a linear or undefined state. The input circuitry is compatible with PWM applications. Figure 27 shows the electrical equivalent input circuitry. In case the pin is not needed, it must be left opened, or must be connected to device ground (and not module ground) via a 10 kΩ input resistor. IN GND Figure 27 Input Pin Circuitry 8.2 DEN / DSEL Pin Input circuitry .vsd The DEN and DSEL pins enable and disable the diagnostic functionality of the device. The pins have the same structure as the INput pins, please refer to Figure 27. 8.3 Input Pin Voltage The IN, DSEL and DEN use a comparator with hysteresis. The switching ON / OFF takes place in a defined region, set by the thresholds VIN(L) Max. and VIN(H) Min. The exact value where the ON and OFF take place are unknown and depends on the process, as well as the temperature. To avoid cross talk and parasitic turn ON and OFF, a hysteresis is implemented. This ensures a certain immunity to noise. Datasheet 33 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Input Pins 8.4 Electrical Characteristics Table 11 Electrical Characteristics: Input Pins VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified). Typical values are given at VS = 28 V, TJ = 25°C Parameter Symbol Values Unit Note or Test Condition Number See Chapter 9.5 P_8.4.1 P_8.4.2 Min. Typ. Max. -0.3 – 0.8 V 2 – 6 V See Chapter 9.5 INput Pins Characteristics Low level input voltage range VIN(L) High level input voltage range VIN(H) Input voltage hysteresis VIN(HYS) – 250 – mV 1) Low level input current IIN(L) 1 10 25 µA VIN = 0.8 V P_8.4.4 High level input current IIN(H) 2 10 25 µA VIN = 5.5 V See Chapter 9.5 P_8.4.5 VDEN(L) -0.3 – 0.8 V – P_8.4.6 2 – 6 V – P_8.4.7 P_8.4.8 See Chapter 9.5 P_8.4.3 DEN Pin Low level input voltage range High level input voltage range VDEN(H) Input voltage hysteresis VDEN(HYS) – 250 – mV 1) Low level input current IDEN(L) 1 10 25 µA VDEN = 0.8 V P_8.4.9 High level input current IDEN(H) 2 10 25 µA VDEN = 5.5 V P_8.4.10 VDSEL(L) -0.3 – 0.8 V – P_8.4.11 2 – 6 V – P_8.4.12 P_8.4.13 DSEL Pin Low level input voltage range High level input voltage range VDSEL(H) Input voltage hysteresis VDSEL(HYS) – 250 – mV 1) Low level input current IDSEL(L) 1 10 25 µA VDSEL = 0.8 V P_8.4.14 High level input current IDSEL(H) 2 10 25 µA VDSEL = 5.5 V P_8.4.15 1) Not subject to production test, specified by design Datasheet 34 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Characterization Results 9 Characterization Results The characterization has been performed on 3 lots, with 3 devices each. Characterization has been performed at 8 V, 28 V and 36 V over temperature range. 9.1 General Product Characteristics P_4.2.3 P_4.2.4 5.000 5.000 4.800 4.500 4.600 4.400 4.000 [V] [V] 4.200 4.000 3.500 3.800 3.000 3.600 8V 3.400 28V 2.500 8V 36V 28V 3.200 36V 2.000 3.000 -50 -25 0 25 50 75 100 125 -50 150 -25 0 25 50 75 100 125 150 Temperature [°C] Temperature [°C] Minimum Functional Supply Voltage VS(OP)_MIN = f(TJ) Undervoltage Threshold VS(UV) = f(TJ) P_4.2.6 P_4.2.7, P_4.2.10 3.000 4.500 4.000 2.500 3.500 2.000 3.000 [µA] [mA] 2.500 1.500 2.000 1.000 1.500 8V 1.000 28V 8V 0.500 36V 0.500 28V 36V 0.000 0.000 -50 -25 0 25 50 75 100 125 -50 150 Temperature [°C] Current Consumption for Whole Device with Load Channels Active IGND_2 = f(TJ;VS) Datasheet -25 0 25 50 75 100 125 150 Temperature [°C] Standby Current for Whole Device with Load IS(OFF)= f(TJ;VS) 35 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Characterization Results 9.2 Power Stage P_5.5.5 20.000 75.000 18.000 74.000 16.000 73.000 14.000 72.000 12.000 71.000 [V] [mV] P_5.5.4 10.000 70.000 8.000 69.000 6.000 68.000 4.000 67.000 8V 28V 2.000 8V 28V 66.000 36V 36V 0.000 65.000 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 Temperature [°C] 50 75 100 125 150 Temperature [°C] Drain to Source Clamp Voltage VDS(AZ) = f(TJ) P_5.5.11 P_5.5.12 2.000 2.000 1.800 1.800 1.600 1.600 1.400 1.400 1.200 1.200 [V/µs] [V/µs] Output Voltage Drop Limitation at Low Load Current VDS(NL) = f(TJ) 1.000 1.000 0.800 0.800 0.600 0.600 0.400 0.400 8V 28V 0.200 8V 28V 0.200 36V 36V 0.000 0.000 -50 -25 0 25 50 75 100 125 150 -50 Temperature [°C] Slew Rate at Turn ON dV/dtON = f(TJ;VS), RL = 25 Ω Datasheet -25 0 25 50 75 100 125 150 Temperature [°C] Slew Rate at Turn OFF -dV/dtOFF = f(TJ;VS), RL = 25 Ω 36 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Characterization Results P_5.5.14 P_5.5.15 80.000 90.000 70.000 80.000 70.000 60.000 60.000 50.000 [µs] [µs] 50.000 40.000 40.000 30.000 30.000 20.000 20.000 8V 10.000 8V 28V 28V 10.000 36V 36V 0.000 0.000 -50 -25 0 25 50 75 100 125 -50 150 -25 0 25 Temperature [°C] 50 75 100 125 150 Temperature [°C] Turn ON tON = f(TJ;VS), RL = 25 Ω Turn OFF tOFF = f(TJ;VS), RL = 25 Ω P_5.5.19 P_5.5.20 450.000 500 400.000 450 400 350.000 350 300.000 300 [µJ] [µJ] 250.000 250 200.000 200 150.000 150 100.000 100 8V 50.000 28V 8V 28V 50 36V 36V 0.000 0 -50 -25 0 25 50 75 100 125 -50 150 Temperature [°C] Switch ON Energy EON = f(TJ;VS), RL = 25 Ω Datasheet -25 0 25 50 75 100 125 150 Temperature [°C] Switch OFF Energy EOFF = f(TJ;VS), RL = 25 Ω 37 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Characterization Results 9.3 Protection Functions P_6.6.4 25.000 20.000 [A] 15.000 10.000 5.000 8V 28V 36V 0.000 -50 -25 0 25 50 75 100 125 150 Temperature [°C] Overload Condition in the Low Voltage Area IL5(SC) = f(TJ) Datasheet 38 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Characterization Results 9.4 Diagnostic Mechanism P_7.5.2 16.000 1.400 1.200 15.000 1.000 14.000 [µA] [mA] 0.800 13.000 0.600 12.000 0.400 8V 0.200 8V 11.000 28V 28V 36V 36V 0.000 10.000 -50 -25 0 25 50 75 100 125 -50 150 -25 0 25 Temperature [°C] 50 75 100 125 Current Sense at no Load IIS = f(TJ;VS), IL = 0 A Open Load Detection ON State Threshold IL(OL)= f(TJ) P_7.5.3 P_7.5.7 75.000 20.000 74.000 18.000 73.000 16.000 72.000 14.000 71.000 12.000 [mA] [V] 150 Temperature [°C] 70.000 10.000 69.000 8.000 68.000 6.000 67.000 4.000 8V 28V 66.000 8V 28V 2.000 36V 36V 65.000 0.000 -50 -25 0 25 50 75 100 125 -50 150 Temperature [°C] Sense Signal Maximum Voltage VIS(AZ) = f(TJ) Datasheet -25 0 25 50 75 100 125 150 Temperature [°C] Sense Signal Maximum Current in Fault Condition IIS(FAULT)= f(TJ; VS) 39 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Characterization Results 9.5 Input Pins P_8.4.1 P_8.4.2 1.500 1.800 1.450 1.750 1.400 1.700 1.350 1.650 [V] [V] 1.300 1.250 1.200 1.600 1.550 1.150 1.500 1.100 8V 8V 1.450 28V 1.050 28V 36V 36V 1.000 1.400 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 Temperature [°C] 50 75 100 125 150 Temperature [°C] Input Voltage Threshold VIN(L)= f(TJ;VS) Input Voltage Threshold VIN(H)= f(TJ;VS) P_8.4.3 P_8.4.5 500.000 16.000 450.000 14.000 400.000 12.000 350.000 10.000 [µA] [mV] 300.000 250.000 200.000 8.000 6.000 150.000 4.000 100.000 8V 8V 2.000 28V 50.000 28V 36V 36V 0.000 0.000 -50 -25 0 25 50 75 100 125 150 -50 Temperature [°C] Input Voltage Hysteresis VIN(HYS)= f(TJ;VS) Datasheet -25 0 25 50 75 100 125 150 Temperature [°C] Input Current High Level IIN(H)= f(TJ) 40 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. VBAT Voltage Regulator OUT CVDD T1 VS GND Z CVS ROL VS VDD GPIO RDEN DEN GPIO RDSEL DSEL OUT0 Microcontroller IN0 GPIO RIN IN1 OUT4 COUT RPD GPIO RIN Valve OUT1 IS RSENSE RPD ADC IN GND COUT Bulb GND RIS RGND CSENSE D Figure 28 Application Diagram with BTT6100-2ERA Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Table 12 Bill of Material Reference Value Purpose RIN 10 kΩ Protection of the microcontroller during overvoltage, reverse polarity Guarantee BTT6100-2ERA channels OFF during loss of ground RDEN 10 kΩ Protection of the microcontroller during overvoltage, reverse polarity RDSEL 10 kΩ Protection of the microcontroller during overvoltage, reverse polarity RPD 47 kΩ Polarization of the output for short circuit to VS detection Improve BTT6100-2ERA immunity to electromagnetic noise Datasheet 41 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Application Information Table 12 Bill of Material (cont’d) Reference Value Purpose ROL 1.5 kΩ Ensures polarization of the BTT6100-2ERA output during open load in OFF diagnostic RIS 1.2 kΩ Sense resistor RSENSE 4.7 kΩ Overvoltage, reverse polarity, loss of ground. Value to be tuned with micro controller specification. CSENSE 100 pF Sense signal filtering. COUT 10 nF Protection of the device during ESD and BCI T1 Dual NPN/PNP Switch the battery voltage for open load in OFF diagnostic RGND 27 Ω Protection of the BTT6100-2ERA during overvoltage D BAS21 Protection of the BTT6100-2ERA during reverse polarity Z 58 V Zener diode Protection of the device during overvoltage CVS 100 nF 10.1 Further Application Information Filtering of voltage spikes at the battery line • Please contact us to get the pin FMEA • Existing App. Notes • For further information you may visit www.infineon.com Datasheet 42 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Package Outlines Package Outlines 0.25 GAUGE PLANE 1.15 MAX. 1) 8.65±0.1 14x COPLANARITY 0° SEATING PLANE ... 8 ° 0.05±0.05 STANDOFF 1) 3.9±0.1 (0.2) (0.95) 11 0.67±0.25 6±0.2 2) 14x 14 INDEX MARKING 1 BOTTOM VIEW 8 7 8 14 7 1 2.65±0.1 0.4±0.05 6.4±0.1 1.27 All dimensions are in units mm The drawing is in compliance with ISO 128-30, Projection Method 1[ ] 1) Does not Include plastic or metal protrusion of 0.15 max. per side 2) Dambar protrusion shall be maximum 0.1mm total in excess of width lead width Figure 29 PG-TDSO-14 (Plastic Dual Small Outline Package) (RoHS-Compliant) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). Datasheet 43 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Revision History 12 Revision History Version Date Changes 1.00 2019-03-09 Creation of the datasheet Datasheet 44 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3.1 3.2 3.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4.1 4.2 4.3 4.3.1 4.3.2 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 PCB Set-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 5.1 5.2 5.3 5.3.1 5.3.2 5.4 5.5 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output ON-State Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Turn ON/OFF Characteristics with Resistive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverse Current Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 12 12 13 13 14 15 16 6 6.1 6.2 6.3 6.4 6.5 6.5.1 6.5.2 6.6 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Loss of Ground Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Limitation in the Power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics for the Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 18 19 20 20 20 20 22 7 7.1 7.2 7.3 7.3.1 7.3.2 7.3.3 7.3.3.1 7.3.3.2 7.3.3.3 7.3.4 7.3.5 7.3.6 7.4 Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Different Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in the Nominal Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal Variation as a Function of Temperature and Load Current . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load in ON Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load in OFF Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load Diagnostic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal with OUT in Short Circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Case of Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SENSE Signal in Case of Inverse Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Diagnostic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 23 24 25 25 26 27 27 27 28 29 29 29 30 8 8.1 Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Datasheet 45 4 4 4 5 Rev.1.00 2019-03-09 PROFET™ +24 V BTT6100-2ERA 8.2 8.3 8.4 DEN / DSEL Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Input Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 9 9.1 9.2 9.3 9.4 9.5 Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnostic Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 35 35 36 38 39 40 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Datasheet 46 Rev.1.00 2019-03-09 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2019-03-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2019 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference BTT6100-2ERA IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.