CHL8203-01CRT

Digital Multi-Phase Buck Controller FEATURES CHL8203/12/13/14 DESCRIPTION  Dual output 2/3/4+1-phase PWM Controller (CHL8212/13/14) and single output 3-phase PWM Controller (CHL8203)  Easiest layout and fewest pins in the industry  Footprint compatible with CHL8225 (CHL8213/14) for analog and power signals  Up to 3 VID select lines for dynamic voltage transitions  Slow OCP for Thermal Design Current (TDC) protection  Programmable ICRITICAL signal  I2C interface for configuration & telemetry  Pin programmable I2C address (CHL8203/13/14)  Overclocking support with I2C voltage override and Vmax setting  Flexible I2C bus security features  I2C security enable pin (CHL8203/13/14)  Independent loop switching frequencies from 200kHz to 1.2MHz per phase  IR Efficiency Shaping with Dynamic Phase Control (DPC)  1-phase & Active Diode Emulation modes for light load efficiency The CHL8212/13/14 are dual-loop digital multi-phase buck controllers and the CHL8203 is a single-loop digital multiphase buck controller designed for GPU voltage regulation. Dynamic voltage control is provided by registers which are programmed through I2C and then selected using a 3-bit parallel bus for fast access. The CHL8203/12/13/14 include IR Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. IR Dynamic Phase Control adds/drops active phases based upon load current and can be configured to enter 1-phase operation and diode emulation mode automatically or by command. IR’s unique Adaptive Transient Algorithm (ATA), based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors and Multiple Time Programmable (MTP) storage saves pins and enables a small package size. Device configuration and fault parameters are easily defined using the IR Digital Power Design Center (DPDC) GUI and stored in on-chip MTP. The CHL8203/12/13/14 provides extensive OVP, UVP, OCP and OTP fault protection and the CHL8203/13/14 includes thermistor based temperature sensing with VRHOT signal. IRTN41/NC2 IRTN_L2 ISEN_L2 ISEN 3 ISEN41/NC2 IRTN 3 35 34 33 32 31 30 RCSP_L2 RCSM 2 29 RCSM_L2 VPGM2 3 28 VCC VSEN 4 27 VSEN_L2 VRTN 5 26 VRTN_L2 RRES 6 TSEN1 7 10 CHL8214 2 CHL8213 25 PWM_L2 24 PWM41/NC2 23 PWM3 22 PWM2 21 PWM1 41 GND 11 12 13 14 15 16 17 18 19 20 TSEN2 VRRDY2 1 SMB_CLK 9 SMB_DAT 8 ADDR/PROT/EN_L2 V18A VRRDY1 CHL8213/4 40 Pin 6x6 QFN Top View ENABLE  GDDR Memory 36 VR_HOT#  Multi-phase GPU Systems 37 VIDSEL0 APPLICATIONS 38 VIDSEL1  Pb-Free, RoHS, QFN packages 39 1 VINSEN  3.3V +10%/-15% supply voltage; 0ºC to 85ºC operation 40 RCSP VIDSEL2  Compatible with IR ATL and 3.3V tri-state Drivers ISEN 2  Multiple time programmable (MTP) memory for custom configuration IRTN 2 PIN DIAGRAM ISEN 1  Thermal Protection (OTP) and VRHOT# flag (CHL8203/13/14)  IR Adaptive Transient Algorithm (ATA) on both loops minimizes output bulk capacitors and system cost IRTN 1  Per-Loop Fault Protection: OVP, UVP, OCP The CHL8203/12/13/14 includes numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying VRD design and enabling fastest time-to-market (TTM) with “set-and-forget” methodology. Figure 1: CHL8213/14 Package Top View 1 August 28, 2013 | FINAL | V1.6 Digital Multi-Phase Buck Controller CHL8203/12/13/14 ORDERING INFORMATION CHL82   ―      T – Tape and Reel Tape & Reel Qty Part Number QFN 3000 CHL8203-00CRT 1 QFN 3000 CHL8203-xxCRT R – Package Type: QFN QFN 3000 CHL8212-00CRT C – Commercial Operating Temperature QFN 3000 CHL8212-xxCRT QFN 3000 CHL8213-00CRT xx – Configuration File QFN 3000 CHL8213-xxCRT1 QFN 3000 CHL8214-00CRT QFN 3000 CHL8214-xxCRT1 22 ISEN_L2 IRTN3 23 IRTN_L2 ISEN2 24 ISEN2 IRTN2 25 IRTN2 ISEN1 26 ISEN1 IRTN1 27 Notes: 1. -xx indicates a customer specific configuration file. IRTN1 RCSP 28 1 RCSP RCSM Part Number: 03: CHL8203 12: CHL8212 13: CHL8213 14: CHL8214 28 27 26 25 24 23 22 RCSM 1 21 RCSP_L2 VPGM 2 20 RCSM_L2 PWM3 VSEN 3 19 VCC 18 PWM2 VRTN 4 18 VSEN_L2 5 17 PWM1 RRES 5 17 PWM_L2 6 16 SMB_CLK V18A 6 16 PWM2 15 PWM1 VPGM 1 21 ISEN3 VSEN 2 20 VCC VRTN 3 19 RRES 4 TSEN V18A 14 VIDSEL2 VIDSEL1 VIDSEL0 VRHOT# ENABLE ADDR/PROTECT Figure 2: CHL8203 Package Top View 2 August 28, 2013 | FINAL | V1.6 8 9 10 11 12 13 14 SMB_CLK 13 7 SMB_DAT 12 VRRDY ENABLE 11 SMB_DAT VIDSEL0 10 15 VIDSEL1 9 29 GND VIDSEL2 8 VINSEN 7 CHL8212 28 Pin 5X5 QFN Top View VINSEN CHL8203 28 Pin 5X5 QFN Top View 29 GND VRRDY Package Figure 3: CHL8212 Package Top View