CY7C65217-24LTXIT

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Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com CY7C65210/CY7C65217 CY7C65210A/CY7C65217A USB Billboard Controller USB Billboard Controller Features ■ USB Suspend mode for low power USB 2.0-certified, Full-Speed (12 Mbps) ❐ Supports native Billboard Device Class Driver ❐ Integrated USB termination resistors 2 ■ CY7C65210/210A: Single-channel I C interface ❐ Master up to 400 kHz ❐ 190 bytes for each transmit and receive buffer 2 ■ CY7C65217/217A: Dual-channel UART/I C interface ❐ UART interface • Supports 2 pin • Data rates up to 115200 bps • 190 bytes for each transmit and receive buffer • Data format: 7 or 8 data bits, 1 or 2 stop bits • No parity, even, odd, mark, or space parity • Supports parity, overrun, and framing errors • Supports single-channel RS-232 and RS-422 interface 2 ❐ I C Interface • Master up to 400 kHz • 190 bytes for each transmit and receive buffer ■ Operating voltage: 1.71 V to 5.5 V ■ Operating temperature: ❐ Commercial: 0 °C to 70 °C ❐ Industrial: –40 °C to 85 °C ■ ESD protection: 2.2-kV HBM ■ RoHS-compliant package ❐ 24-pin QFN (4.0 mm × 4.0 mm, 0.55 mm, 0.5-mm pitch) ■ Ordering part number ❐ CY7C65210-24LTXI ❐ CY7C65217-24LTXI ❐ CY7C65210A-24LTXI ❐ CY7C65217A-24LTX ■ ■ Applications Any Type-C Device Container that supports Alternate Mode requires Billboard Device support such as: General-purpose input/output (GPIO) pins: ❐ CY7C65210: 9 ❐ CY7C65217: 7 ❐ CY7C65210A: 11 ❐ CY7C65217A: 9 ■ Dongles for Type-C ■ Docking Stations ■ Monitors Functional Description ■ 2560 bytes flash for storing configuration parameters ■ Billboard Device Class-specific descriptors ■ Driver support for Billboard Device ❐ Billboard Device Class is natively supported by Windows 10 ■ Clocking: Integrated 48-MHz clock oscillator ■ Supports bus- or self-powered configurations The CY7C6521x[1] is a Full-Speed USB controller, which enumerates as a Billboard Device. It integrates a voltage regulator, an oscillator, and flash memory for storing configuration parameters, offering a cost-effective solution. CY7C6521x supports bus-powered mode and enables efficient system power management with suspend and remote wake-up signals. It is available in a 24-pin QFN package. For a complete list of related resources, click here. Comparison of Billboard Parts Feature CY7C65210 CY7C65217 CY7C65210A CY7C65217A Billboard Spec 1.1 1.1 1.21 1.21 Number of GPIOs 9 7 11 9 Suspend/Wakeup Support Yes Yes No* No* * Because these features are not relevant to Billboard, support for these features is removed. Note 1. CY7C6521x refers to CY7C65210, CY7C65217, CY7C65210A, and CY7C65217A. Cypress Semiconductor Corporation Document Number: 001-97082 Rev. *F • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised April 2, 2018 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Block Diagram – CY7C65210/CY7C65210A nXRES VDDD VCCD Voltage Regulator Reset Internal 48 MHz OSC Internal 32 KHz OSC Serial Communication Block USB VBUS USBDP USBDM VBUS Regulator USB Transceiver with Integrated Resistor SIE I2C I2C GPIO GPIO 2560 Bytes Configurable Flash Memory Block Diagram – CY7C65217/CY7C65217A nXRES VDDD VCCD Voltage Regulator Reset Internal 48 MHz OSC Internal 32 kHz OSC USB VBUS USBDP USBDM I2C I2C SCB1 UART/ I2C VBUS Regulator USB Transceiver with Integrated Resistor SCB0 SIE 2560 Bytes Configurable Flash Memory UART/I2C Serial Communication Block GPIO GPIO More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right device for your design, and to help you to quickly and effectively integrate the device into your design. ■ Overview: USB Portfolio, USB Roadmap ■ USB 2.0 Product Selectors: USB-Serial Bridge Controller, USB to UART Controller (Gen I), enCoRe II, enCoRe III, enCoRe V ■ Code Examples: USB Full-Speed ■ Models: IBIS Document Number: 001-97082 Rev. *F Page 2 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Contents Pin Description – CY7C65210/CY7C65210A .................. 4 Pin Description – CY7C65217/CY7C65217A .................. 5 GPIO Configuration .......................................................... 6 Functional Overview ........................................................ 6 USB and Billboard Device Functionality ...................... 6 Serial Communication ................................................. 6 UART Interface ............................................................ 6 GPIO Interface ............................................................ 6 Memory ....................................................................... 6 System Resources ...................................................... 7 Suspend and Resume ................................................. 7 WAKEUP ..................................................................... 7 Internal Flash Configuration ........................................ 7 Electrical Specifications ................................................ 10 Absolute Maximum Ratings ....................................... 10 Operating Conditions ................................................. 10 Device-Level Specifications ...................................... 10 GPIO ......................................................................... 11 Document Number: 001-97082 Rev. *F nXRES ....................................................................... 12 UART Specifications ................................................. 12 I2C Specifications ...................................................... 12 Flash Memory Specifications .................................... 12 Application Schematic ................................................... 13 Ordering Information ...................................................... 15 Ordering Code Definitions ......................................... 15 Packaging Information ................................................... 16 Acronyms ........................................................................ 17 Document Conventions ................................................. 17 Units of Measure ....................................................... 17 Document History Page ................................................. 18 Sales, Solutions, and Legal Information ...................... 20 Worldwide Sales and Design Support ....................... 20 Products .................................................................... 20 PSoC® Solutions ...................................................... 20 Cypress Developer Community ................................. 20 Technical Support ..................................................... 20 Page 3 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Pin Description – CY7C65210/CY7C65210A Pin[2] Type Name Default 1 GPIO GPIO_6 Tristate GPIO 2 GPIO GPIO_7 Tristate GPIO 3 Power VSSD – 4 GPIO GPIO_8 Tristate GPIO 5 GPIO GPIO_9 Tristate GPIO 6 GPIO GPIO_10 Tristate GPIO Description USBDM – USB Data Signal Minus, integrates termination resistor 12 Power VCCD – This pin should be decoupled to ground using a 1-µF capacitor or by connecting a 1.8-V supply GPIO_5 SCB_2/GPIO_4 SCB_1/GPIO_3 GPIO_2 GPIO_1 21 20 19 12 USBIO VCCD 11 GPIO_1 USB Data Signal Plus, integrates termination resistor and a 1.5-k pull-up resistor 19 – 11 USBDP 10 USBIO USBDP 10 USBDM Tristate VSSD GPIO_2 GPIO_13 13 SCB_1/GPIO_3 GPIO 6 20 – nXRES 21 WAKEUP 14 9 Input On CY7C65210A, this pin serves as GPIO. On CY7C65210, this pin is configured to wake up the device from Suspend mode. Can be configured as active LOW/HIGH using the configuration utility. On CY7C65210A, this pin serves as GPIO. VBUS Supply, 3.15 V to 5.25 V 16 Power VSSD – Digital Ground 17 Power VSSA – Analog Ground 18 Input Debug I/O – Used for debug purpose. Should be left floating. 19 GPIO GPIO_1 Input VSSA VSSD 3 16 VSSD GPIO_8 4 GPIO_9 GPIO_10 CY7C65210A24-pin QFN Top View 15 VBUS 5 14 nXRES 6 13 VSSD 12 – Debug I/O 17 VCCD VBUS 18 2 11 Power 1 GPIO_7 10 15 GPIO_6 USBDP Chip reset, active low. Can be left unconnected or have a pull-up resistor connected if not used USBDM Digital Ground – 9 – nXRES GPIO_13 VSSD nXRES 8 Power 14 7 13 GPIO_11 9 VBUS 5 WAKEUP Tristate VSSD 15 SCB_2/GPIO_4 GPIO_12 GPIO_10 VSSA 16 22 GPIO On CY7C65210, this pin indicates that the device in Suspend mode. Can be configured as active LOW/HIGH using the configuration utility. GPIO_9 22 VDDD 24 – 4 8 SUSPEND GPIO_8 7 Output 8 GPIO (CY7C65210A) GPIO_11 Tristate 3 SUSPEND GPIO_11 VSSD Debug I/O 17 GPIO_5 GPIO GPIO (CY7C65210) 18 VDDD POWER# CY7C6521024-pin QFN Top View 24 GPIO_11 2 23 GPIO 1 GPIO_7 GPIO_12 7 GPIO_6 23 Digital Ground Can be used as wakeup source to wakeup device from Suspend mode. 20 GPIO GPIO_2 Tristate 21 SCB/GPIO SCB_1/GPIO_3 SCL I2C SCL 22 SCB/GPIO SCB_2/GPIO_4 SDA I2C SDA 23 GPIO GPIO_5 Tristate 24 Power VDDD – GPIO GPIO Supply to the device core and Interface, 1.71 V to 5.5 V Note 2. Any pin acting as an Input pin should not be left unconnected. Document Number: 001-97082 Rev. *F Page 4 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Pin Description – CY7C65217/CY7C65217A Pin[3] Type Name Default 1 GPIO GPIO_6 Tristate GPIO 2 GPIO GPIO_7 Tristate GPIO 3 Power VSSD – 4 SCB/GPIO SCB1_0/GPIO_8 RXD UART RXD/I2C SCL 5 SCB/GPIO SCB1_1/GPIO_9 TXD UART TXD/I2C SDA 6 GPIO GPIO_10 Tristate USB Data Signal Minus, integrates termination resistor 12 Power VCCD – This pin should be decoupled to ground using a 1-µF capacitor or by connecting a 1.8-V supply Power VSSD – Digital Ground 17 Power VSSA – Analog Ground 18 Input Debug I/O – Used for debug purpose. Should be left floating. 19 GPIO GPIO_1 Input GPIO_5 SCB0_2/GPIO_4 SCB0_1/GPIO_3 GPIO_2 GPIO_1 22 21 20 19 VDDD 23 VSSA VSSD 3 16 VSSD CY7C65217A24-pin QFN Top View 15 VBUS 5 14 nXRES 6 13 VSSD SCB1_1/GPIO_8 4 SCB1_2/GPIO_9 GPIO_10 12 16 Debug I/O 17 VCCD VBUS Supply, 3.15 V to 5.25 V 18 2 11 – 1 GPIO_7 10 VBUS GPIO_6 USBDP Chip reset, active low. Can be left unconnected or have a pull-up resistor connected if not used USBDM Digital Ground 22 – – 9 VSSD nXRES GPIO_13 Power nXRES GPIO_5 On CY7C65217A, this pin serves as GPIO. 14 Power 24 On CY7C65217, this pin is configured to wake up the device from Suspend mode. Can be configured as active LOW/HIGH using the configuration utility. 13 15 12 – VCCD USBDM GPIO_1 USBIO 19 11 GPIO 11 USB Data Signal Plus, integrates termination resistor and a 1.5-k pull-up resistor 10 – USBDP USBDP USBDM USBIO GPIO_2 10 SCB0_1/GPIO_3 Tristate VSSD 20 GPIO_13 13 21 GPIO 6 GPIO_10 9 – nXRES WAKEUP Tristate WAKEUP 14 SCB1_2/GPIO_9 SCB0_2/GPIO_4 GPIO_12 Input VBUS 5 4 7 GPIO VSSD 15 SCB1_1/GPIO_8 8 On CY7C65217, this pin indicates that the device in Suspend mode. Can be configured as active LOW/HIGH using the configuration utility. 16 CY7C6521724-pin QFN Top View GPIO_11 – 3 SUSPEND SUSPEND 9 Output GPIO (CY7C65217A) VSSA VSSD VDDD Tristate Debug I/O 17 24 GPIO_11 18 2 23 GPIO GPIO (CY7C65217) 1 GPIO_7 7 POWER# GPIO_6 8 GPIO_11 GPIO GPIO_11 8 GPIO Digital Ground GPIO_12 7 Description Can be used as wakeup source to wakeup device from Suspend mode. 20 GPIO GPIO_2 Tristate 21 SCB/GPIO SCB0_1/GPIO_3 SCL SCB0 I2C SCL 22 SCB/GPIO SCB0_2/GPIO_4 SDA SCB0 I2C SDA 23 GPIO GPIO_5 Tristate 24 Power VDDD – GPIO GPIO Supply to the device core and Interface, 1.71 V to 5.5 V Note 3. Any pin acting as an Input pin should not be left unconnected. Document Number: 001-97082 Rev. *F Page 5 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A GPIO Configuration GPIO Configuration Option INPUT POWER# Description Input GPIO This active low output signal is used to control power to an external logic through a switch to cut power off during an Unconfigured USB device and USB suspend. 0 - USB device in Configured state 1 - USB device in Unconfigured state or during USB suspend mode Note: CY7C65210A and CY7C65217A do not support POWER#. TRISTATE I/O Tristated (Open-Drain) OUTPUT Drive LOW or HIGH Functional Overview UART Interface USB and Billboard Device Functionality Only the SCB1 interface of CY7C65217 and CY7C65217A can be configured as a UART interface. USB CY7C6521x has a built-in USB 2.0 Full-Speed transceiver. The transceiver incorporates the internal USB series termination resistors on the USB data lines and a 1.5-k pull-up resistor on USBDP. Billboard Device Functionality CY7C6521x is used to communicate Alternate Modes supported by a Device Container to a USB Host system. CY7C6521x sends this information through BOS descriptor and string descriptors in human-readable format. CY7C6521x supports the Billboard descriptor as part of the complete BOS descriptor. The CY7C65210/65217 supports USB Billboard Device class Rev. 1.1 while the CY7C65210A/65217A supports USB Billboard Device class Rev. 1.21. For further details on the device class, refer to the USB Billboard Device Class specification. Serial Communication CY7C65210 and CY7C65210A have one Serial Communication Block (SCB) whereas CY7C65217 and CY7C65217A have two SCBs that implement either UART or I2C interface. I2C Interface The I2C interface implements full multi-master mode and supports up to 400 kHz. For further details on the protocol, refer to the NXP I2C specification, Rev. 5. Notes I2C ports are not tolerant to higher voltages. Therefore, they cannot be hot-swapped or powered up independently when chip is not powered. 2 ■ The minimum fall time of the SCL is met (as per NXP I C specification Rev5) when VDDD is between 1.71 V and 3.0 V. When VDDD is within the range of 3.0 V to 3.6 V, it is recommended to add a 50 pF capacitor on the SCL signal. ■ The 2-pin UART interface (RXD and TXD) provides asynchronous serial communication with other UART devices operating at speeds of up to 115200. It supports seven or eight data bits, one or two stop bits, odd, even, mark, space, and no parity. The UART interface supports full-duplex communication with a signaling format that is compatible with the standard UART protocol. The UART pins may be interfaced to industry-standard RS-232/RS-422 transceivers to manage different voltage levels. Common UART functions, such as parity error[4] and frame error[5], are supported. The UART parameters can be set using native APIs. GPIO Interface CY7C65210 has nine configurable GPIOs whereas CY7C65217 has 7 configurable GPIOs. CY7C65210A has 11 configurable GPIOs whereas CY7C65217A has nine configurable GPIOs. The configurable options are as follows: ■ INPUT: Input GPIO ■ POWER#: Power control ■ TRISTATE: I/O tristated ■ OUTPUT: Drive LOW or HIGH Memory CY7C6521x has a 2560-bytes configurable flash. Flash is used to store USB parameters such as VID/PID, serial number, product and manufacturer descriptors, and Billboard Device Class-specific descriptors. Note 4. Parity error gets detected when UART transmitter device is configured for odd parity and UART receiver device is configured for even parity. 5. Frame error gets detected when UART transmitter device is configured for 7 bits data width and 1 stop bit, whereas UART receiver device is configured for 8 bit data width and 2 stop bits. Document Number: 001-97082 Rev. *F Page 6 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A System Resources Suspend and Resume CY7C6521x has a fully integrated clock with no external components required. The clock system is responsible for providing clocks to all subsystems. The CY7C65210 and CY7C65217 device asserts the SUSPEND pin when the USB bus enters the suspend state. This helps in meeting the stringent suspend current requirement of the USB 2.0 specification, while using the device in bus-powered mode. The device resumes from the suspend state under either of the two following conditions: 1. Any activity is detected on the USB bus. 2. The WAKEUP pin is asserted to generate remote wakeup to the host. Internal 48-MHz Oscillator WAKEUP Power System CY7C6521x supports USB Suspend mode to control power usage. CY7C6521x operates in bus-powered or self-powered modes over a range of 3.15 V to 5.5 V. Clock System The internal 48-MHz oscillator is the primary source of internal clocking in CY7C6521x. Internal 32-kHz Oscillator The internal 32-kHz oscillator is primarily used to generate clocks for peripheral operation in USB Suspend mode. The WAKEUP pin on CY7C65210 and CY7C65217 is used to generate the remote wakeup signal on the USB bus. The remote wakeup signal is sent only if the host enables this feature through the SET_FEATURE request. The device communicates support for the remote wakeup to the host through the configuration descriptor during the USB enumeration process. Internal Flash Configuration Reset The reset block provides reliable power-on reset and brings the device back to the default known state. The nXRES (active LOW) pin can be used by the external devices to reset CY7C6521x. The internal flash memory can be used to store the configuration parameters provided in Table 1. Table 1. Internal Flash Configuration for CY7C65210/CY7C65210A Parameter Default Value Description USB Configuration USB Vendor ID (VID) 0x04B4 Default Cypress VID. Can be configured to customer VID. USB Product ID (PID) 0x5210 Default Cypress PID. Can be configured to customer PID. Manufacturer string Cypress Semiconductor Can be configured with any string up-to 126 characters[6]. Product string Billboard Device Can be configured with any string up-to 126 characters[6]. Serial string User-defined Can be configured with any string up-to 126 characters[6]. If the Serial string is not configured by the user, a unique serial number will be generated using the wafer die parameters. Power mode Bus powered Can be configured to bus-powered or self-powered mode. Max current draw 100 mA Can be configured to any value from 0 to 500 mA. The configuration descriptor will be updated based on this. Remote wakeup Enabled Can be disabled on CY7C65210. Remote wakeup is initiated by asserting the WAKEUP or GPIO_1 pin. Disabled On CY7C65210A, this feature is removed. bcdDevice 0x00 Can be configured with specific binary coded decimal number. Note 6. Maximum available configuration space for all string descriptors is 1920 bytes. Each string descriptor can be configured up to 126 characters. Document Number: 001-97082 Rev. *F Page 7 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Table 1. Internal Flash Configuration for CY7C65210/CY7C65210A (continued) Parameter Default Value Description GPIO Configuration GPIO_1 Input GPIO can be configured as shown in GPIO Configuration on page 6. GPIO_2 Tristate GPIO_3 I2C SCL GPIO_4 I2C SDA GPIO_5 Tristate GPIO_6 Tristate GPIO_7 Tristate GPIO_8 Tristate GPIO_9 Tristate GPIO_10 Tristate GPIO_11 Power# (CY7C65210) GPIO_12 Tristate[7] GPIO_13 Tristate[7] Tristate (CY7C65210A) Billboard Device Class Descriptor Configuration iAdditionalInfoURL www.cypress.com/Type-C Can be configured with any string up-to 126 characters[8]. bNumberOfAlternateModes 0x01 Can be configured with any value from 0x01 to 0x08. bPreferredAlternateMode 0x00 Can be configured with any value from 0x00 to 0x07. VCONN Power 0x0000 Can be configured with any value from 0x0000 to 0x0006 or it can be configured with value 0x8000. SVID 0xFF01 Can be configured to specific SVID. bAlternateMode 0x01 Can be configured with any value from 0x01 to 0x08. iAlternateModeString Type-C to Display adapter. For further Can be configured with any string up-to 126 characters[8]. assistance, see http://help.vesa.org/dp-usb-type-c dwAlternateModeVdo 0x000C00C5 Can be configured with any 4-byte value (applicable only for CY7C65210A/CY7C65217A). Notes 7. These GPIOs are available only on CY7C65210A. 8. Maximum available configuration space for all string descriptors is 1920 bytes. Each string descriptor can be configured up to 126 characters. Document Number: 001-97082 Rev. *F Page 8 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Table 2. Internal Flash Configuration for CY7C65217/CY7C65217A Parameter Default Value Description USB Configuration USB Vendor ID (VID) 0x04B4 USB Product ID (PID) 0x5217 Default Cypress VID. Can be configured to customer VID. Default Cypress PID. Can be configured to customer PID. Manufacturer string Cypress Semiconductor Can be configured with any string up-to 126 characters[9]. Product string Billboard Device Can be configured with any string up-to 126 characters[9]. Serial string User-defined Can be configured with any string up-to 126 characters[9]. If the Serial string is not configured by the user then a unique serial number will be generated using the wafer die parameters. Power mode Bus powered Can be configured to bus-powered or self-powered mode. Max current draw 100 mA Can be configured to any value from 0 to 500 mA. The configuration descriptor will be updated based on this. Remote wakeup Enabled Can be disabled on CY7C65217. Remote wakeup is initiated by asserting the WAKEUP or GPIO_1 pin. Disabled On CY7C65217A, this feature is removed. bcdDevice 0x00 Can be configured with specific binary coded decimal number. GPIO_1 Input GPIO_2 Tristate GPIO_3 SCB0 I2C SCL GPIO_4 SCB0 I2C SDA GPIO_5 Tristate GPIO_6 Tristate GPIO Configuration GPIO can be configured as shown in Table on page 6. GPIO_7 Tristate GPIO_8 SCB1 UART RXD GPIO_9 SCB1 UART TXD GPIO_10 Tristate GPIO_11 Power#(CY7C65217) Tristate(CY7C65217A) GPIO_12 Tristate[10] GPIO_13 Tristate[10] iAdditionalInfoURL www.cypress.com/Type-C Can be configured with any string up-to 126 characters[9]. bNumberOfAlternateModes 0x01 Can be configured with any value from 0x01 to 0x08. Billboard Device Class Descriptor Configuration bPreferredAlternateMode 0x00 Can be configured with any value from 0x00 to 0x07. VCONN Power 0x0000 Can be configured with any value from 0x0000 to 0x0006 or it can be configured with value 0x8000. SVID 0xFF01 Can be configured to specific SVID. bAlternateMode 0x01 Can be configured with any value from 0x01 to 0x08. iAlternateModeString Type-C to Display adapter. For further Can be configured with any string up-to 126 characters[9]. assistance, see http://help.vesa.org/dp-usb-type-c dwAlternateModeVdo 0x000C00C5 Can be configured with any 4-byte value (applicable only for CY7C65210A and CY7C65217A). Notes 9. Maximum available configuration space for all string descriptors is 1920 bytes. Each string descriptor can be configured up to 126 characters. 10. These GPIOs are available only on CY7C65217A. Document Number: 001-97082 Rev. *F Page 9 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Electrical Specifications Static discharge voltage ESD protection levels: 2.2-kV HBM per JESD22-A114 Absolute Maximum Ratings Latch-up current ..................................................... . 140 mA Exceeding maximum ratings[11] may shorten the useful life of the device. Current per GPIO ...................................................... 25 mA Storage temperature ............................... –55 °C to +100 °C Operating Conditions Ambient temperature with power supplied (Industrial) ................ –40 °C to +85 °C TA (ambient temperature under bias) Commercial ..................................................... 0 °C to 70 °C Industrial ................................................... –40 °C to +85 °C Supply voltage to ground potential VDDD ............................................................................ 6.0 V VBUS ............................................................................ 6.0 V VCCD .......................................................................... 1.95 V VGPIO .............................................................. VDDD + 0.5 V VBUS supply voltage ................................... 3.15 V to 5.50 V VDDD supply voltage ................................... 1.71 V to 5.50 V VCCD supply voltage ................................... 1.71 V to 1.89 V Device-Level Specifications All specifications are valid for –40 °C  TA  85 °C, TJ  100 °C, and 1.71 V to 5.50 V, except where noted. Table 3. DC Specifications Parameter VBUS VDDD Description VBUS supply voltage VDDD supply voltage Min Typ Max Units Details/Conditions 3.15 3.30 3.45 V 4.35 5.00 5.5 V Set and configure the correct voltage range using a configuration utility for VBUS. Default 5 V. 1.71 1.80 1.89 V 2.0 3.3 5.5 V – 1.80 – V Do not use this supply to drive the external device. • 1.71 V  VDDD 1.89 V: Short the VCCD pin with the VDDD pin • VDDD > 2 V – Connect a 1-µF capacitor (Cefc) between the VCCD pin and ground 1.00 1.30 1.60 µF X5R ceramic or better. Used to set I/O and core voltage. Set and configure the correct voltage range using a configuration utility for VDDD. Default 3.3 V. VCCD Output voltage (for core logic) Cefc External regulator voltage bypass IDD1 Operating supply current – 20 – mA USB 2.0 FS, UART at 1-Mbps single channel, no GPIO switching. IDD2 USB Suspend supply current – 5 – µA Does not include current through a pull-up resistor on USBDP. Note 11. Usage above the Absolute Maximum conditions may cause permanent damage to the device. Exposure to Absolute Maximum conditions for extended periods of time may affect device reliability. When used below Absolute Maximum conditions but above normal operating conditions, the device may not operate to specification. Document Number: 001-97082 Rev. *F Page 10 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Table 4. AC Specifications Parameter Fall Time_FS Description FS USB Fall Time Min Typ Max Units Details/Conditions – 7.815 – ns 90% to 10% of full swing, 50-pF load Rise Time_FS FS USB Rise Time – 8.367 – ns 10% to 90% of full swing, 50-pF load TRFM_FS FS Rise/Fall Matching – 107.024 – % – VCRS_FS FS Crossover Voltage – 1.797 – V – TDJ1 FS Driver Jitter (next) – –0.339 – ns – TDJ2 FS Driver Jitter (paired) – –0.285 – ns – TFDEOP FS Differential to EOP Skew ns – F1 Frequency F2 – –0.076 – 47.04 48 48.96 MHz Non-USB mode MHz USB mode 47.88 48 48.12 Zout USB driver output impedance 28 – 44  – Twakeup Wakeup from USB Suspend mode – 25 – µs – Min Typ Max Units Details/Conditions Input voltage HIGH threshold 0.7 × VDDD – – V CMOS Input Input voltage LOW threshold – – 0.3 × VDDD V CMOS Input LVTTL input, VDDD< 2.7 V 0.7 × VDDD – – V – LVTTL input, VDDD < 2.7V – – 0.3 × VDDD V – LVTTL input, VDDD > 2.7V 2 – – V – VIL LVTTL input, VDDD > 2.7V – – 0.8 V VOH – – V IOH = 4 mA, VDDD = 5 V +/- 10% VOH CMOS output voltage HIGH level VDDD – 0.4 CMOS output voltage HIGH level VDDD – 0.6 – – V IOH = 4 mA, VDDD = 3.3 V +/- 10% GPIO Table 5. GPIO DC Specification Parameter VIH [12] VIL VIH [12] VIL VIH [12] Description – VOH CMOS output voltage HIGH level VDDD – 0.5 – – V IOH = 1 mA, VDDD = 1.8 V +/- 5% VOL CMOS output voltage LOW level – – 0.4 V IOL = 8 mA, VDDD = 5 V +/- 10% VOL CMOS output voltage LOW level – – 0.6 V IOL = 8 mA, VDDD = 3.3 V +/- 10% VOL CMOS output voltage LOW level – – 0.6 V IOL = 4 mA, VDDD = 1.8 V +/- 5% Rpullup Pull-up resistor 3.5 5.6 8.5 kΩ – Rpulldown Pull-down resistor 3.5 5.6 8.5 kΩ – IIL Input leakage current (absolute value) – – 2 nA CIN Input capacitance – – 7 pF – Vhysttl Input hysteresis LVTTL; VDDD > 2.7 V 25 40 C mV – Vhyscmos Input hysteresis CMOS 0.05 × VDDD – – mV – 25 °C, VDDD = 3.0 V Note 12. VIH must not exceed VDDD + 0.2 V. Document Number: 001-97082 Rev. *F Page 11 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Table 6. GPIO AC Specification Parameter Description Min Typ Max Units 2 – 12 ns VDDD = 3.3 V/ 5.5 V, Cload = 25 pF Fall Time in Fast mode 2 – 12 ns VDDD = 3.3 V/ 5.5 V, Cload = 25 pF Rise Time in Slow mode 10 – 60 ns VDDD = 3.3 V/ 5.5 V, Cload = 25 pF TFallSlow1 Fall Time in Slow mode 10 – 60 ns VDDD = 3.3 V/ 5.5 V, Cload = 25 pF TRiseFast2 Rise Time in Fast mode 2 – 20 ns VDDD = 1.8 V, Cload = 25 pF TFallFast2 Fall Time in Fast mode 20 – 100 ns VDDD = 1.8 V, Cload = 25 pF TRiseSlow2 Rise Time in Slow mode 2 – 20 ns VDDD = 1.8 V, Cload = 25 pF TFallSlow2 Fall Time in Slow mode 20 – 100 ns VDDD = 1.8 V, Cload = 25 pF Min Typ Max Units Details/Conditions TRiseFast1 Rise Time in Fast mode TFallFast1 TRiseSlow1 Details/Conditions nXRES Table 7. nXRES DC Specifications Parameter Description VIH Input voltage HIGH threshold 0.7 × VDDD – – V – VIL Input voltage LOW threshold – – 0.3 × VDDD V – Rpullup Pull-up resistor 3.5 5.6 8.5 kΩ – CIN Input capacitance – 5 – pF – Vhysxres Input voltage hysteresis – 100 – mV – Min Typ Max Units Details/Conditions 1 – – µs – Min Typ Max Units Details/Conditions 0.3 – 3000 kbps Single SCB: TX + RX Dual SCB: TX or RX Min Typ Max Units Details/Conditions 1 – 400 KHz – Table 8. nXRES AC Specifications Parameter Description Tresetwidth Reset pulse width UART Specifications Table 9. UART AC Specifications Parameter FUART Description UART bit rate I2C Specifications Table 10. I2C AC Specifications Parameter FI2C Description I2C frequency Flash Memory Specifications Table 11. Flash Memory Specifications Parameter Description Fend Flash endurance Fret Flash retention. TA  85 °C, 10K program/erase cycles Document Number: 001-97082 Rev. *F Min Typ Max Units Details/Conditions 100K – – cycles – 10 – – years – Page 12 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Application Schematic Figure 1 shows the application schematic for CY7C65210. Refer to the Pin Description – CY7C65210/CY7C65210A on page 4 for signal details. Figure 1. CY7C65210 Application Schematic VDDD CY7C65210 18 23 1 2 4 5 6 7 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 8 SUSPEND 9 WAKEUP 24 USB HOST VBUS 15 10 USBDP 11 USBDM VBUS D+ DGND 4.7 uF nXRES VCCD VSSD SDA VDDD 0.1 uF 14 12 VSSD SCL Debug I/O 19 GPIO_1 20 GPIO_2 21 GPIO_3 / SCB_1 22 GPIO_4 / SCB_2 VSSA 2.2K VSSD 2.2K 1 uF 17 16 13 3 Figure 2 shows the application schematic for CY7C65210A. Refer to the Pin Description – CY7C65210/CY7C65210A on page 4 for signal details. Figure 2. CY7C65210A Application Schematic VDDD CY7C65210A 23 1 2 4 5 6 7 VDDD GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 8 GPIO_12 9 GPIO_13 24 USB HOST VBUS 15 10 USBDP 11 USBDM VBUS D+ DGND 4.7 uF nXRES VCCD VSSD SDA VSSD SCL Debug I/O 19 GPIO_1 20 GPIO_2 21 GPIO_3 / SCB_1 22 GPIO_4 / SCB_2 VSSA 2.2K VSSD 18 2.2K 0.1 uF 14 12 1 uF 17 16 13 3 Document Number: 001-97082 Rev. *F Page 13 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Figure 3 shows the application schematic for CY7C65217. Refer to the Pin Description – CY7C65217/CY7C65217A on page 5 for signal details. Figure 3. CY7C65217 Application Schematic VDDD CY7C65217 18 RXD TXD 8 SUSPEND 9 WAKEUP VBUS USBDP USBDM 24 USB HOST 15 10 11 VBUS D+ DGND 4.7 uF nXRES VCCD VSSD SDA VDDD 0.1 uF 14 12 VSSD SCL GPIO_0 19 GPIO_1 20 GPIO_2 21 GPIO_3 / SCB0_1 22 GPIO_4 / SCB0_2 23 GPIO_5 1 GPIO_6 2 GPIO_7 4 GPIO_8/SCB1_1 5 GPIO_9/SCB1_2 6 GPIO_10 7 GPIO_11 VSSA 2.2K VSSD 2.2K 1 uF 17 16 13 3 Figure 4 shows the application schematic for CY7C65217A. Refer to the Pin Description – CY7C65217/CY7C65217A on page 5 for signal details. Figure 4. CY7C65217A Application Schematic VDDD CY7C65217A RXD TXD 23 1 2 4 5 6 7 VDDD GPIO_5 GPIO_6 GPIO_7 GPIO_8/SCB1_1 GPIO_9/SCB1_2 GPIO_10 GPIO_11 8 GPIO_12 9 GPIO_13 24 USB HOST 15 VBUS 10 USBDP 11 USBDM VBUS D+ DGND 4.7 uF nXRES VCCD VSSD SDA VSSD SCL GPIO_0 19 GPIO_1 20 GPIO_2 21 GPIO_3 / SCB0_1 22 GPIO_4 / SCB0_2 VSSA 2.2K VSSD 18 2.2K 0.1 uF 14 12 1 uF 17 16 13 3 Document Number: 001-97082 Rev. *F Page 14 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Ordering Information Table 12 lists the key package features and ordering codes of CY7C65210, CY7C65217, CY7C65210A, and CY7C65217A. For more information, contact your local sales representative. Table 12. Key Features and Ordering Information Part Number Package Temperature Range CY7C65210-24LTXI 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) Industrial CY7C65210-24LTXIT 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) – Tape and Reel Industrial CY7C65210A-24LTXI 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) Industrial CY7C65210A-24LTXIT 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) – Tape and Reel Industrial CY7C65217-24LTXI 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) Industrial CY7C65217-24LTXIT 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) – Tape and Reel Industrial CY7C65217A-24LTXI 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) Industrial CY7C65217A-24LTXIT 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) Industrial Ordering Code Definitions CY 7 C 65 210/217A - 24 XX X I X X = blank or T blank = Tube; T = Tape and Reel Temperature Range: I = Industrial Pb-free Package Type: LT = QFN Number of Pins: 24 pins Part Number: USB Billboard Device Class Specification: A = Rev. 1.21 Family Code: 65 Technology Code: C = CMOS Marketing Code: 7 = Cypress products Company ID: CY = Cypress Document Number: 001-97082 Rev. *F Page 15 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Packaging Information Figure 5. 24-pin QFN (4 mm × 4 mm × 0.55 mm) LQ24A 2.65 × 2.65 E-Pad (Sawn) Package Outline, 001-13937 001-13937 *F Table 13. Package Characteristics Parameter Description TA Operating ambient temperature THJ Package JA Min Typ Max Units –40 25 85 °C – 18.4 – °C/W Table 14. Solder Reflow Peak Temperature Package Maximum Peak Temperature Maximum Time at Peak Temperature 24-pin QFN 260 °C 30 seconds Table 15. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2 Package MSL 24-pin QFN MSL 3 Document Number: 001-97082 Rev. *F Page 16 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Acronyms Document Conventions Table 16. Acronyms Used in this Document Units of Measure Acronym Description Table 17. Units of Measure BOS binary device object store ESD electrostatic discharge °C degree Celsius GPIO general purpose input/output DMIPS Dhrystone million instructions per second HBM human-body model k kilo-ohm I2C inter-integrated circuit KB kilobyte MCU microcontroller unit kHz kilohertz OSC oscillator kV kilovolt PID product identification Mbps megabits per second SCB serial communication block MHz megahertz SCL I2C serial clock mm millimeter SDA I2C serial data V volt SIE serial interface engine SVID standard or vendor ID UART Universal Asynchronous Receiver/Transmitter USB Universal Serial Bus VID vendor identification Document Number: 001-97082 Rev. *F Symbol Unit of Measure Page 17 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Document History Page Document Title: CY7C65210/CY7C65217/CY7C65210A/CY7C65217A, USB Billboard Controller Document Number: 001-97082 Revision ECN Orig. of Change Submission Date ** 4715309 MVTA 04/10/2015 New data sheet. *A 4839996 MVTA 07/22/2015 Updated Features: Replaced 10 with 9 under “General-purpose input/output (GPIO) pins”. Replaced “1536 bytes flash for storing configuration parameters” with “2560 bytes flash for storing configuration parameters”. Updated “Pin Description – CY7C65210”: Updated details corresponding to pins 18, 19, 21 and 22. Updated Functional Overview: Updated GPIO Interface: Updated description. Updated Memory: Updated description. Updated Internal Flash Configuration: Updated Table 1: Updated details corresponding to Serial string, and Remote wakeup parameters under “USB Configuration”. Removed GPIO_0 parameter and its details under “GPIO Configuration”. Updated details corresponding to iAdditionalInfoURL, and iAlternateModeString parameters under “Billboard Device class Descriptor Configuration”. Updated Packaging Information: spec 001-13937 – Changed revision from *E to *F. *B 4881560 MVTA 08/13/2015 Updated Document Title to read as “CY7C65210/CY7C65217, USB Billboard Controller”. Added CY7C65217 part related information in all instances across the document. Replaced CY7C65210 with CY7C6521x in the required instances across the document. Updated Features: Updated details under “I2C interface”. Updated Functional Description: Added Note 1 and referred the same note in CY7C6521x. Added “Block Diagram – CY7C65217”. Added “Pin Description – CY7C65217”. Updated Functional Overview: Added UART Interface. Updated Internal Flash Configuration: Updated Table 1: Updated details corresponding to GPIO_3, and GPIO_4 parameters under “GPIO Configuration”. Added Table 2. Updated Serial Communication: Updated description. Updated GPIO Interface: Updated description. Updated Application Schematic: Added Figure 3. Updated Ordering Information: Updated part numbers. *C 5310895 MVTA 06/16/2016 Updated Features: Updated details under “Driver support for Billboard Device”. Updated “Pin Description – CY7C65217”: No changes in detail. Removed all existing shades. Updated GPIO Configuration: Added “TRISTATE” and “OUTPUT” options. Document Number: 001-97082 Rev. *F Description of Change Page 18 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Document History Page (continued) Document Title: CY7C65210/CY7C65217/CY7C65210A/CY7C65217A, USB Billboard Controller Document Number: 001-97082 Revision ECN Orig. of Change Submission Date *C (cont.) 5310895 MVTA 06/16/2016 Updated Functional Overview: Updated USB and Billboard Device Functionality: Updated Billboard Device Functionality: Updated description. Updated UART Interface: Added Note 4 and referred the same note in “parity error”. Added Note 5 and referred the same note in “frame error”. Updated GPIO Interface: Updated description. Updated Internal Flash Configuration: Updated Table 2: Updated details corresponding to GPIO_8 and GPIO_9 parameters under “GPIO Configuration”. Updated Electrical Specifications: Added UART Specifications. Updated Application Schematic: Updated Figure 3. *D 5768506 AESATMP8 06/09/2017 Updated logo and Copyright. *E 5920593 UMSH 10/13/2017 Updated Document Title to read as “CY7C65210/CY7C65217/CY7C65210A/ CY7C65217A, USB Billboard Controller”. Added CY7C65210A, CY7C65217A parts related information in all instances across the document. Updated Pin Description – CY7C65210/CY7C65210A: Replaced “CY7C65210” with “CY7C65210/CY7C65210A” in heading. Updated details corresponding to pins 7, 8 and 9. Updated Pin Description – CY7C65217/CY7C65217A: Replaced “CY7C65217” with “CY7C65217/CY7C65217A” in heading. Updated details corresponding to pins 7, 8 and 9. Updated GPIO Configuration: Updated details in “Description” column corresponding to POWER# option. Updated Functional Overview: Updated USB and Billboard Device Functionality: Updated Billboard Device Functionality: Updated description. Updated Internal Flash Configuration: Updated Table 1: Updated details corresponding to Serial string, and Remote wakeup parameters under “USB Configuration”. Updated details corresponding to GPIO_11 parameter under “GPIO Configuration”. Added GPIO_12, GPIO_13 parameters and their details under “GPIO Configuration”. Added dwAlternateModeVdo parameter and its details under “Billboard Device Class Descriptor Configuration”. Updated Table 2: Updated details corresponding to Serial string, and Remote wakeup parameters under “USB Configuration”. Updated details corresponding to GPIO_11 parameter under “GPIO Configuration”. Added GPIO_12, GPIO_13 parameters and their details under “GPIO Configuration”. Added dwAlternateModeVdo parameter and its details under “Billboard Device Class Descriptor Configuration”. Updated Application Schematic: Added Figure 2. Added Figure 4. Updated Ordering Information: Updated part numbers. *F 6118883 MUTH 04/02/2018 Updated to new template. Completing Sunset Review. Document Number: 001-97082 Rev. *F Description of Change Page 19 of 20 CY7C65210/CY7C65217 CY7C65210A/CY7C65217A Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. 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Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Document Number: 001-97082 Rev. *F Revised April 2, 2018 Page 20 of 20