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ESD300B102LRHE6327XTSA1

ESD300B102LRHE6327XTSA1

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    SOD882

  • 描述:

    TVS DIODE 3.3VWM 10.5VC

  • 数据手册
  • 价格&库存
ESD300B102LRHE6327XTSA1 数据手册
TVS Diode Transient Voltage Suppressor Diodes ESD300-B1-02LRH Low Clamping & Low Capacitance ESD/Surge Protection Diode ESD300-B1-02LRH Data Sheet Revision 1.2, 2013-11-26 Final Power Management & Multimarket ESD300-B1-02LRH Revision History: Revision 1.1, 2013-06-17 Page or Item Subjects (major changes since previous revision) Revision 1.2, 2013-11-26 4 Update of Figure 2-1) Trademarks of Infineon Technologies AG AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-10-26 Final Data Sheet 2 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Low Clamping & Low Capacitance ESD/Surge Protection Diode 1 Low Clamping & Low Capacitance ESD/Surge Protection Diode 1.1 Features • • • • • • • • Extremely high ESD and surge protection – IEC61000-4-2 (ESD): ±30 kV (air/contact discharge) – IEC61000-4-5 (surge): ±18 A (8/20 μs) Low clamping voltage VCL < 8 V (8 kV contact) Maximum peak pulse power PPP = 260 W (8/20 μs) Extremely low dynamic resistance: RDYN = 0.23 Ω typ. Supports applications with signal voltage 3.3 V max. Line capacitance: CL = typ. 1.2 pF Package TSLP-2-17 compatible to SOD882D leadless ultra small Surface-Mounted Device (SMD) Size 1 mm x 0.6 mm x 0.39 mm (0402) 1.2 • • • Application Examples Reliable ESD and surge protection of highly susceptible IC/ASICs in computers and peripherals, audio, headset, human digital interfaces, video equipment, cellular handsets and accessories and portable electronics Dedicated solution to boost ESD and surge protection performance in miniaturized modern electronics 10/100/1000 Ethernet 1.3 Product Description Pin 1 Marking Pin 1 Pin 1 Pin 2 TSLP-2-17 Pin 2 a) Pin configuration b) Schematic diagram Configuration _Schematic_ Diagram.vst.vsd Figure 1-1 Pin Configuration and Schematic Diagram Table 1-1 Ordering Information Type Package Configuration Marking code ESD300-B1-02LRH TSLP-2-17 1 line, bi-directional S3 Final Data Sheet 3 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Characteristics 2 Characteristics 2.1 Maximum Ratings Table 2-1 Maximum Ratings at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Min. Typ. Max. -30 -30 - 30 30 IPP -18 - 18 A Peak pulse power (tp = 8/20 μs) PPP - - 260 W Operating temperature range TOP -55 - 125 °C 150 °C 1) ESD contact discharge air discharge kV VESD Peak pulse current (tp = 8/20 μs)2) 2) Storage temperature Tstg -65 1) VESD according to IEC61000-4-2 (R = 330 , C = 150 pF discharge network) 2) IPP according to IEC61000-4-5 (tp = 8/20 μs) Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 2.2 Electrical Characteristics at TA = 25 °C, unless otherwise specified                                                                                                                  !"#    Figure 2-1 Definitions of electrical characteristics Final Data Sheet 4 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Characteristics Table 2-2 DC Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max. Reverse working voltage VRWM -3.3 - 3.3 V Reverse current - - 100 nA VR = 3.3 V Unit Note / Test Condition pF VR = 0 V, f = 1 MHz Table 2-3 IR RF Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Line capacitance Table 2-4 CL Values Min. Typ. Max. - 1.2 1.8 ESD Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol 1) Clamping voltage VCL Clamping voltage2) VCL Values Unit Note / Test Condition V VESD = 8 kV, tp= 30 ns contact discharge V Min. Typ. Max. - 8 - - 5 8.5 10.5 - tp = 8/20 µs IPP = 1 A IPP = 12 A IPP = 18 A - 9.5 12.5 - tp = 100 ns IPP = 16 A IPP = 30 A Clamping voltage3) Dynamic resistance3) RDYN 0.23 Ω 1) VESD according to IEC61000-4-2 (R = 330 Ω, C = 150 pF discharge network) 2) IPP according to IEC61000-4-5 (tp = 8/20 μs) 3)ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitive Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristic between ITLP1 = 10 A and ITLP2 = 40 A. Please refer to Application Note AN210 [1] Final Data Sheet 5 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Typical Characteristics at TA = 25 °C, unless otherwise specified Typical Characteristics at TA = 25 °C, unless otherwise specified 3 10-6 -7 10 10-8 IR [mA] 10-9 10-10 10-11 10-12 -13 10 -3.5 -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 VR [V] 1 1.5 2 2.5 3 3.5 3 3.5 Figure 3-1 Reverse current: IR = f(VR) 4 3.5 3 CL [pF] 2.5 2 1.5 1 0.5 0 -3.5 -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 VR [V] 1 1.5 2 2.5 Figure 3-2 Line capacitance: CL = f(VR), f = 1MHz Final Data Sheet 6 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Typical Characteristics at TA = 25 °C, unless otherwise specified 60 30 ESD300-B1-02LRH RDYN 50 25 40 20 30 15 20 10 10 5 0 0 -10 -5 -20 -10 Equivalent VIEC [kV] ITLP [A] RDYN = 0.223 Ω RDYN = 0.227 Ω -30 -15 -40 -20 -50 -25 -60 -20 -15 -10 -5 0 5 10 15 -30 20 VTLP [V] Figure 3-3 Clamping voltage (TLP): ITLP = f(VTLP) according ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = ns to t2 = 60 ns, extraction of dynamic resistance using squares fit to TLP characteristics between ITLP1 = 10 A and ITLP2 = 40 A. Please refer to Application Note AN210 [1] Final Data Sheet 7 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Typical Characteristics at TA = 25 °C, unless otherwise specified 25 ESD300-B1-02LRH RDYN 20 RDYN = 0.3 Ω 15 10 IPP [A] 5 0 -5 -10 RDYN = 0.3 Ω -15 -20 -25 -15 -10 -5 0 VCL [V] 5 10 15 Figure 3-4 Pulse current (IEC61000-4-5) versus clamping voltage: IPP = f(VCL) Final Data Sheet 8 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Typical Characteristics at TA = 25 °C, unless otherwise specified 70 Scope: 6 GHz, 20 GS/s 60 50 VCL [V] 40 VCL-max-peak = 64 V 30 VCL-30ns-peak = 8 V 20 10 0 -10 -20 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-5 IEC61000-4-2 : VCL = f(t), 8 kV positive pulse from pin 1 to pin 2 20 Scope: 6 GHz, 20 GS/s 10 0 VCL [V] -10 -20 -30 -40 VCL-max-peak = -63 V -50 VCL-30ns-peak = -8 V -60 -70 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-6 IEC61000-4-2 : VCL = f(t), 8 kV negative pulse from pin 1 to pin 2 Final Data Sheet 9 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Typical Characteristics at TA = 25 °C, unless otherwise specified 100 Scope: 6 GHz, 20 GS/s 80 VCL [V] 60 VCL-max-peak = 92 V 40 VCL-30ns-peak = 11 V 20 0 -20 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-7 IEC61000-4-2 : VCL = f(t), 15 kV positive pulse from pin 1 to pin 2 20 Scope: 6 GHz, 20 GS/s 0 VCL [V] -20 -40 VCL-max-peak = -91 V -60 VCL-30ns-peak = -10 V -80 -100 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-8 IEC61000-4-2 : VCL = f(t), 15 kV negative pulse from pin 1 to pin 2 Final Data Sheet 10 Revision 1.2, 2013-11-26 ESD300-B1-02LRH Package Information 4 Package Information 4.1 TSLP-2-17 Top view Bottom view 0.39 +0.01 -0.03 0.6 ±0.05 0.05 MAX. 1±0.05 0.65 ±0.05 2 0.25 ±0.035 1) 1 0.5 ±0.035 1) Cathode marking 1) Dimension applies to plated terminal TSLP-2-7-PO V02 0.45 Copper Solder mask 0.375 0.35 0.275 1 0.925 0.3 0.35 0.6 0.275 Figure 4-1 TSLP-2-17 Package outline (dimension in mm) Stencil apertures TSLP-2-7-FP V01 Figure 4-2 TSLP-2-17 Footprint (dimension in mm) 0.5 1.16 8 4 0.76 Orientation marking TSLP-2-7-TP V03 Figure 4-3 TSLP-2-17 Packing (dimension in mm) Type code 12 Cathode marking TSLP-2-18-MK V01 Figure 4-4 TSLP-2-17 Marking (example) Final Data Sheet 11 Revision 1.2, 2013-11-26 ESD300-B1-02LRH References References [1] Infineon AG - Application Note AN210: Effective ESD Protection design at System Level Using VF-TLP Characterization Methodology Final Data Sheet 12 Revision 1.2, 2013-11-26 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG
ESD300B102LRHE6327XTSA1 价格&库存

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