IAUS180N04S4N015

IAUS180N04S4N015 OptiMOS™-T2 Power-Transistor Product Summary VDS 40 V RDS(on) 1.5 m ID 180 A Features PG-HSOG-8-1 • N-channel - Enhancement mode Tab • AEC qualified • MSL1 up to 260°C peak reflow 8 1 • 175°C operating temperature • Green product (RoHS compliant) Tab 1 • Ultra low Rds(on) 8 • 100% Avalanche tested Type Package Marking IAUS180N04S4N015 PG-HSOG-8-1 A04S4N15 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current ID Conditions T C=25°C, V GS=10V1) T C=100 °C, V GS=10 V2) Value 180 Unit A 169 Pulsed drain current2) I D,pulse T C=25 °C 720 Avalanche energy, single pulse2) E AS I D=90 A 320 mJ Avalanche current, single pulse I AS - 180 A Gate source voltage V GS - ±20 V Power dissipation P tot T C=25 °C 166 W Operating and storage temperature T j, T stg - -55 ... +175 °C Rev. 1.0 page 1 2018-06-06 IAUS180N04S4N015 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 0.9 SMD version, device on PCB R thJA minimal footprint - - 62 6 cm2 cooling area3) - - 40 K/W • Green product (RoHS compliant) Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 40 - - Gate threshold voltage V GS(th) V DS=V GS, I D=110 µA 2.0 3.0 4.0 Zero gate voltage drain current I DSS V DS=40 V, V GS=0 V, T j=25 °C - 0.1 10 - 1 20 V DS=18 V, V GS=0 V, T j=85 °C2) V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance RDS(on) V GS=10 V, I D=100 A - 1.2 1.5 mΩ Rev. 1.0 page 2 2018-06-06 IAUS180N04S4N015 Parameter Symbol Values Conditions Unit min. typ. max. - 8218 10683 pF - 1840 2392 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 63 145 Turn-on delay time t d(on) - 25 - Rise time tr - 10 - Turn-off delay time t d(off) - 32 - Fall time tf - 25 - Gate to source charge Q gs - 47 61 Gate to drain charge Q gd - 15 38 Gate charge total Qg - 103 134 Gate plateau voltage V plateau - 5.6 - V - - 180 A - - 720 - 0.9 1.3 V - 58 - ns - 64 - nC V GS=0 V, V DS=25 V, f =1 MHz V DD=20 V, V GS=10 V, I D=180 A, R G=3.5  ns Gate Charge Characteristics2) V DD=32 V, I D=180 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD Reverse recovery time2) t rr Reverse recovery charge2) Q rr T C=25 °C V GS=0 V, I F=100 A, T j=25 °C V R=20 V, I F=50A, di F/dt =100 A/µs 1) Current is limited by bondwire; with an R thJC = 0.9 K/W the chip is able to carry 255A at 25°C. 2) Defined by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2018-06-06 IAUS180N04S4N015 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS ≥ 6 V 200 200 150 150 ID [A] Ptot [W] 1 Power dissipation 100 50 100 50 0 0 0 50 100 150 200 0 50 100 TC [°C] 150 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 100 1 µs 0.5 10 µs 100 µs 100 200 0.1 0.05 10-1 ID [A] ZthJC [K/W] 1 ms 10 0.01 single pulse 10-2 1 10-3 0.1 1 10 100 VDS [V] Rev. 1.0 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2018-06-06 IAUS180N04S4N015 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = (I D); T j = 25 °C parameter: V GS parameter: V GS 12 720 10 540 8 10 V RDS(on) [m] ID [A] 6V 5V 6.5 V 360 5.5V 6 6.5 V 6V 4 180 5.5 V 2 10 V 5V 0 0 0 1 2 3 4 5 6 0 7 180 360 540 720 ID [A] VDS [V] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 100 A; V GS = 10 V 720 2.5 540 2 RDS(on) [m] ID [A] parameter: T j 360 1.5 1 180 175 °C -55 °C 25 °C 0.5 0 2 4 6 8 -20 20 60 100 140 180 Tj [°C] VGS [V] Rev. 1.0 -60 page 5 2018-06-06 IAUS180N04S4N015 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 10000 4 Ciss 3.5 Coss 1100 µA 1000 C [pF] VGS(th) [V] 3 110 µA 2.5 100 2 Crss 1.5 10 1 -60 -20 20 60 100 140 0 180 5 10 15 20 25 30 VDS [V] Tj [°C] 11 Typical forward diode characteristicis 12 Typ. avalanche characteristics IF = f(VSD) I AS = f(t AV) parameter: T j parameter: Tj(start) 1000 1000 100 100 175 °C 100 °C 150 °C IAV [A] IF [A] 25 °C 25 °C 10 10 1 1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD [V] Rev. 1.0 1 10 100 1000 tAV [µs] page 6 2018-06-06 IAUS180N04S4N015 13 Typical avalanche energy 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D_typ = 1 mA parameter: I D 44 800 43 45 A 600 VBR(DSS) [V] EAS [mJ] 42 400 90 A 41 40 200 180 A 39 38 0 25 75 125 -60 175 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 180 A pulsed parameter: V DD 12 V GS 10 8 VGS [V] Qg 8V 32 V 6 4 Q gate 2 Q gs Q gd 0 0 40 80 120 Qgate [nC] Rev. 1.0 page 7 2018-06-06 IAUS180N04S4N015 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2018 All Rights Reserved. Legal Disclaimer • Green product (RoHS compliant) or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2018-06-06 IAUS180N04S4N015 Revision History Version Date Changes Version 1.0 2018-04-10 Final Datasheet Rev. 1.0 page 9 2018-06-06