IAUS200N08S5N023

IAUS200N08S5N023 OptiMOS™-5 Power-Transistor Product Summary VDS 80 V RDS(on) 2.3 mW ID 200 A Features • N-channel - Enhancement mode PG-HSOG-8-1 • AEC qualified Tab • MSL1 up to 260°C peak reflow • 175°C operating temperature 8 • Green product (RoHS compliant) • Ultra low Rds(on) 1 Drain Tab • 100% Avalanche tested Gate pin 1 Type Package Marking IAUS200N08S5N023 PG-HSOG-8-1 A08S5N23 Source pin 2 - 8 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current ID Conditions T C=25°C, V GS=10V1) T C=100 °C, Value 200 V GS=10 V2) 148 Unit A Pulsed drain current2) I D,pulse T C=25 °C 800 Avalanche energy, single pulse2) E AS I D=100 A 330 mJ Avalanche current, single pulse I AS - 200 A Gate source voltage V GS - ±20 V Power dissipation P tot T C=25 °C 200 W Operating and storage temperature T j, T stg - -55 ... +175 °C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Rev. 1.0 page 1 2018-05-25 IAUS200N08S5N023 Parameter Symbol Values Conditions Unit min. typ. max. - - 0.7 Thermal characteristics2) Thermal resistance, junction - case R thJC - K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage2) V (BR)DSS V GS=0 V, I D=1 mA 80 - - Gate threshold voltage V GS(th) V DS=V GS, I D=130 µA 2.2 3 3.8 Zero gate voltage drain current2) I DSS V DS=80 V, V GS=0 V, T j=25 °C - 0.1 1 T j=85 °C2) - 1 20 V DS=40 V, V GS=0 V, V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance RDS(on) V GS=6 V, I D=50 A - 2.7 3.7 mΩ V GS=10 V, I D=100 A - 1.8 2.3 Rev. 1.0 page 2 2018-05-25 IAUS200N08S5N023 Parameter Symbol Values Conditions Unit min. typ. max. - 5900 7670 - 980 1274 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 45 68 Turn-on delay time t d(on) - 16 - Rise time tr - 11 - Turn-off delay time t d(off) - 30 - Fall time tf - 32 - Gate to source charge Q gs - 28 36 Gate to drain charge Q gd - 18 28 Gate charge total Qg - 85 110 Gate plateau voltage V plateau - 4.8 - V - - 200 A - - 800 - 0.9 1.2 V - 65 - ns - 110 - nC V GS=0 V, V DS=40 V, f =1 MHz V DD=40 V, V GS=10 V, I D=100 A, R G=3.5 W pF ns Gate Charge Characteristics2) V DD=40 V, I D=100 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD Reverse recovery time2) t rr Reverse recovery charge2) Q rr T C=25 °C V GS=0 V, I F=100 A, T j=25 °C V R=40 V, I F=50A, di F/dt =100 A/µs 1) Current is limited by bondwire; with an R thJC = 0.7 K/W the chip is able to carry 216A at 25°C. 2) Defined by design. Not subject to production test. Rev. 1.0 page 3 2018-05-25 IAUS200N08S5N023 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS ≥ 6 V 200 200 150 150 ID [A] Ptot [W] 1 Power dissipation 100 50 100 50 0 0 0 50 100 150 200 0 50 100 TC [°C] 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 100 1 µs 10 µs 100 µs 1 ms 100 ID [A] ZthJC [K/W] 10-1 10 10-2 1 10-3 0.1 1 10 100 VDS [V] Rev. 1.0 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2018-05-25 IAUS200N08S5N023 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = f(I D); T j = 25 °C parameter: V GS parameter: V GS 12 10 V 700 6.5 V 10 6V 4.5 V 8 RDS(on) [mW] ID [A] 525 5.5 V 350 6 5V 4 5V 5.5 V 6V 175 6.5 V 2 10 V 4.5 V 0 0 0 1 2 3 4 5 6 0 7 50 100 150 ID [A] VDS [V] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 80 A; V GS = 10 V parameter: T j 700 4 3.5 525 RDS(on) [mW] ID [A] 3 350 2.5 2 175 1.5 175 °C 25 °C -55 °C 0 2 4 1 6 8 -20 20 60 100 140 180 Tj [°C] VGS [V] Rev. 1.0 -60 page 5 2018-05-25 IAUS200N08S5N023 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 4 Ciss 3.5 1300 µA 103 130 µA 2.5 Coss C [pF] VGS(th) [V] 3 102 2 Crss 1.5 1 -60 -20 20 60 100 140 0 180 10 20 30 40 50 60 70 80 VDS [V] Tj [°C] 11 Typical forward diode characteristics 12 Typ. avalanche characteristics IF = f(VSD) I AS = f(t AV) parameter: T j parameter: Tj(start) 103 1000 102 100 IAV [A] IF [A] 25 °C 100 °C 25 °C 175 °C 150 °C 10 101 1 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD [V] Rev. 1.0 1 10 100 1000 tAV [µs] page 6 2018-05-25 IAUS200N08S5N023 13 Typical avalanche energy 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D_typ = 1 mA parameter: I D 88 600 86 50 A VBR(DSS) [V] EAS [mJ] 84 300 100 A 82 80 200 A 78 76 0 25 75 125 -60 175 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 100 A pulsed parameter: V DD 10 V GS 9 16 V 8 Qg 40 V 64 V 7 VGS [V] 6 5 4 3 2 Q gate 1 Q gs Q gd 0 0 25 50 75 Qgate [nC] Rev. 1.0 page 7 2018-05-25 IAUS200N08S5N023 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2018 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2018-05-25 IAUS200N08S5N023 Revision History Version Date Changes Version 1.0 25.05.2018 Final Data Sheet Rev. 1.0 page 9 2018-05-25