ICE3AR10080CJZXKLA1

Ve r si on 2 .0 , 1 1 Ja n 2 01 2 ® N e v e r s t o p t h i n k i n g . CoolSET®-F3R80 ICE3AR10080CJZ Revision History: 2012-1-11 Datasheet Version 2.0 Previous Version: 0.1 19 Revise typo in tie up resistor at BRL pin to disable brownout feature. For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http:// www.infineon.com CoolMOS®, CoolSET® are trademarks of Infineon Technologies AG. Edition 2012-1-11 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 1/11/12. All Rights Reserved. Attention please! The information given in this data sheet shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. ® ICE3AR10080CJZ Off-Line SMPS Current Mode Controller with integrated 800V CoolMOS® and Startup cell (brownout & CCM) in DIP-7 Product Highlights • 800V avalanche rugged CoolMOS® with startup cell • CCM and DCM operation with slope compensation • Active Burst Mode to reach the lowest Standby Power 8V, the brownout circuit starts to operate (Figure 30). Since the UVLO is still at low level as the Vcc voltage does not reach the 17V UVLO “ON” voltage. The NAND gate G20 will release a low signal to the flip flop FF2 and the negative output of FF2 will release a high signal. Hence it is in brownout mode during the system starts up. 10.5V VCS Figure 31 C1a BRL 3.7.4 Fast AC reset During normal operation, the ICE3ARxx80CJZ can be latched by pulling down the BRL voltage below 0.4V for 210ms. There are 2 condtions to reset the latch feature. The first one is to pull down the Vcc voltage to below 8V. However, the Vcc drop would take quite a long time if it is by normal AC power down. The second one is to have a slow rise time of the BRL voltage from 0.4V to 1V for at least 450ms after the BRL pin is pulled down. This timing can be achieved by the AC recycle. And it is also called the fast AC reset (Figure 32). 1V Q R Q Vac FF2 C1b RBO2 S RBO0 G21 CBR0 Blanking Time 270µs UVLO G20 RBO1 0.4V Brownout detection circuit Latch Enable Signal Once the system enters the brownout mode, there will be no switching pulse and the IC enters into another type auto-restart mode which is similar to the protection auto-restart mode but the IC will monitor the BRL signal in each restart cycle (Figure 31). Blanking time 210us C2a Blanking time 450µs Latch Mode & G2 BRL RBO2 1V Vcc 8V Figure 32 C3 0.4V Control Unit TLE Figure 30 Brownout mode waveform If the brownout feature is not needed, it needs to tie the BRL pin to the Vcc pin through a current limiting resistor, 5MW~10MW. The BRL pin cannot be in floating condition. CBR0 RBO1 t t Brownout mode 1.25V Startup and detect BBL voltage 17V Vac RBO0 Brownout detected VVCC C2b G3 C11 Latch Reset Control Unit Latch and fast AC reset Figure 33 shows different latch and reset cases. Case a : not latched (solid line); the timing below 0.4V is 150ms and is less than 210ms. Version 2.0 19 11 Jan 2012 CoolSET®-F3R80 ICE3AR10080CJZ Functional Description Case b : latched (dashed line); the timing below 0.4V is 450ms which is larger than 210ms. No latch reset as the rise time from 0.4V to 1V is 300ms which is less than the 450ms. Case c : latched and reset (dotted line); the timing below 0.4V is 710ms which is larger than 210ms. But the rise time from 0.4V to 1V is 560ms which is larger than the latch reset blanking time of 450ms. VBRL 150µs 710µs 450µs 300µs 560µs Latched and reset (c) Latched (b) Not latched (a) 1V 0.4V t Figure 33 Version 2.0 Latch and fast AC reset example 20 11 Jan 2012 CoolSET®-F3R80 ICE3AR10080CJZ Electrical Characteristics 4 Electrical Characteristics Note: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are not violated. 4.1 Note: Absolute Maximum Ratings Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7 (VCC) is discharged before assembling the application circuit. Ta=25°C unless otherwise specified. Parameter Symbol Limit Values Unit Remarks min. max. VDS - 800 V ID_Puls - 1.10 A Avalanche energy, repetitive tAR limited by max. Tj=150°C1) EAR - 0.011 mJ Avalanche current, repetitive tAR limited by max. Tj=150°C IAR - 0.44 A VCC Supply Voltage VVCC -0.3 27 V FBB Voltage VFBB -0.3 5.5 V BRL Voltage VBRL -0.3 5.5 V CS Voltage VCS -0.3 5.5 V Junction Temperature Tj -40 150 °C Storage Temperature TS -55 150 °C Thermal Resistance Junction -Ambient RthJA - 96 K/W Soldering temperature, wavesoldering only allowed at leads Tsold - 260 °C 1.6mm (0.063in.) from case for 10s ESD Capability (incl. Drain Pin) VESD - 2 kV Human body model2) Drain Source Voltage Pulse drain current, tp limited by Tjmax Controller & CoolMOS® 1) Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f 2) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kW series resistor) Version 2.0 21 11 Jan 2012 CoolSET®-F3R80 ICE3AR10080CJZ Electrical Characteristics 4.2 Note: Operating Range Within the operating range the IC operates as described in the functional description. Parameter Symbol Limit Values min. max. Unit Remarks VCC Supply Voltage VVCC VVCCoff 24.7 V Max value limited due to Vcc OVP Junction Temperature of Controller TjCon -25 130 °C Max value limited due to thermal shut down of controller Junction Temperature of CoolMOS® TjCoolMOS -25 150 °C 4.3 4.3.1 Note: Characteristics Supply Section The electrical characteristics involve the spread of values within the specified supply voltage and junction temperature range TJ from – 25 °C to 125 °C. Typical values represent the median values, which are related to 25°C. If not otherwise stated, a supply voltage of VCC = 17 V is assumed. Parameter Symbol Limit Values Unit Test Condition min. typ. max. IVCCstart - 210 300 mA VVCC =16V IVCCcharge1 - - 5.0 mA VVCC = 0V IVCCcharge2 0.55 1.0 1.60 mA VVCC = 1V IVCCcharge3 0.38 0.75 - mA VVCC =16V Leakage Current of Start Up Cell and CoolMOS® IStartLeak - 0.2 50 mA VDrain = 650V at Tj=100°C 1) Supply Current with Inactive Gate IVCCsup1 - 1.9 3.2 mA Supply Current with Active Gate IVCCsup2 - 3.4 4.8 mA IFBB = 0A Supply Current in Latched Off Mode with Inactive Gate IVCClatch - 420 - mA IFBB = 0A Supply Current in Auto Restart Mode with Inactive Gate IVCCrestart - 420 - mA IFBB = 0A Supply Current in Active Burst Mode with Inactive Gate IVCCburst1 - 620 950 mA VFBB = 2.5V IVCCburst2 - 620 950 mA VVCC = 11.5V, VFBB = 2.5V VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis VVCCon VVCCoff VVCChys 16.0 9.8 - 17.0 10.5 6.5 18.0 11.2 - V V V Start Up Current VCC Charge Current 1) The parameter is not subjected to production test - verified by design/characterization Version 2.0 22 11 Jan 2012 CoolSET®-F3R80 ICE3AR10080CJZ Electrical Characteristics 4.3.2 Internal Voltage Reference Parameter Trimmed Reference Voltage 4.3.3 Symbol VREF Limit Values Unit min. typ. max. 4.90 5.00 5.10 V Test Condition measured at pin FBB IFBB = 0A PWM Section Parameter Symbol Limit Values Unit Test Condition min. typ. max. fOSC1 87 100 113 kHz fOSC2 92 100 108 kHz Tj = 25°C Frequency Jittering Range fjitter - ±4.0 - kHz Tj = 25°C Frequency Jittering period Tjitter - 4.0 - ms Tj = 25°C Max. Duty Cycle Dmax 0.70 0.75 0.80 Min. Duty Cycle Dmin - - 0 PWM-OP Gain AV 3.17 3.25 3.33 VOffset-Ramp - 0.60 - V VFBB Operating Range Min Level VFBmin - 0.7 - V VFBB Operating Range Max level VFBmax - - 4.4 V FBB Pull-Up Resistor RFB 9.0 15.4 22.0 kW Slope Compensation rate MC 45 50 55 mV/ms Fixed Oscillator Frequency Voltage Ramp Offset 1) VFBB < 0.3V dVsense / dt = 0.134V/ms , limited by Comparator C41) CS=0V The parameter is not subjected to production test - verified by design/characterization 4.3.4 Soft Start time Parameter Soft Start time Version 2.0 Symbol tSS Limit Values Unit min. typ. max. - 10 - 23 Test Condition ms 11 Jan 2012 CoolSET®-F3R80 ICE3AR10080CJZ Electrical Characteristics 4.3.5 Control Unit Parameter Symbol Limit Values Unit min. typ. max. Test Condition Brownout reference voltage for comparator C1a VBO_L 1.14 1.25 1.36 V Brownout reference voltage for comparator C1b VBO_E 0.91 1 1.09 V Leakage current of BRL pin Ileakage -0.5 - 0.5 mA Blanking time to enter brownout mode VBKC1b 190 270 310 ms Fast AC reset voltage for comparator C2a VC2a 0.3 0.4 0.5 V Fast AC reset voltage for comparator C2b VC2b 0.91 1 1.09 V VBKC2a 315 450 585 ms Isel 2.8 3.5 4.2 mA Burst mode selection reference voltage Vref1 1.69 1.80 1.91 V Vref2 3.78 4.00 4.22 V Over Load Limit for Comparator C4 VFBC4 4.40 4.50 4.72 V 15% Pin_max VFB_burst1 1.77 1.84 1.91 V Vfbb>Vref2 10% Pin_max VFB_burst2 1.50 1.61 1.72 V Vref1