IFCM20U65GDXKMA1

Control Integrated POwer System (CIPOS™) IFCM20U65GD Datasheet Datasheet www.infineon.com Please read the Important Notice and Warnings at the end of this document page 1 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Table of contents Table of contents ................................................................................................................................................... 2 CIPOS™ Control Integrated POwer System ............................................................................................................ 3 Features .................................................................................................................................................................. 3 Target Applications ...................................................................................................................................................... 3 Description .................................................................................................................................................................. 3 System Configuration .................................................................................................................................................. 3 Pin Configuration ................................................................................................................................................... 4 Internal Electrical Schematic ................................................................................................................................. 4 Pin Assignment ...................................................................................................................................................... 5 Pin Description ...................................................................................................................................................... 5 LIN(X, Y, Z) (IGBT control pins, Pin 7, 8, 9) ................................................................................................................... 5 VFO (Fault-output, Pin 12) ........................................................................................................................................... 6 NTC (Thermistor, Pin 15) ............................................................................................................................................. 6 ITRIP (Over current detection function, Pin 13).......................................................................................................... 6 VDD, VSS (Control supply and reference, Pin 11, 14) .................................................................................................. 6 NX, NY, NZ (IGBT emitter, Pin 17, 19, 21) ..................................................................................................................... 6 X, Y, Z (IGBT collector, Pin 18, 20, 22) .......................................................................................................................... 6 P (Positive output voltage, Pin 23) .............................................................................................................................. 6 Absolute Maximum Ratings ................................................................................................................................... 7 Module Section ............................................................................................................................................................ 7 Power Section .............................................................................................................................................................. 7 Control Section ............................................................................................................................................................ 8 Recommended Operation Conditions ................................................................................................................... 8 Static Parameters .................................................................................................................................................. 9 Dynamic Parameters ........................................................................................................................................... 10 Thermistor ........................................................................................................................................................... 11 Mechanical Characteristics and Ratings .............................................................................................................. 11 Electrical characteristic ....................................................................................................................................... 14 Package Outline ................................................................................................................................................... 15 Revision history ................................................................................................................................................... 16 Datasheet 2 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD CIPOS™ Control Integrated POwer System Dual In-Line Intelligent Power Module Three Phase Interleaved PFC 650V / 20A Features Description Dual In-Line molded module The CIPOS™ module family offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs.  TRENCHSTOP™ 5  Rapid switching emitter controlled diode  Rugged SOI gate driver technology with stability        against transient Over current shutdown Under-voltage lockout All of 3 switches turn off during protection Temperature monitor Emitter pins accessible for all phase current monitoring (open emitter) Lead-free terminal plating; RoHS compliant Very low thermal resistance due to DCB It is designed to enhance the system efficiency by improvement of power factor. The package concept is specially adapted to power applications, which need good thermal conduction and electrical isolation, but also EMI-save control and overload protection. TRENCHSTOP™ 5 are combined with an optimized SOI gate driver for excellent electrical performance. System Configuration Target Applications  3-Phase Interleaved PFC  3-Phase Interleaved PFC with TRENCHSTOP™ 5 and Rapid switching emitter controlled diode  SOI gate driver  Thermistor  Pin-to-heatsink clearance distance typ. 1.6mm Datasheet 3 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Pin Configuration Bottom View (24) NC (1) NC (2) NC (23) P (3) NC (4) NC (22) X (5) NC (6) NC (21) NX (7) LIN(X) (8) LIN(Y) (9) LIN(Z) (10) NC (11) VDD (12) VFO (13) ITRIP (14) VSS (15) NTC (16) NC (20) Y (19) NY (18) Z (17) NZ Figure 1 Pin configuration Internal Electrical Schematic (1) NC (2) NC (24) NC (3) NC (4) NC (23) P (5) NC (6) NC (22) X LO1 (7) LIN(X) LIN1 (8) LIN(Y) LIN2 (9) LIN(Z) LIN3 (21) NX (20) Y (10) NC (11) VDD VDD (12) VFO VFO (13) ITRIP ITRIP (14) VSS VSS (15) NTC LO2 (19) NY (18) Z LO3 (16) NC Figure 2 Datasheet (17) NZ Internal schematic 4 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Pin Assignment Pin Number Pin Name Pin Description 1 NC No Connection 2 NC No Connection 3 NC No Connection 4 NC No Connection 5 NC No Connection 6 NC No Connection 7 LIN(X) X phase IGBT gate driver input 8 LIN(Y) Y phase IGBT gate driver input 9 LIN(Z) Z phase IGBT gate driver input 10 NC No Connection 11 VDD Control supply 12 VFO Fault output 13 ITRIP Over current shutdown input 14 VSS Control negative supply 15 NTC Thermistor 16 NC No Connection 17 NZ Z phase IGBT emitter 18 Z Z phase IGBT collector 19 NY Y phase IGBT emitter 20 Y Y phase IGBT collector 21 NX X phase IGBT emitter 22 X X phase IGBT collector 23 P Positive output voltage 24 NC No Connection Pin Description LIN(X, Y, Z) (IGBT control pins, Pin 7, 8, 9) These pins are positive logic and they are responsible for the control of the integrated IGBT. The Schmitt-trigger input thresholds of them are such to guarantee LSTTL and CMOS compatibility down to 3.3V controller outputs. Pull-down resistor of about 5k is internally provided to pre-bias inputs during supply start-up and a zener clamp is provided for pin protection purposes. Input Schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. CIPOS Schmitt-Trigger LIN Figure 3 a) INPUT NOISE FILTER UZ=10.5V SWITCH LEVEL VIH; VIL VSS Input pin structure tFILIN b) tFILIN LIN LIN The noise filter suppresses control pulses which are below the filter time tFILIN. The filter acts according to Figure 4. Datasheet  5k high LO Figure 4 5 of 17 low LO Input filter timing diagram V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD It is recommended for proper work of this product VDD, VSS (Control supply and reference, Pin 11, 14) not to provide input pulse-width lower than 1μs. VFO (Fault-output, Pin 12) VDD is the control supply and it provides power both to input logic and to output power stage. Input logic is referenced to VSS ground. The VFO pin indicates a module failure in case of under voltage at pin VDD or in case of triggered over current detection at ITRIP. The under-voltage circuit enables the device to operate at power on when a supply voltage of at least a typical voltage of VDDUV+ = 12.1V is present. The IC shuts down all the gate drivers power outputs, when the VDD supply voltage is below VDDUV- = 10.4V. This prevents the external power switches from critically low gate voltage levels during on-state and therefore from excessive power dissipation. CIPOS VDD RON,FLT From ITRIP - Latch VFO 1 VSS Figure 5 From UV detection Internal circuit at pin VFO NX, NY, NZ (IGBT emitter, Pin 17, 19, 21) The IGBT emitters are available for current measurements of each phase. It is recommended to keep the connection to pin VSS as short as possible in order to avoid unnecessary inductive voltage drops. NTC (Thermistor, Pin 15) The NTC pin provides direct access to thermistor, which is referenced to VSS. An external pull-up resistor connected to +5V ensures that the resulting voltage can be directly connected to the microcontroller. X, Y, Z (IGBT collector, Pin 18, 20, 22) These pins are IGBT collector. It is mandatory to connect anti-parallel diode between IGBT collector and emitter. ITRIP (Over current detection function, Pin 13) CIPOS™ provides an over current detection function by connecting the ITRIP input with the IGBT collector current feedback. The ITRIP comparator threshold (typ. 0.47V) is referenced to VSS ground. An input noise filter (typ.: tITRIPMIN = 530ns) prevents the driver to detect false overcurrent events. P (Positive output voltage, Pin 23) The diode cathodes are connected to the output voltage. It is noted that the voltage does not exceed 450 V. Over current detection generates a shutdown of all outputs of the gate driver after the shutdown propagation delay of typically 1000ns. Datasheet 6 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Absolute Maximum Ratings (VDD = 15V and Tj = 25°C, if not stated otherwise) Module Section Description Condition Storage temperature range Isolation test voltage RMS, f=60Hz, t=1min Operating case temperature range Refer to Figure 6 Value Symbol Unit min max Tstg -40 125 °C VISOL 2000 - V TC -40 125 °C Power Section Description Condition Symbol Value min max Unit DC link output voltage of P-N Applied between P-N VPN - 450 V DC link output voltage (surge) of P-N Applied between P-N VPN(surge) - 500 V Max. blocking voltage IC = 250µA VCES 650 - V Repetitive peak reverse voltage IR = 250µA VRRM 650 - V Input RMS current of each phase TJ ≤ 150°C, TC = 25°C TC = 80°C Ii - 20 15 A Maximum peak input current of each phase TJ ≤ 150°C, TC = 25°C less than 1ms, non-repetitive Ii(peak) - 60 A Power dissipation of each IGBT Ptot - 52.3 W Operating junction temperature range TJ -40 150 °C Single IGBT thermal resistance, junction-case RthJC - 2.39 K/W Single diode thermal resistance, junction-case RthJCD - 2.77 K/W Datasheet 7 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Control Section Description Condition Symbol Module supply voltage Input voltage LIN, ITRIP Switching frequency Value Unit min max VDD -1 20 V VIN VITRIP -1 -1 10 V fPWM - 60 kHz Recommended Operation Conditions All voltages are absolute voltages referenced to VSS -potential unless otherwise specified. Description Symbol Value min typ max Unit DC link output voltage of P-N VPN 0 - 450 V Control supply voltage VDD 13.5 15 16.5 V Control supply variation ΔVDD -1 - 1 V/µs Logic input voltages LIN,ITRIP VIN VITRIP 0 0 - 5 5 V Between VSS - N (including surge) VSS -5 - 5 V Figure 6 TC measurement point1 Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and brings wrong or different information. 1 Datasheet 8 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Static Parameters (VDD = 15V and Tj = 25°C, if not stated otherwise) Description Condition Symbol Value Unit min typ max VCE(sat) - 1.7 1.9 2.3 - V IC = 15A Collector-Emitter saturation voltage TJ = 25°C 150°C IF = 15A Diode forward voltage TJ = 25°C 150°C VF - 1.4 1.3 1.85 - V Collector-Emitter leakage current VCE = 650V ICES - - 1 mA Diode reverse leakage current VR = 650V IR - - 1 mA Logic "1" input voltage (LIN) VIH - 2.1 2.5 V Logic "0" input voltage (LIN) VIL 0.7 0.9 - V ITRIP positive going threshold VIT,TH+ 400 470 540 mV ITRIP input hysteresis VIT,HYS 40 70 - mV VDD supply under voltage positive going threshold VDDUV+ 10.8 12.1 13.0 V VDD supply under voltage negative going threshold VDDUV- 9.5 10.4 11.2 V VDD supply under voltage lockout hysteresis VDDUVH 1.0 1.7 - V Quiescent VDD supply current LIN = 0V IQDD - 370 900 µA Input bias current VIN = 5V IIN+ - 1 1.5 mA Input bias current VIN = 0V IIN- - 2 - µA ITRIP input bias current VITRIP = 5V IITRIP+ - 65 150 µA VFO input bias current VFO = 5V, VITRIP = 0V IFO - 2 - nA VFO output voltage IFO = 10mA, VITRIP = 1V VFO - 0.5 - V Datasheet 9 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Dynamic Parameters (VDD = 15V and Tj = 25°C, if not stated otherwise) Description Condition Turn-on propagation delay time Turn-on rise time Turn-on switching time VLIN = 5V, IC = 15A, VDC = 400V Reverse recovery time Turn-off propagation delay time Turn-off fall time Turn-off switching time VLIN = 0V, IC = 15A, VDC = 400V Symbol Value Unit min typ max ton - 585 - ns tr - 20 - ns tc(on) - 105 - ns trr - 100 - ns toff - 630 - ns tf - 10 - ns tc(off) - 20 - ns tITRIPmin - 530 - ns Input filter time ITRIP VITRIP = 1V Input filter time at LIN for turn on and off VLIN = 0V & 5V tFILIN - 290 - ns Fault clear time after ITRIP-fault VITRIP = 1V tFLTCLR 40 - - µs IGBT turn-on energy (includes reverse recovery of diode) VDC = 400V, IC = 15A TJ = 25°C 150°C Eon - 440 550 - µJ IGBT turn-off energy VDC = 400V, IC = 15A TJ = 25°C 150°C Eoff - 35 65 - µJ Diode recovery energy VDC = 400V, IC = 15A TJ = 25°C 150°C Erec - 75 145 - µJ Datasheet 10 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Thermistor Description Condition Resistor Value Symbol typ max RNTC - 85 - k B(25/100) - 4092 - K TNTC = 25°C B-constant of NTC (Negative Temperature Coefficient) Unit min 3500 2500 2000 1500 Min. Typ. Max. 30 Thermistor resistance [kΩ ] Thermistor resistance [kΩ ] 35 3000 25 20 15 10 5 0 50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130 1000 Thermistor temperature [℃] 500 0 -40 -30 -20 -10 0 Figure 7 10 20 30 40 50 60 70 80 90 100 110 120 130 Thermistor temperature [℃] Thermistor resistance – temperature curve and table (For more information, please refer to the application note ‘AN CIPOS™-Mini 1 Technical description’) Mechanical Characteristics and Ratings Description Condition Value min typ max Unit Mounting torque M3 screw and washer 0.49 - 0.78 Nm Flatness Refer to Figure 8 -50 - 100 µm - 6.58 - g Weight Figure 8 Datasheet Flatness measurement position 11 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Circuit of a Typical Application (1) NC (24) NC (2) NC (23) P (3) NC (4) NC (22) X (5) NC #7 (6) NC #1 #4 LO1 (7) LIN(X) (8) LIN(Y) Micro Controller (21) NX LIN1 LIN2 (9) LIN(Z) LIN3 (20) Y (10) NC 5 or 3.3V line VDD line (11) VDD (12) VF O (13) ITRIP (14) VSS #7 VDD #5 (19) NY #6 VF O ITRIP (18) Z VSS #7 (15) NTC LO2 LO3 (16) NC (17) NZ ~ AC Temperature monitor #3 #2 X-phase current sensing Y-phase current sensing Z-phase current sensing Input surge voltage sensing #8 Figure 9 Typical application circuit Because CIPOS™ Mini PFC has very high speed switching characteristics, considerable large surge voltage between P and N terminals and switching noise on signaling path are generated easily. Please pay attention to the below items for optimized application circuit design. 1. Input circuit - To reduce input signal noise by high speed switching, the RIN and CIN filter circuit should be mounted. (100Ω, 1nF) - CIN should be placed as close to VSS pin as possible. 2. Itrip circuit - To prevent protection function errors, CITRIP should be placed as close to Itrip and VSS pins as possible. 3. VFO circuit - VFO output is an open drain output. This signal line should be pulled up to the positive side of the 5V/3.3V logic power supply with a proper resistor RPU. It is recommended that RC filter be placed as close to the controller as possible. 4. Snubber capacitor - The wiring between CIPOS™ Mini PFC and snubber capacitor including shunt resistor should be as short as possible. 5. Shunt resistor - The shunt resistor of SMD type should be used for reducing its stray inductance. 6. Ground pattern - Ground pattern should be separated at only one point of shunt resistor as short as possible. 7. It is mandatory to connect anti-parallel diode (2A, voltage rating higher than 650V) to PFC IGBT. 8. Input surge voltage protection circuit - This protection circuit is necessary for PFC IGBT to be protected from excessive surge voltage. Datasheet 12 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Switching Times Definition LINx 2.1V 0.9V trr toff ton 10% iCx 90% 90% tf 10% tr 10% 10% 10% vCEx tc(on) tc(off) Figure 10 Datasheet Switching times definition 13 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Electrical characteristic 60 45 40 35 30 VDD=15V VDD=20V 25 20 15 10 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 50 45 40 35 30 25 4.0 20 TJ=25℃ 15 TJ=150℃ VDC=400V VDD=15V 2.75 2.50 2.25 2.00 1.75 TJ=25℃ 1.50 TJ=150℃ 1.25 1.00 0.75 0.50 0.25 30 25 20 15 5 10 15 20 25 30 35 40 45 50 55 5 0 0.0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1.2 VDC=400V VDD=15V 1.1 1.0 0.9 0.8 0.7 0.6 TJ=25℃ 0.5 TJ=150℃ 0.4 0.3 0.2 0.1 60 5 10 15 20 25 30 35 40 45 50 55 TJ=150℃ 650 625 600 575 200 175 150 125 100 500 VDC=400V VDD=15V 225 200 175 150 125 100 TJ=25℃ 75 TJ=150℃ 50 10 15 20 25 30 35 40 45 50 55 60 850 5 10 15 20 25 30 35 40 45 50 55 100 90 TJ=25℃ 70 TJ=150℃ 60 50 40 30 30 775 35 40 45 50 55 60 55 60 TJ=25℃ 750 TJ=150℃ 725 700 675 650 625 600 0 5 10 15 20 25 30 35 40 45 50 Ic, Collector current [A] Typ. Turn off propagation delay time 10 ZthJC, transient thermal resistance [K/W] trr, Reverse recovery time [ns] 110 25 800 60 VDC=400V VDD=15V 200 120 20 825 220 VDC=400V VDD=15V 15 VDC=400V VDD=15V 875 Typ. Turn on switching time 150 80 10 900 Ic, Collector current [A] Typ. Turn on propagation delay time 130 5 550 0 Ic, Collector current [A] 140 Tj=150C 25 575 0 5 Tj=25C 50 Typ. Reverse recovery energy loss 25 0 75 Ic, Collector current [A] 550 525 3.0 225 0 toff, Turn off propagation delay time [ns] tc(on), Turn on switching time [ns] 675 2.5 250 60 250 725 2.0 VDC=400V VDD=15V 275 Typ. Turn off switching energy loss 750 1.5 300 Ic, Collector current [A] VDC=400V VDD=15V 1.0 0 0 800 TJ=25℃ 0.5 Typ. Diode forward voltage Typ. Turn on switching energy loss 700 TJ=150℃ Typ. Collector – Emitter saturation voltage Ic, Collector current [A] 775 TJ=25℃ 10 5 0.0 0 ton, Turn on propagation delay time [ns] 35 VF, Forward voltage [V] 0.00 tc(off), Turn off switching time [ns] 40 VCE(sat), Collector - Emitter voltage [V] Eoff, Turn off switching energy loss [mJ] Eon, Turn on switching energy loss [mJ] 3.00 45 10 VCE(sat), Collector - Emitter voltage [V] Typ. Collector – Emitter saturation voltage 55 50 IF, Forward current [A] 50 60 VDD=15V 55 Erec, Reverse recovery energy loss [uJ] TJ=25℃ 55 Ic, Collector - Emitter current [A] Ic, Collector - Emitter current [A] 60 180 160 140 120 100 80 TJ=25℃ TJ=150℃ 60 1 0.1 D : duty ratio D=50% D=20% D=10% D=5% D=2% Single pulse 0.01 1E-3 40 20 20 10 0 0 0 5 10 15 20 25 30 35 40 45 Ic, Collector current [A] Typ. Turn off switching time Datasheet 50 55 60 0 5 10 15 20 25 30 35 40 45 Ic, Collector current [A] Typ. Reverse recovery time 14 of 17 50 55 60 1E-4 1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1 1 10 100 tP, Pulse width [sec.] IGBT transient thermal resistance at all IGBTs operation V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Package Outline Datasheet 15 of 17 V 2.2 2017-09-06 Control Integrated POwer System (CIPOS™) IFCM20U65GD Revision history Document version Date of release Description of changes V 2.1 Jun. 2017 Package outline update V 2.2 Sep. 2017 Maximum operating case temperature, Tc= 125°C Datasheet 16 of 17 V 2.2 2017-09-06 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2017-09-06 Published by Infineon Technologies AG 81726 München, Germany © 2017 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: erratum@infineon.com Document reference ifx1 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. 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