IFX007TAUMA1

High Current PN Half Bridge with Integrated Driver IFX007T Industrial & Multi Purpose NovalithIC™ 1 Overview Quality Requirement Category: Industrial Features • Path resistance of max. 12.8 mΩ @ 25°C (typ. 10.0 mΩ @ 25°C) High side: max. 6.5 mΩ @ 25°C (typ. 5.3 mΩ @ 25°C) Low side: max. 6.3 mΩ @ 25°C (typ. 4.7 mΩ @ 25°C) • Enhanced switching speed for reduced switching losses • Capable for high PWM frequency combined with active freewheeling • Switched mode current limitation for reduced power dissipation in overcurrent • Current limitation level of 55 A min. • Status flag diagnosis with current sense capability • Overtemperature shutdown with latch behavior • Undervoltage shutdown • Driver circuit with logic level inputs • Adjustable slew rates for optimized EMI • Operation up to 40 V • Green Product (RoHS compliant) • JESD47I Qualified Description The IFX007T is an integrated high current half bridge for motor drive applications. It is part of the Industrial & Multi Purpose NovalithIC™ family containing one p-channel high-side MOSFET and one n-channel low-side MOSFET with an integrated driver IC in one package. Due to the p-channel high-side switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, undervoltage, overcurrent and short circuit. The IFX007T provides a cost optimized solution for protected high current PWM motor drives with very low board space consumption. Preliminary Data Sheet www.infineon.com 1 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Overview Type Package Marking IFX007T PG-TO263-7-1 IFX007T Preliminary Data Sheet 2 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 2.1 2.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.2.1 5.2.2 5.2.3 5.3 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.4 5.4.1 5.4.2 5.4.3 5.4.4 5.4.5 5.4.6 Block description and characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Supply characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power stages - static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Power stages - dynamic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical characteristics - protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Control and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Dead time generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Adjustable slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status flag diagnosis with current sense capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical characteristics - control and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 6.1 6.2 6.3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWM control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Preliminary Data Sheet 3 6 6 7 7 21 21 21 22 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block diagram 2 Block diagram The IFX007T is part of the Industrial & Multi Purpose NovalithIC™ family containing three separate chips in one package: One p-channel high-side MOSFET and one n-channel low-side MOSFET together with a driver IC, forming an integrated high current half-bridge. All three chips are mounted on one common lead frame, using the chip-on chip and chip-by-chip technology. The power switches utilize vertical MOS technologies to ensure optimum on state resistance. Due to the p-channel high-side switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, undervoltage, overcurrent and short circuit. The IFX007T can be combined with other IFX007Ts to form a H-bridge or a3-phase drive configuration. 2.1 Block diagram VS Undervolt. detection Current Sense Current Limitation HS Overtemp . detection Gate Driver HS IS Digital Logic LS off IN OUT HS off Gate Driver LS INH Current Limitation LS Slewrate Adjustment SR GND Figure 1 Block diagram 2.2 Terms Following figure shows the terms used in this data sheet. VS I VS , -I D (H S) IIN V IN I IN H VIN H IN VS INH OUT ISR V SR VIS I IS I OU T , I L VD S(L S) SR IS V D S(H S) V OU T GND I GN D , I D (L S) Figure 2 Terms Preliminary Data Sheet 4 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Pin configuration 3 Pin configuration 3.1 Pin assignment 8 1234 5 67 Figure 3 3.2 Table 1 Pin assignment IFX007T (top view) Pin definitions and functions Pin definitions and functions Pin Symbol I/O Function 1 GND – Ground 2 IN I Input Defines whether high - or low-side switch is activated 3 INH I Inhibit When set to low device goes in sleep mode 4,8 OUT O Power output of the bridge 5 SR I Slew Rate The slew rate of the power switches can be adjusted by connecting a resistor between SR and GND 6 IS O Current Sense and Diagnostics 7 VS – Supply Bold type: pin needs power wiring Preliminary Data Sheet 5 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T General product characteristics 4 General product characteristics The device is intended to be used in an industrial or consumer environment. The circumstances, how the device environment must look like are described in this chapter. 4.1 Absolute maximum ratings Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2 Absolute maximum ratings1) Tj = 25 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Voltages Supply voltage VS -0.3 – 40 V – P_4.1.1 Drain-source voltage high side VDS(HS) -40 – – V Tj ≥ 25°C P_4.1.2 -38 – – V Tj < 25°C – – 40 V Tj ≥ 25°C – – 38 V Tj < 25°C Drain-source voltage low side VDS(LS) P_4.1.3 Logic input voltage VIN VINH -0.3 – 5.3 V – P_4.1.4 Voltage at SR pin VSR -0.3 – 1.0 V – P_4.1.5 Voltage between VS and IS pin VS -VIS -0.3 – 40 V – P_4.1.6 Voltage at IS pin VIS -20 – 40 V – P_4.1.7 -1 – 1 V Transient fall/rise time: ttrans > 85 ns. P_4.1.8 Voltage transient between VS and dVS GND pin2) Currents HS/LS continuous drain current ID(HS) ID(LS) -50 – 50 A switch active P_4.1.9 HS/LS pulsed drain current3) ID(HS) ID(LS) -117 – 117 A tpulse = 10 ms single pulse P_4.1.10 Junction temperature Tj -40 – 150 °C – P_4.1.11 Storage temperature Tstg -55 – 150 °C – P_4.1.12 kV HBM4) P_4.1.13 Temperatures ESD susceptibility ESD resistivity HBM IN, INH, SR, IS OUT, GND, VS 1) 2) 3) 4) VESD -2 -6 – – 2 6 Not subject to production test, specified by design. “Under Voltage Shut Down” shall not be triggered. Maximum reachable current may be smaller depending on current limitation level. ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS-001 (1.5 kΩ, 100 pF). Preliminary Data Sheet 6 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T General product characteristics Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. 4.2 Functional range The parameters of the functional range are listed in the following table: Table 3 Functional range Parameter Symbol Supply voltage range for normal operation VS(nor) Junction temperature Tj Values Unit Note or Test Condition Number P_4.2.1 Min. Typ. Max. 8 – 40 V Tj ≥ 25°C 8 – 38 V Tj < 25°C -40 – 150 °C – P_4.2.2 Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. 4.3 Thermal resistance This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org Table 4 Thermal resistance Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Thermal resistance Junction-case, high-side switch Rthjc(HS) = ΔTj(HS)/ Pv(HS) RthJC(HS) – 0.55 0.8 K/W 1) P_4.3.1 Thermal resistance Junction-case, low-side switch Rthjc(LS) = ΔTj(LS)/ Pv(LS) RthJC(LS) – 1.1 1.6 K/W 1) P_4.3.2 Thermal resistance Junction-ambient RthJA 19 – K/W 1) 2) P_4.3.3 – 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Preliminary Data Sheet 7 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5 Block description and characteristics 5.1 Supply characteristics Table 5 Supply characteristics VS = 24 V, Tj = 25 °C, IL = 0 A, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number General Supply current IVS(on) – 2.3 2.8 mA VINH = 5 V VIN = 0 V or 5 V RSR = 0 Ω DC-mode normal operation (no fault condition) P_5.1.1 Quiescent current IVS(off) – 7 10 µA VINH = 0 V VIN = 0 V or 5 V 1) P_5.1.2 1) Not subject to production test, specified by design. 26 24 VS = 36 V 22 20 18 IVS(off) [µA] 16 14 12 10 VS = 24 V 8 6 VS = 8 V 4 VS = 18 V 2 0 -40 Figure 4 -20 0 20 40 60 T [°C] 80 100 120 140 160 Typical quiescent current vs. junction temperature Preliminary Data Sheet 8 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5.2 Power stages The power stages of the IFX007T consist of a p-channel vertical DMOS transistor for the high-side switch and an n-channel vertical DMOS transistor for the low-side switch. All protection and diagnostic functions are located in a separate top chip. Both switches allow active freewheeling and thus minimizing power dissipation during PWM control. The on state resistance RON is dependent on the supply voltage VS as well as on the junction temperature Tj. The typical on state resistance characteristics are shown in Figure 5 and Figure 6. High Side Switch Low Side Switch 10 10 9 9 Tj = 150°C 8 8 6 Tj = 25°C 5 4 Tj = -40°C 6 Tj = 25°C 5 4 3 3 2 2 1 1 Tj = -40°C 0 0 8 Figure 5 Tj = 150°C 7 RON(LS) [mΩ] RON(HS) [mΩ] 7 12 16 20 24 28 VS [V] 32 36 40 8 12 16 20 24 28 VS [V] 32 36 40 Typical ON-state resistance vs. supply voltage Preliminary Data Sheet 9 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics High Side Switch Low Side Switch 10 10 9 9 8 8 7 7 typ. 98 % typ. 6 RON(LS) [mΩ] RON(HS) [mΩ] typ. 98 % 5 4 6 typ. 5 4 3 3 2 2 1 1 0 0 -50 Figure 6 5.2.1 Table 6 -25 0 25 50 75 Tj [°C] 100 125 150 -50 -25 0 25 50 75 Tj [°C] 100 125 150 Typical ON-state resistance vs. junction temperature; VS = 13.5 V; ID = 9 A Power stages - static characteristics Power stages - static characteristics VS = 24 V, Tj = 25 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number High-side switch - static characteristics ON state high-side resistance RON(HS) – 5.3 6.5 mΩ IOUT = 9 A; VS = 13.5 V P_5.2.1 Leakage current high side IL(LKHS) – – 1 µA VINH = 0 V; VOUT = 0 V P_5.2.2 Reverse diode forward-voltage VDS(HS) high side1) – 0.8 0.9 V IOUT = -9 A P_5.2.3 Low-side switch - static characteristics ON-state low-side resistance RON(LS) – 4.7 6.3 mΩ IOUT = -9 A; VS = 13.5 V P_5.2.4 Leakage current low side IL(LKLS) – – 1 µA VINH = 0 V; VOUT = VS P_5.2.5 Reverse diode forward-voltage -VDS(LS) low side – 0.8 0.9 V IOUT = 9 A P_5.2.6 1) Due to active freewheeling, diode is conducting only for a few µs, depending on RSR. Preliminary Data Sheet 10 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5.2.2 Switching times IN td r(H S) tr(H S) td f(H S) tf(H S) t VOUT 80% 80% ΔVOUT ΔVOUT 20% 20% t Figure 7 Definition of switching times high side (Rload to GND) IN td f(L S) tf(L S) t d r(L S) tr(L S) t VOUT 80% 80% ΔVOUT ΔV OUT 20% 20% t Figure 8 Definition of switching times low side (Rload to VS) Due to the timing differences for the rising and the falling edge there will be a slight difference between the length of the input pulse and the length of the output pulse. It can be calculated using the following formulas: • ΔtHS = (tdr(HS) + 0.5 tr(HS)) - (tdf(HS) + 0.5 tf(HS)) • ΔtLS = (tdf(LS) + 0.5 tf(LS)) - (tdr(LS) + 0.5 tr(LS)). Preliminary Data Sheet 11 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5.2.3 Power stages - dynamic characteristics The slew rate resistor at the SR-pin shall not exceed the max. slew rate resistor value of RSR ≤ 51 kΩ. Table 7 Power stages - dynamic characteristics VS = 24 V, Tj = 25 °C, Rload = 4 Ω, single pulse, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number High-side switch dynamic characteristics Rise-time of HS tr(HS) 0.05 0.22 0.25 1.3 0.75 4.7 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.7 Switch-ON delay time HS tdr(HS) 1.5 2 3.4 15 4.6 31 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.8 Fall-time of HS tf(HS) 0.05 0.22 0.25 1.3 0.7 4.5 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.9 Switch-OFF delay time HS tdf(HS) 0.8 1.1 2.4 9 4.1 21 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.10 Low-side switch dynamic characteristics Rise-time of LS tr(LS) 0.05 0.22 0.25 1.3 0.7 4.5 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.11 Switch-OFF delay time LS tdr(LS) 0.2 1 1.5 7 2.5 16 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.12 Fall-time of LS tf(LS) 0.025 0.18 0.25 1.3 0.7 4.5 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.13 Switch-ON delay time LS tdf(LS) 1.6 2.0 4.2 16 5.9 36 µs RSR = 0 Ω RSR = 51 kΩ P_5.2.14 5.3 Protection functions The device provides integrated protection functions. These are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not to be used for continuous or repetitive operation, with the exception of the current limitation (Chapter 5.3.3). In case of overtemperature the IFX007T will apply the slew rate determined by the connected slew rate resistor. In current limitation mode the highest slew rate possible will be applied independent of the connected slew rate resistor. Overtemperature and overcurrent are indicated by a fault current IIS(LIM) at the IS pin as described in the paragraph “Status flag diagnosis with current sense capability” on Page 16 and Figure 12. 5.3.1 Undervoltage shutdown To avoid uncontrolled motion of the driven motor at low voltages the device shuts off (output is tri-state), if the supply voltage drops below the switch-off voltage VUV(OFF). The IC becomes active again with a hysteresis VUV(HY) if the supply voltage rises above the switch-on voltage VUV(ON). Preliminary Data Sheet 12 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5.3.2 Overtemperature protection The IFX007T is protected against overtemperature by an integrated temperature sensor. Overtemperature leads to a shutdown of both output stages. This state is latched until the device is reset by a low signal with a minimum length of treset at the INH pin, provided that its temperature has decreased at least the thermal hysteresis ΔT in the meantime. Repetitive use of the overtemperature protection impacts lifetime. 5.3.3 Current limitation The current in the bridge is measured in both switches. As soon as the current in forward direction in one switch (high side or low side) is reaching the limit ICLx, this switch is deactivated and the other switch is activated for tCLS. During that time all changes at the IN pin are ignored. However, the INH pin can still be used to switch both MOSFETs off. After tCLS the switches return to their initial setting. The error signal at the IS pin is reset after 2 * tCLS. Unintentional triggering of the current limitation by short current spikes (e.g. inflicted by EMI coming from the motor) is suppressed by internal filter circuitry. Due to thresholds and reaction delay times of the filter circuitry the effective current limitation level ICLx depends on the slew rate of the load current dI/dt as shown in Figure 10. IL tCLS ICLx ICLx 0 t Figure 9 Timing diagram current limitation (inductive load) Preliminary Data Sheet 13 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics High Side Switch 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 Low Side Switch 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 Tj = -40°C Tj = 25°C Tj = 150°C 0 Figure 10 500 1000 1500 dIL/dt [A/ms] 2000 1000 1500 dIL/dt [A/ms] 2000 Low Side Switch Tj = -40°C ICLL [A] ICLH [A] 500 Typical current limitation detection level vs. current slew rate dIL/dt 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 Tj = 25°C Tj = 150°C Figure 11 Tj = 25°C Tj = 150°C 0 High Side Switch 8 ICLH0 ICLL [A] ICLH [A] ICLH0 Tj = -40°C 12 16 20 24 28 VS [V] 32 36 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 Tj = -40°C Tj = 25°C Tj = 150°C 8 40 12 16 20 24 28 VS [V] 32 36 40 Typical current limitation detection levels vs. supply voltage In combination with a typical inductive load, such as a motor, this results in a switched mode current limitation. This method of limiting the current has the advantage of greatly reduced power dissipation in the IFX007T compared to driving the MOSFET in linear mode. Therefore it is possible to use the current limitation Preliminary Data Sheet 14 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics for a short time without exceeding the maximum allowed junction temperature (e.g. for limiting the inrush current during motor start up). However, the regular use of the current limitation is allowed as long as the specified maximum junction temperature is not exceeded. Exceeding this temperature can reduce the lifetime of the device. 5.3.4 Short circuit protection The device provides embedded protection functions against • output short circuit to ground • output short circuit to supply voltage • short circuit of load The short circuit protection is realized by the previously described current limitation in combination with the overtemperature shutdown of the device. 5.3.5 Table 8 Electrical characteristics - protection functions Electrical characteristics - protection functions VS = 24 V, Tj = 25 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number VUV(ON) – – 5.0 V VS increasing P_5.3.1 VUV(OFF) 3.3 – 4.7 V VS decreasing, INH = 1 P_5.3.2 VUV(HY) – 0.3 – V 2) P_5.3.3 ICLH0 ICLL0 55 77 98 A VS = 13.5 V P_5.3.4 tCLS 70 115 210 µs 2) P_5.3.5 Thermal shutdown junction temperature TjSD 155 175 200 °C – P_5.3.6 Thermal switch-ON junction temperature TjSO 150 – 190 °C – P_5.3.7 Thermal hysteresis DT – 7 – K 2) P_5.3.8 µs 2) P_5.3.9 Undervoltage shutdown Switch-ON voltage Switch-OFF voltage 1) ON/OFF hysteresis Current limitation Current limitation detection level HS/LS Current limitation timing Shut OFF time for HS and LS Thermal shutdown Reset pulse at INH Pin (INH low) treset 4 – – 1) With decreasing Vs < 5.5 V activation of the current limitation mode may occur before undervoltage shutdown. 2) Not subject to production test, specified by design. Preliminary Data Sheet 15 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5.4 Control and diagnostics 5.4.1 Input circuit The control inputs IN and INH consist of TTL/CMOS compatible schmitt triggers with hysteresis which control the integrated gate drivers for the MOSFETs. Setting the INH pin to high enables the device. In this condition one of the two power switches is switched on depending on the status of the IN pin. To deactivate both switches, the INH pin has to be set to low. No external driver is needed. The IFX007T can be interfaced directly to a microcontroller, as long as the maximum ratings in Chapter 4.1 are not exceeded. 5.4.2 Dead time generation In bridge applications it has to be assured that the high-side and low-side MOSFET are not conducting at the same time, connecting directly the battery voltage to GND. This is assured by a circuit in the driver IC, generating a so called dead time between switching off one MOSFET and switching on the other. The dead time generated in the driver IC is automatically adjusted to the selected slew rate. 5.4.3 Adjustable slew rate In order to optimize electromagnetic emission, the switching speed of the MOSFETs is adjustable by an external resistor. The slew rate pin SR allows the user to optimize the balance between emission and power dissipation within his own application by connecting an external resistor RSR to GND. 5.4.4 Status flag diagnosis with current sense capability The sense pin IS is used as a combined current sense and error flag output. In normal operation (current sense mode), a current source is connected to the status pin, which delivers a current proportional to the forward load current flowing through the active high-side switch. The sense current can be calculated out of the load current by the following equation: 1 I IS = --------------⋅ I L + I IS ( offset ) (5.1) dk ILIS The other way around, the load current can be calculated out of the sense current by following equation: (5.2) I L = dkILIS ⋅ ( IIS – IIS ( offset ) ) The differential current sense ratio dkilis is defined by: I L2 – IL1 d k ILIS = -------------------------------------------I IS ( IL2 ) – IIS ( I L1 ) (5.3) If the high side drain current is zero (ISD(HS) = 0A) the offset current IIS = IIS(offset) still will be driven. The external resistor RIS determines the voltage per IS output current. The voltage can be calculated by VIS = RIS . IIS. In case of a fault condition the status output is connected to a current source which is independent of the load current and provides IIS(lim). The maximum voltage at the IS pin is determined by the choice of the external resistor and the supply voltage. In case of current limitation the IIS(lim) is activated for 2 * tCLS. Preliminary Data Sheet 16 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics Normal operation: current sense mode Fault condition: error flag mode VS IIS(offset) IIS(offset) ESD-ZD IS IIS~ ILoad ESD-ZD IS IIS~ ILoad Sense output logic IIS(lim) Figure 12 VS RIS VIS Sense output logic IIS(lim) RIS VIS Sense current and fault current IIS [mA] IIS(lim) lo w er dk I LIS lu e va k IS e r d IL high IIS(offset) valu e Current Sense Mode (High Side) Error Flag Mode ICLx Figure 13 IL [A] Sense current vs. load current Preliminary Data Sheet 17 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 5.4.5 Truth table Table 9 Truth table Device State Inputs Outputs Mode INH IN HSS LSS IS 0 X OFF OFF 0 1 0 OFF ON IIS(offset) LSS active 1 1 ON OFF CS HSS active Undervoltage (UV) X X OFF OFF 0 UV lockout, reset Overtemperature (OT) or short circuit of HSS or LSS 0 X OFF OFF 0 Stand-by mode, reset of latch 1 X OFF OFF 1 Shutdown with latch, error detected Current limitation mode/ overcurrent (OC) 1 1 OFF ON 1 Switched mode, error detected1) 1 0 ON OFF 1 Switched mode, error detected1) Normal operation Stand-by mode 1) Will return to normal operation after tCLS; Error signal is reset after 2*tCLS (see Chapter 5.3.3) Table 10 Inputs Switches Current sense / status flag IS 0 = Logic LOW OFF = switched off IIS(offset) = Current sense - Offset (for conditions see table: Current sense) 1 = Logic HIGH ON = switched on CS = Current sense - high side (for conditions see table: Current sense) X = 0 or 1 1 = Logic HIGH (error) 0 = No output 5.4.6 Table 11 Electrical characteristics - control and diagnostics Electrical characteristics - control and diagnostics VS = 24 V, Tj = 25 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Control inputs (IN and INH) High level voltage INH, IN VINH(H) VIN(H) – 1.6 2 V – P_5.4.1 Low level voltage INH, IN VINH(L) VIN(L) 1.1 1.3 – V – P_5.4.2 Input voltage hysteresis VINHHY VINHY – 300 – mV 1) P_5.4.3 Input current high level IINH(H) IIN(H) 15 30 100 µA VIN = VINH = 5.3 V P_5.4.4 Preliminary Data Sheet 18 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics Table 11 Electrical characteristics - control and diagnostics (cont’d) VS = 24 V, Tj = 25 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Input current low level IINH(L) IIN(L) Values Min. Typ. Max. 15 25 50 Unit Note or Test Condition Number µA VIN = VINH = 0.4 V P_5.4.5 VS = 13.5 V RIS = 1 kΩ IL1 = 10 A IL2 = 40 A P_5.4.6 Current sense Differential current sense ratio in static on-condition dkILIS = dIL / dIIS dkILIS 3 15 19.5 24 10 Maximum analog sense current, IIS(lim) Sense current in fault condition 4.1 5 6.1 mA VS = 13.5 V RIS = 1 kΩ P_5.4.7 Isense leakage current IISL – – 1 µA VINH = 0 V P_5.4.8 Isense offset current IIS(offset) 30 170 385 µA VINH = 5 V ISD(HS) = 0 A P_5.4.9 1) Not subject to production test, specified by design. 0.30 0.24 0.28 Tj = -40°C 0.22 0.26 0.24 IIS(offset) [mA] IIS(offset) [mA] 0.20 0.18 Tj = 25°C 0.16 0.22 0.20 0.18 0.16 0.14 Tj = 150°C 0.14 0.12 0.12 0.10 0.10 8 Figure 14 12 16 20 24 VS [V] 28 32 36 40 -40 -20 0 20 40 60 T [°C] 80 100 120 140 Typical current sense offset current Preliminary Data Sheet 19 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Block description and characteristics 6.0 Tj = 150°C 5.5 IIS(lim) [mA] Tj = 25°C 5.0 Tj = -40°C 4.5 4.0 3.5 8 Figure 15 12 16 20 24 VS [V] 28 32 36 40 Typical characteristic of the maximum analog sense current in fault condition (Pos. 5.4.7.) Preliminary Data Sheet 20 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Application information 6 Application information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 6.1 Application circuit Reverse Polarity Protection I/O WO Reset RO Microcontroller Vdd Q I/O I/O Voltage Regulator D Vss A/D (IPD90P03P4L-04) I L1 VS DZ1 10V GND C1 100nF R3 10kΩ I/O A/D optional R12 10kΩ R11 10kΩ IFX007T IFX007T VS INH IN C1 IS 1nF C1O2V 220nF C2O2V 220nF OUT C1OU T 220nF SR Figure 16 INH R21 10kΩ IN IS C2OU T C29 220nF 100nF GND C12 100nF VS OUT M C19 100nF IS R112 1kΩ C10 1000µF R22 10kΩ SR R212 1kΩ C2IS 1nF GND R111 0..51kΩ R211 0..51kΩ C22 100nF Application circuit: H-bridge with two IFX007T Note: This is a simplified example of an application circuit. The function must be verified in the real application. 6.2 Layout considerations Due to the fast switching times for high currents, special care has to be taken to the PCB layout. Stray inductances have to be minimized in the power bridge design as it is necessary in all switched high power bridges. The IFX007T has no separate pin for power ground and logic ground. Therefore it is recommended to assure that the offset between the ground connection of the slew rate resistor, the current sense resistor and ground pin of the device (GND / pin 1) is minimized. If the IFX007T is used in a H-bridge or B6 bridge design, the voltage offset between the GND pins of the different devices should be small as well. Due to the fast switching behavior of the device in current limitation mode a low ESR electrolytic capacitor C10 from VS to GND is necessary. This prevents destructive voltage peaks and drops on VS. This is needed for both PWM and non PWM controlled applications. To assure efficiency of C10 and C19/ C29 the stray inductance must be low. Therefore the capacitors must be placed very close to the device pins. The value of the capacitors must be verified in the real application, taking care for low ripple and transients at the Vs pin of the IFX007T. The digital inputs need to be protected from excess currents (e.g. caused by induced voltage spikes) by series resistors greater than 7 kΩ. Preliminary Data Sheet 21 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Application information Reverse Polarity Protection I /O WO Micro- Reset controller Vdd RO Q D Vss I/O I/O (IPD90P03P4L-04) Voltage Regulator I L1 GND IFX007T VS R1 10kΩ INH IN C9 100nF C10 1000µF CO2 V 220nF OUT COUT 220nF IS Figure 17 CIS 1nF C2 100nF C1 100nF R3 10kΩ I/O R2 10kΩ R12 1kΩ VS D Z1 10V M SR R11 0..51kΩ GND Application circuit: half-bridge with a IFX007T (load to GND) Note: This is a simplified example of an application circuit. The function must be verified in the real application. 6.3 PWM control For the selection of the max. PWM frequency the choosen rise/fall-time and the requirements on the duty cycle have to be taken into account. We recommend a PWM-period at least 10 times the rise-time. Example: Rise-time = fall-time = 4 µs. => T-PWM = 10 * 4 µs = 40 µs. => f-PWM = 25 kHz. The min. and max. value of the duty cycle (PWM ON to OFF percentage) is determined by the real fall time plus the real rise time. In this example a duty cycle make sense from approximately 20% to 80%. If a wider duty cycle range is needed, the PWM frequency could be decreased and/or the rise/fall-time could be accelerated. Preliminary Data Sheet 22 Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Package Outlines 7 Package Outlines 4.4 10 ±0.2 1.27 ±0.1 0...0.3 B 0.05 2.4 0.1 4.7 ±0.5 2.7 ±0.3 7.551) 1±0.3 9.25 ±0.2 (15) A 8.5 1) 0...0.15 7 x 0.6 ±0.1 6 x 1.27 0.5 ±0.1 0.25 M A B 8˚ MAX. 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. 0.1 B GPT09114 4.6 16.15 9.4 10.8 0.47 0.8 8.42 Figure 18 PG-TO263-7-1 (Plastic Green Transistor Single Outline Package) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Preliminary Data Sheet 23 Dimensions in mm Rev. 1.0 2018-02-21 High Current PN Half Bridge with Integrated Driver IFX007T Revision History 8 Revision History Revision Date Changes Rev. 1.0 Initial release. 2018-02-21 Preliminary Data Sheet 24 Rev. 1.0 2018-02-21 Trademarks of Infineon Technologies AG µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™, DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™, HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™, OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™, SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™. Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-02-21 Published by Infineon Technologies AG 81726 Munich, Germany © 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. 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