ILD2111XUMA2

ILD 211 1 Digital DC/DC Buck Controller IC Dat ashe et Revision 1.0, 2015-04-08 Po wer Ma nage m ent & M ulti m ark et ILD2111 Digital DC/DC Controller with I-Set Product highlights     Assumes control of functionality where a microcontroller is required in conventional systems Device configurable by a comprehensive parameter set High efficiency over wide input and output ranges High accuracy of +/-5% over output current range and useful temperature PG-DSO-8-58 Features    Description     Hysteretic current regulation Output current adjustable in up to 16 steps with a dynamic range of 1:4 between min. and max. configurable by an external resistor Flicker-free and phase-aligned PWM dimming based on input PWM signal Fully configurable internal and external smart overtemperature protection Open/short load protection Overpower protection The ILD2111 is a high-performance microcontroller-based digital DC/DC buck LED controller, designed as a constant current source. The driving current is adjustable with a simple external resistor. Flicker-free dimming supported by means of phase-aligned PWM LED current. An ASSP digital microcontroller-based engine is highly configurable using a comprehensive parameter set to provide fine tuning of operation and protection features. High-precision hysteretic output current regulation is achieved thanks to the digital control loops. Applications  Integrated electronic control gear for LED luminaires LED drivers, e.g. 2-stage professional lighting systems VIN LEDs 5 GD0 4 3 Line Voltage PFC+Flyback VCC 7 CS MOSFET BSP373 L6327 ILD2111 DC/DC Buck GND 8 Current Control REF/SC 2 Rext VDDP 1 PWM Temperature Control TS ZD2V7 PTC 6 PWM - Dimming GND UART Interface Configuration & In-Circuit Calibration External PWM Signal Figure 1. Typical Application Product type Package ILD2111 PG-DSO-8-58 Datasheet 2 Revision 1.0, 2015-04-08 ILD2111 Table of Contents Table of Contents 1 Pin Configuration and Description ................................................................................................... 4 2 Block Diagram .................................................................................................................................... 5 3 3.1 3.2 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.4 3.4.1 3.4.2 3.5 3.6 3.6.1 3.6.2 3.6.3 3.6.4 3.6.5 3.6.6 3.6.7 3.6.8 3.6.9 3.7 3.8 3.9 3.9.1 3.9.2 Functional Description ...................................................................................................................... 6 Introduction ........................................................................................................................................... 6 Main Supply (VCC)............................................................................................................................. 11 Controller Features............................................................................................................................. 11 Configurable Leading Edge Blanking (LEB) and Sampling Time at Pin CS ...................................... 12 Configurable Gate Driver Output ........................................................................................................ 12 Reference Current Setup ................................................................................................................... 13 Output Current Control and Measuring .............................................................................................. 17 Current Startup, Soft-Start and Shutdown Control ............................................................................. 19 Current Ripple vs. Switching Frequency Control Scheme ................................................................. 20 Fixed Current Ripple .......................................................................................................................... 20 Frequency and Ripple Control ........................................................................................................... 21 Input Voltage Measurement and Calibration ...................................................................................... 28 Protection Features ............................................................................................................................ 30 Undervoltage Protection for DC Input Line – VIN Undervoltage ......................................................... 32 Overvoltage Protection for DC Input Line – VIN Overvoltage ............................................................. 32 Output Undervoltage Protection – VOUT Undervoltage ....................................................................... 32 Open Output Protection ..................................................................................................................... 32 Output Overvoltage Protection – VOUT Overvoltage ........................................................................... 33 Output Overpower Protection – POUT Overpower .............................................................................. 33 Overtemperature Protection ............................................................................................................... 34 Overcurrent Protection – Level 2 (OCP2) .......................................................................................... 39 Functional Protections ........................................................................................................................ 39 External PWM Dimming ..................................................................................................................... 40 Output Current PWM Modulation ....................................................................................................... 41 Configuration ...................................................................................................................................... 42 Overview of Configurable Parameters ............................................................................................... 42 Configuration Procedure – Parameter Handling ................................................................................ 52 4 4.1 4.2 4.3 4.4 4.5 Electrical Characteristics ................................................................................................................ 54 Definitions ........................................................................................................................................... 54 Absolute Maximum Ratings ............................................................................................................... 55 Package Characteristics .................................................................................................................... 56 Operating Conditions ......................................................................................................................... 56 DC Electrical Characteristics .............................................................................................................. 57 5 Outline Dimensions ......................................................................................................................... 63 Datasheet 3 Revision 1.0, 2015-04-08 ILD2111 Pin Configuration and Description 1 Pin Configuration and Description The pin configuration is shown in Figure 2 and Table 1-1. The pin functions are described later. TS 1 8 GND REF/SC 2 7 VCC CS 3 6 PWM GD0 4 5 VIN PG-DSO-8-58 (150mil) Figure 2. Pin Configuration Table 1-1. Pin Definitions and Functions Symbol Pin Type TS 1 I REF/SC 2 IO CS 3 I GD0 4 O VIN 5 I PWM 6 I VCC 7 I GND 8 O Datasheet Function Temperature Sensor The pin TS is used for external temperature measurement using PTC or an appropriate passive temperature sensor. Reference/Serial Communication The pin REF/SC is multiplexed. During startup it is used for reference current sensing by means of an external RC circuit. Afterwards, it serves as a UART serial communication interface. Current Sense Current measurement on an external shunt resistor. Gate Driver Output 0 Output for directly driving a power MOS. Voltage Input Voltage input measurement. Requires an external series resistor for voltage sensing and current limitation. PWM Dimming Signal Input for PWM-based dimming signal. Positive Voltage Supply IC power supply. Power and Signal Ground 4 Revision 1.0, 2015-04-08 ILD2111 Block Diagram Block Diagram 2 The block diagram of ILD2111 is shown in Figure 3. VCC VIN PWM Startup/Wake-up Cell External PWM Detection Internal Temperature Sensing Power Management Temperature Protection Constant Current Regulator Overvoltage Protection External Temperature Sensing Undervoltage Protection VCC & VIN Measuring UART Gate Driver Current Reference Measuring TS GD0 Current Limiter CS Current Sensing Timer REF/SC GND Figure 3. Block Diagram Datasheet 5 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3 Functional Description The functional description provides an overview of the integrated functions and features, and their relationship. The parameters and equations provided are based on typical values at T A = 25°C. The corresponding minimum and maximum values are shown in Section 4, Electrical Characteristics. 3.1 Introduction The ILD2111 is a high-performance digital microcontroller-based DC/DC buck LED controller designed as a constant current source with hysteretic output current regulation. The controller typically uses a floating buck topology operating in a Continuous Conduction Mode (CCM). In order to reduce switching losses and increase efficiency, as well as to control the switching frequency over a wide variety of external component values, input voltage and load variations, a frequency ripple control is introduced. Both internal and external temperature measurements are implemented and accompanied with an intelligent temperature protection algorithm with two threshold values. The controller utilizes a variety of protection features, including overpower, open and short load conditions. The ILD2111 is a dimmable device controlled by an external PWM signal. The device can be parameterized by means of a single pin UART interface at the REF/SC pin (see Section 3.9). A complete top-level device operation process, including protection and error handling, is shown in Figure 4. Table 3-1 shows device operating statuses, buck statuses associated with the buck state machine, as well as error and associated error codes. The buck state machine diagram is shown in Figure 5. Datasheet 6 Revision 1.0, 2015-04-08 ILD2111 Functional Description Power-up reset Executed from ROM code Copy OTP to RAM with CRC check and start FW Copy default parameters from OTP to RAM 2 Applying parameter patches Parameters CRC? NO 1 OPER_STATUS = OPER_ERR ERR_STATUS = ERR_PARAM_DATA 1 OPER_STATUS = OPER_ERR ERR_STATUS = ERR_PARAM_EMPTY YES 3 Parameters Consistency? NO YES 7 Hardware initialization OPER_STATUS = OPER_OFF ERR_STATUS = ERR_NONE Temperature protection initialization BUCK_CONTROL = BUCK_OFF Reference current set UART initialization OPER_STATUS = OPER_STARTUP buck_oper_loop_delay for error restart phases: Delay = 0 – for first start, after HOT and COLD restart and after input undervoltage error. Delay = ERR_RESTART_TIME – after following errors: output undervoltage, output overvoltage, output overpower, open output and input overvoltage 8 Startup delay Process UART communication VIN_MIN_START < VIN < VIN_MAX_START NO BUCK_CONTROL = BUCK_STARTUP ERR_STATUS = ERR_INPUV or ERR_INPOV YES YES T>T_critical ERR_STATUS = ERR_OTI or ERR_OTE NO NO T_hot T_critical NO Process temperature dimming 5 Datasheet 8 Revision 1.0, 2015-04-08 ILD2111 Functional Description 1 UART initialization YES 3 Hot restart? NO NO Cold restart? 1 YES 2 5 NO FRC update interval elapsed? FRC update interval is set to higher rate during startup YES Process FRC Frequency Ripple Controller NO Is FRC in steady-state? YES Change FRC update interval to lower rate = 16·TPWM· FRC_REG_INTERVAL_OPER (typically in a range of couple of seconds) 4 6 Process Buck Shutdown Open output error All other errors 7 8 Figure 4. Device Operating Flowchart Datasheet 9 Revision 1.0, 2015-04-08 ILD2111 Functional Description Operating statuses are presented in Table 3-1 below. Table 3-1. Device Operating Statuses Status OPER_STATUS OPER_OFF OPER_STARTUP OPER_RUN OPER_ERR OPER_STOP ERR_STATUS ERR_NONE ERR_INPUV ERR_INPOV ERR_OUTUV ERR_OUTOV ERR_PWR ERR_OPEN ERR_OCP ERR_OTI ERR_OTE ERR_PARAM_EMPTY ERR_PARAM_DATA ERR_MODE ERR_MODE_LATCH ERR_MODE_RESTART ERR_MODE_OFF ERR_MODE_NOP 1) BUCK_STATUS BUCK_OFF BUCK_STARTUP Value 0000H 0001H 0002H 0004H 0008H 0000H 0001H 0002H 0004H 0008H 0010H 0020H 0040H 0080H 0100H 0400H 0800H Description Off - initial buck state Startup - Vin & temperature checking Run Stopped by error Stopped by UART command No errors Input undervoltage Input overvoltage Output undervoltage Output overvoltage Output overpower Output open OCP2 level detection Overtemperature internal sensor Overtemperature external sensor Default parameter block empty Default parameter block checksum error Error handling latch Error handling auto restart Error handling is off Error handling does not affect auto restart counter Buck is off Buck is in start-up phase (initialized, waiting for start-up condition, i.e. voltage and temperature) Buck is in soft-start phase (implements increasing current slope until reaching reference current) Buck is in shutdown phase (implements current decreasing slope) Buck is executing off, buck operation stopped Buck in error state (generate small error current) Buck is on (normal operation, default state of operation) During normal operation, in addition to the aforementioned operations, the following actions will be executed: − Open-output processing − Output current PWM dimming processing − VCC / internal temperature measurement and processing − External temperature measurement and processing − OCP1 - peak current processing − OCP2 - peak current processing − EPWM measurement and processing − PI regulator processing − Input over- and undervoltage processing − Output over- and undervoltage processing − Output overpower processing BUCK_SOFTSTART BUCK_SHUTDOWN BUCK_EXE_OFF BUCK_ERRC 2) BUCK_ON 1) 2) See buck state machine in Figure 5. The number of averaged buck cycles for steady-state operation, where calculations and protections are handled, is defined by the constant Buck_steady_delay (see Table 3-14). Datasheet 10 Revision 1.0, 2015-04-08 ILD2111 Functional Description START BUCK_OFF OPER_OFF BUCK_STARTUP OPER_STARTUP BUCK_SOFTSTART OPER_RUN BUCK_ON OPER_ERR BUCK_SHUTDOWN BUCK_ERRC BUCK_EXE_OFF Figure 5. Buck State Machine 3.2 Main Supply (VCC) The device is powered via the VCC pin. All device supply voltages are internally generated from the VCC voltage. 3.3 Controller Features Table 3-2 gives an overview of the controller features that are described in the referenced sections. Table 3-2. Controller Features Configurable Leading Edge Blanking (LEB) and Sample Time at Pin CS Section 3.3.1 Configurable Gate Driver Output Section 3.3.2 Reference Current Setup Output Current Control and Measuring Section 3.3.3 Current Startup, Soft-Start and Shutdown Control Section 3.3.5 Datasheet Section 3.3.4 11 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.3.1 Configurable Leading Edge Blanking (LEB) and Sampling Time at Pin CS A configurable leading edge blanking time tCSLEB is integrated into the current sensing path to provide more accurate output current sensing and regulation. Leading-edge spikes during the PowerMOS switch-on phase, as shown in Figure 6, can affect sampled output current values, resulting in imprecise current sensing. The LEB time is used to prevent false overcurrent detection, while the sample time defines the moment of the current sampling for A/D conversion. The time tCSLEB and the sampling time are configured by the constants CS_blanking_time and CS_sample_time respectively (see Table 3-19) in order to provide output current sampling at the moment when no spikes are present. ILD2111 GD0 S&H CS R_current_sense tCSLEB TON TOFF tCSLEB Figure 6. Configurable Leading Edge Blanking Time at Pin CS 3.3.2 Configurable Gate Driver Output The gate driver output (GD0) can be configured with respect to the final voltage level and gate drive current, which influence the rising voltage slope for switching on the external PowerMOS (see Figure 7) and therefore a switch-on time. A compromise should and could be made between switching power losses and electromagnetic radiation by using these parameters (especially gate drive current values). The output gate voltage VGDH and gate current IGD can be programmed by the parameters, providing an adjustable PowerMOS turn-on time. The programmable output gate voltage range is from 4.5 V to 15 V (see Table 3-8). VGDH cannot be higher than the power supply voltage VCC, regardless of the programmed value. The programmable gate current range is from 30 mA to 118 mA (see Table 3-8). Figure 7 shows the gate driver output voltage signal. Different rising slopes correspond to different gate driving currents. The slope is proportional to the current. VGD VGDH IGD1 < IGD2 < IGD3 < IGD4 IGD1 IGD2 IGD3 IGD4 t Figure 7. Configurable Gate Driver Output Datasheet 12 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.3.3 Reference Current Setup The reference current value is obtained by measurement using the value of the external resistor R_iset connected to the pin ‘REF/SC’ together with the reference capacitor C_ref via the discharge time of the capacitor (see Figure 8 and Figure 9). Depending on the resistance of R_iset, the appropriate reference current, stored in a table of 16 currents (see Table 3-12), is used as a reference for the output current. The reference current setup procedure (I-set) will always be executed during the startup sequence or during Open output protection recovery – see Section 3.6.4. When the internal switch SW is turned on for a short period of time defined by the constant RC_cap_charge_time (see Table 3-19) while the digital output is high, the C_ref is fully charged to Vcref, where this voltage depends on the internal VDDP voltage and voltage divider R_ref_sc – R_iset. R_ref_sc is used for decoupling the reference current measurement circuitry and serial UART communication. Care must be taken that the ratio of R_iset to R_ref_sc is sufficient to have only a low impact on Vcref. Otherwise, it has to be included in the time thresholds calculation. When the switch is turned off, the C_ref discharges through the external resistor R_iset. The discharging time of the capacitor C_ref depends on the value of the external resistor. During the discharging interval, the pin voltage is measured by ADC while an internal timer measures the discharging time. When the capacitor voltage drops below the constant threshold level V_adc_th (constant V_ADC_th, see Table 3-13), the internal timer value is latched and used to determine the reference current from the predefined I-set table. UART Interface VDDP= 3.3 V + REF / SC Software Control R_ref_sc SW C_filt V_ref_rc_charge C_ref R_iset Vcref ILD2111 ADC Figure 8. Charging and Discharging of the C_ref Capacitance Depending on the Switch State C_filt is a ceramic capacitor used to filter noise, caused by the converter switching operation. Mainly it is used to suppress noise for ADC measurement as well as UART communication. Datasheet 13 Revision 1.0, 2015-04-08 ILD2111 Functional Description vADC(t) V_ref_rc_charge = 3.3V Vcref V_adc_th t tdischarge ttimeout Figure 9. C_ref Discharging Interval Determined by the Reference Resistor Value The charging voltage Vcref is calculated as: 𝑉𝑐𝑟𝑒𝑓 = 𝑅_𝑖𝑠𝑒𝑡 𝑅_𝑖𝑠𝑒𝑡+𝑅_𝑟𝑒𝑓_𝑠𝑐 ∙ 𝑉_𝑟𝑒𝑓_𝑟𝑐_𝑐ℎ𝑎𝑟𝑔𝑒. (1) The equation for V_adc_th is: 𝑉_𝑎𝑑𝑐_𝑡ℎ = 𝑉𝑐𝑟𝑒𝑓 ∙ 𝑒 − 𝑡𝑑𝑖𝑠𝑐ℎ𝑎𝑟𝑔𝑒 𝑅_𝑖𝑠𝑒𝑡∙𝐶_𝑟𝑒𝑓 . (2) Therefore: 𝑉𝑐𝑟𝑒𝑓 𝑡𝑑𝑖𝑠𝑐ℎ𝑎𝑟𝑔𝑒 = 𝑅_𝑖𝑠𝑒𝑡 ∙ 𝐶_𝑟𝑒𝑓 ∙ 𝑙𝑛 𝑉_𝑎𝑑𝑐_𝑡ℎ. (3) If a lower voltage threshold is not reached after the predefined time-out period ttimeout (constant RC_measurement_timeout, see Table 3-19), the reference current determination process ends and the last value from the current table is taken as the reference (Ref_current_16, see Table 3-12). Component values and their tolerances must provide unique thresholds in order to be detected appropriately (see Figure 10). More accurate equations will be obtained if typical component tolerance values are included. The following are assumed:  Maximum reference resistance: R_iset_max(n) = R_iset(n) + R_iset_tolerance  Minimum reference resistance: R_iset_min(n) = R_iset(n) - R_iset_tolerance  Maximum reference capacitance: C_ref_max = C_ref + C_ref_tolerance  Minimum reference capacitance: C_ref_min = C_ref - C_ref_tolerance 1 2 1 The reference resistance R_ref_sc is used to decouple the UART interface and current set resistance R_iset due to multiplexed functionality of the REF/SC pin. In this case, the tolerance of the R_ref_sc resistance is not taken into account (its tolerance is ignored). 2 Examples of C_ref_tolerance are the tolerance of the used capacitor as well as the cable capacitance that connects R_iset to the detection circuit. Datasheet 14 Revision 1.0, 2015-04-08 ILD2111 Functional Description Therefore, minimum and maximum discharging times are given by: 𝑇_𝑅𝐶_(𝑛)_𝑚𝑖𝑛 = 𝑅_𝑖𝑠𝑒𝑡_𝑚𝑖𝑛(𝑛) ∙ 𝐶_𝑟𝑒𝑓_𝑚𝑖𝑛 ∙ 𝑙𝑛 𝑉𝑐𝑟𝑒𝑓_𝑚𝑖𝑛(𝑛) 𝑉_𝑎𝑑𝑐_𝑡ℎ (4) and 𝑇_𝑅𝐶_(𝑛)_𝑚𝑎𝑥 = 𝑅_𝑖𝑠𝑒𝑡_𝑚𝑎𝑥(𝑛) ∙ 𝐶_𝑟𝑒𝑓_𝑚𝑎𝑥 ∙ 𝑙𝑛 𝑉𝑐𝑟𝑒𝑓_𝑚𝑎𝑥(𝑛) . 𝑉_𝑎𝑑𝑐_𝑡ℎ (5) Where n is the ordinal number of the resistor, while Vcref_min and Vcref_max are the minimum and maximum voltage values of charged capacitance respectively: 𝑅_𝑖𝑠𝑒𝑡_𝑚𝑖𝑛 𝑉𝑐𝑟𝑒𝑓_𝑚𝑖𝑛 = 𝑅_𝑖𝑠𝑒𝑡_𝑚𝑖𝑛+𝑅_𝑟𝑒𝑓_𝑠𝑐 ∙ 𝑉_𝑟𝑒𝑓_𝑟𝑐_𝑐ℎ𝑎𝑟𝑔𝑒 (6) and 𝑅_𝑖𝑠𝑒𝑡_𝑚𝑎𝑥 𝑉𝑐𝑟𝑒𝑓_𝑚𝑎𝑥 = 𝑅_𝑖𝑠𝑒𝑡_𝑚𝑎𝑥+𝑅_𝑟𝑒𝑓_𝑠𝑐 ∙ 𝑉_𝑟𝑒𝑓_𝑟𝑐_𝑐ℎ𝑎𝑟𝑔𝑒. T_RC_01_min T_RC_01_max T_RC_02_min vREF_TIME_01 T_RC_02_max T_RC_03_min T_RC_03_max vREF_TIME_02 vREF_TIME_03 (7) T_RC_n_min vREF_TIME_(n-1) T_RC_n_max t vREF_TIME_(n) Figure 10. Time Constant vREF_TIME_n Threshold Calculations As shown above, the discharging time threshold is obtained as follows: 𝑣𝑅𝐸𝐹_𝑇𝐼𝑀𝐸_𝑛 = 𝑇_𝑅𝐶_𝑛_𝑚𝑎𝑥 + 𝑇_𝑅𝐶_(𝑛+1)_𝑚𝑖𝑛−𝑇_𝑅𝐶_𝑛_𝑚𝑎𝑥 2 . (8) The last discharge time threshold is given by: 𝑣𝑅𝐸𝐹_𝑇𝐼𝑀𝐸_𝑛 = 𝑇_𝑅𝐶_𝑛_𝑚𝑎𝑥 + 𝑇_𝑅𝐶_𝑛_𝑚𝑎𝑥−𝑇_𝑅𝐶_𝑛_𝑚𝑖𝑛 . 2 (9) The measured discharge time - tdischarge is compared with the calculated thresholds, beginning with the smallest, and based on that, it will be determined which reference resistor is detected, hence reference output current. For example, if the measured discharge time is greater than vREF_TIME_01, vREF_TIME_02, vREF_TIME_03 th and smaller than vREF_TIME_04, the 4 reference resistor and reference current from the list will be chosen (see Table 3-3). The ratio between the maximum and minimum current has to be equal to or less than 4 (I_ref_max / I_ref_min ≤ 4) for best current accuracy. For example, if the minimum reference current is 250 mA, the maximum reference current from the range should not exceed 1000 mA. Datasheet 15 Revision 1.0, 2015-04-08 ILD2111 Functional Description The components (R_iset, C_ref) must be carefully selected to avoid overlapping time intervals, because in that case an appropriate threshold could not be calculated to provide unique detection. For example, if the resistance values are too close (including tolerances), discharge time intervals will overlap, and calculated thresholds will be set inside the overlapped area. Therefore it cannot be guaranteed that the same current will be selected across different IC production series and external component tolerances. Reference current determination only takes place during the initial chip startup and after the load has been disconnected - open output is detected. During normal buck operation, the REF/SC pin can be used as a communication port. Example For typical applications, which cover – for example – the outputs ranging from 250 mA to 800 mA (in 50 mA steps), reference resistor values for the specific current values (assuming C_ref = 10 nF and threshold voltage value of V_adc_th = 0.6075 V) are given in Table 3-3. Resistors from the series E96 with a variation (tolerance) of 1% are used. The reference pin serial resistor is R_ref_sc = 3.3 kΩ. The recommended capacitor C_ref 1 tolerance should be ≤ 5% . The recommended C_ref capacitor type is a zero-drift CoG (NPO). Table 3-3. Reference Resistor Values Example Ordinal number I_ref_n [mA] R_iset_n [kΩ] vREF_TIME_n [µs] 1 800 2.15 70 2 750 10.00 180 3 700 15.00 280 4 650 21.50 430 5 600 33.20 610 6 550 43.20 780 7 500 53.60 950 8 450 63.40 1110 9 400 71.50 1270 10 350 82.50 1430 11 300 90.90 1580 12 250 100.00 1860 Although, typically, the application uses less than 16 reference currents, all parameters (Ref_current_01- Ref_current_16, see Table 3-12) must be filled (arranged) in 4 groups, using copies with the same reference current. It is assumed that approximately the same currents have approximately the same parameters. Thereafter, all appropriate reference time thresholds (Reference_time_01 – Reference_time_16) will be automatically allocated to the groups (see Table 3-19). Each group consists of four consecutive currents and each group is associated with the unique set of FRC parameters. The currents from the same group will have the same minimum and maximum switching frequency limits and minimum and maximum current ripple limits as well (see Table 3-20). One possible arrangement is given below in Table 3-4. 1 For different component tolerances, different discharge times will be obtained by equations. The resistor values in Table 3-3 are given as examples. The number of different reference resistor values must match the number of different reference currents. For different applications (different output currents and output power), different values of the external resistors can be taken. Datasheet 16 Revision 1.0, 2015-04-08 ILD2111 Functional Description Table 3-4. Reference Current Arrangement Group number 1. 2. 3. 4. 3.3.4 Reference Currents 800 mA, 750 mA, 700 mA 650 mA, 600 mA, 550 mA 500 mA, 450 mA, 400 mA 350 mA, 300 mA, 250 mA Output Current Control and Measuring The output current is measured at the CS pin by means of an external shunt resistor. The controller, using floating buck topology, operates in a Continuous Conduction Mode (CCM) and is realized as a hysteretic current controller. The average output current is regulated using minimum and maximum currents (IMAX and IMIN, see Figure 11). Maximum and minimum current values are defined with respect to allowed output current ripple. The maximum current is set as a true analog comparator threshold value using an internal DAC. The minimum current value is regulated by the internal PI regulator controlling TOFF time. When the MOSFET is turned on, TON is approximately given as follows (all resistances and voltage drops of used components are neglected): 𝑇𝑂𝑁 = (𝐼𝑀𝐴𝑋 − 𝐼𝑀𝐼𝑁 ) ∙ 𝑉 𝐿𝐸𝑋𝑇 𝐼𝑁 −𝑉𝑂𝑈𝑇 = 𝐼𝑅𝐼𝑃𝑃𝐿𝐸 ∙ 𝑉 𝐿𝐸𝑋𝑇 𝐼𝑁 −𝑉𝑂𝑈𝑇 . (10) When the MOSFET is turned off, TOFF is approximately given as follows (all resistances and voltage drops of used components are neglected): 𝐿 𝐿 𝑇𝑂𝐹𝐹 = (𝐼𝑀𝐴𝑋 − 𝐼𝑀𝐼𝑁 ) ∙ 𝑉𝐸𝑋𝑇 = 𝐼𝑅𝐼𝑃𝑃𝐿𝐸 ∙ 𝑉𝐸𝑋𝑇 . 𝑂𝑈𝑇 (11) 𝑂𝑈𝑇 where VIN and VOUT are the input and output voltages respectively and LEXT is the buck inductance. Therefore, the switching frequency of the buck cycle can be rendered as: 𝑓𝑆𝑊 = 𝑇 1 𝑂𝑁 +𝑇𝑂𝐹𝐹 Datasheet = 1 𝐼𝑅𝐼𝑃𝑃𝐿𝐸 ∙𝐿𝐸𝑋𝑇 ∙( 17 . 1 1 + ) 𝑉𝐼𝑁 −𝑉𝑂𝑈𝑇 𝑉𝑂𝑈𝑇 (12) Revision 1.0, 2015-04-08 ILD2111 Functional Description TSW TON TOFF ... Inductor current IMAX IMEAN IRIPPLE IMIN TON MOSFET switching TOFF IMAX Shunt current (current sense) IMIN t t=0 Figure 11. Sampled Current When the current reaches its maximum value (IMAX), the MOSFET is turned off for a duration of TOFF, which is defined by the output of the PI regulator. After this interval elapses, the MOSFET is turned on again, the minimum current (IMIN) is sampled and the mean current for the entire PWM interval is calculated as: 𝐼𝑀𝐸𝐴𝑁 = 𝐼𝑀𝐴𝑋 +𝐼𝑀𝐼𝑁 . 2 (13) The minimum current samples are averaged and averaging happens every 16 switching cycles. This average value is then compared to a reference providing an error signal for the PI regulator, as shown in Figure 12. Based on that error, the PI regulator calculates the new TOFF time resulting in output current regulation, hence closing the regulation loop. TOFF Driving Logic PI Controller Error signal IMIN IMAX IMI N IMIN Current Measurement R_current_sense ton toff Minimal Current + IMINREF IMIN reference Figure 12. Hysteretic Current Regulator Datasheet 18 Revision 1.0, 2015-04-08 ILD2111 Functional Description PI regulator parameters can be adjusted for faster transient response (dynamic behavior) during startup and more stable output current during normal steady-state operation. These constants (PI_shift_softstart_lc, PI_gain_shift_softstart_hc, PI_gain_shift_lc and PI_gain_shift_hc, see Table 3-17) are divided into two groups depending on the current range (constant Ref_current_HCTH, see Table 3-14) and operating conditions (startup or normal). Constants for low currents (low range - LC) typically have larger values than high current parameter values (high range - HC) because, for lower currents, the error signal has to be multiplied by a larger number (Gain) to obtain appropriate behavior regarding response and stability of the output current. 3.3.5 Current Startup, Soft-Start and Shutdown Control Current soft-start and shutdown control is implemented in order to keep the input voltage VIN and supply voltage VCC, which come from the primary stage (usually a flyback converter with a transformer auxiliary winding for VCC voltage), within the operating range and stable. During the soft-start time, the output (mean) current increases slowly with programmable parameters. The startup current is defined by the constant Softstart_start_curr (see Table 3-16). Current and time steps are defined by the constant Softstart_curr_step (see Table 3-16) and parameter Softstart_time_step respectively (see Table 3-11, green line in Figure 13). The time step can be set as a number of system ticks (the default value is 100 μs). If any of the step (ICSUS = Softstart_curr_step or tCSUS = Softstart_time_step) values is zero, the buck converter will start with a 100% current, and without soft-start. During soft shutdown time, the output current decreases slowly with programmable current and time steps (constant Softshutdown_curr_step - Table 3-16 and parameter Softshutdown_time_step - Table 3-11, see red line in Figure 13). Hence, the input voltage VIN and supply voltage VCC remain in the operating range and the device will work correctly. If the soft shutdown is not enough to provide an appropriate operating range (for VIN and VCC), some minimum current (ERROR CURRENT – IERROR) defined by the parameters Err_refcurrent_max and Err_refcurrent_min (see Table 3-9 and Figure 13) will be generated for a defined time period (error time). When this time interval has elapsed (Error time timeout – constant Err_current_time, see Table 3-14), the output current is zero. If the current soft shutdown is not needed, it is necessary to set either the parameter to zero (ICSDS = Softshutdown_curr_step or tCSDS = Softshutdown_time_step). IOUT (MEAN CURRENT) ICSUS – Const tCSUS – Softstart_time_step ICSDS – Const tCSDS – Softshutdown_time_step Ierr_cur_max = Err_refcurrent_max Ierr_cur_min = Err_refcurrent_min IREF_CURRENT ICSUS ICSDS IERROR = (Ierr_cur_max + Ierr_curr_min) / 2 IERROR tCSUS ERROR CURRENT t tCSDS Soft START time Normal operation Soft SHUT-DOWN time Error time Figure 13. Soft-Start and Soft Shutdown Definitions Datasheet 19 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.4 Current Ripple vs. Switching Frequency Control Scheme The switching frequency and output current ripple must be handled in such a way as to ensure that the efficiency is as high as possible and that the ripple is in a proper range with sufficient margin to the specified maximum. Two options for implementing a suitable system are described below. 3.4.1 Fixed Current Ripple For a fixed current ripple, it is necessary to choose an appropriate value for the current ripple (parameter Curr_ripple_perc, see Table 3-12) so the switching frequency does not exceed the maximum allowed frequency around the output voltage VOUT = VIN/2. The maximum switching frequency should not exceed 250 kHz. Examples for three different current values are shown in Figure 14. fsw(Vout), Iripple=const 300 35 250 30 25 150 20 Iripple [%] fsw [kHz] 200 100 15 50 0 10 0 10 20 30 40 50 60 Vout [V] fsw(800mA) fsw(550mA) fsw(350mA) Iripple Figure 14. Switching Frequency vs. Output Voltage for Constant Output Current Ripple Iripple = 30% Datasheet 20 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.4.2 Frequency and Ripple Control The ILD2111 supports a powerful Frequency Ripple Controller (FRC) because the switching frequency of the Buck converter is not constant due to different loads (different number of LEDs leading to different output voltages). The main idea is to stabilize the operating point within configurable limits (operating area – green field, see Figure 15). During startup and normal operation, the frequency-ripple control update interval is defined by the constants FRC_reg_interval_start and FRC_reg_interval_oper (see Table 3-20). The number of FRC passes, before being considered steady, is defined by the constant FRC_pass_oper_th (see Table 3-20). Adjustable fsw A, B, C, D Corrected Operating Points Starting Point fsw_max C Starting Point D Operating Area B Starting Point A fsw_min Starting Point Iripple_min Iripple_max Iripple Figure 15. FRC Operating Area All reference current values will be arranged in four groups (see Table 3-12) where currents from the same group have the same switching frequency and current ripple limits, as explained in Section 3.3.3. For each group, there are predefined (available) parameters and constants (see Table 3-12 and Table 3-20): 1) Curr_ripple_perc – Initial (starting) current ripple (in percentage form). 2) Curr_ripple_min_(group) – Minimum allowed ripple value (minimum absolute output current ripple value, Iripple_min in mA, not in percentage form). 3) Curr_ripple_max_(group) – Maximum allowed ripple value (maximum absolute output current ripple value, Iripple_max in mA, not in percentage form). 4) FRC_freq_min_limit_(group) – Maximum allowed TPWM (defining the minimum switching frequency allowed, fsw_min). 5) FRC_freq_max_limit_(group) – Minimum allowed TPWM (defining the maximum switching frequency allowed, fsw_max). Datasheet 21 Revision 1.0, 2015-04-08 ILD2111 Functional Description An example is provided below for better understanding. The following parameters apply in this example for IOUT = 350 mA: 1. 2. 3. 4. 5. Iripple_init = 30% (or 105 mA) – Initial starting current ripple. Iripple_min = 25% (or 87.5 mA) – Minimum allowed current ripple. Iripple_max = 50% (or 175 mA) – Maximum allowed current ripple. fsw_min = 100 kHz (or TPWM_max = 1/fsw_min = 10 µs) – Minimum allowed switching frequency. fsw_max = 150 kHz (or TPWM_min = 1/fsw_max = 6.67 µs) – Maximum allowed switching frequency. The Frequency Ripple Control algorithm works as following: The system begins to operate with the defined ripple, which is given as a percentage of the average current (e.g. Iripple_init = 30% IOUT). This value is used to calculate the maximum (adding the half-ripple value to the reference current value) and minimum (subtracting the half-ripple value to the reference current value) hysteretic currents. There are several possible cases depending on the output voltage: 1) If the achieved operating frequency is within allowed borders (defined by fsw_min and fsw_max), and the starting value of the ripple is within allowed absolute ripple borders (defined by Iripple_min and Iripple_max), no correction will be performed (e.g. Vout = 10 V – orange curve, operating point B is in the operating area, B=B’, see Figure 16). 2) If the achieved operating frequency is above the maximum allowed switching frequency f sw_max (e.g. Vout = 15 V – grey curve, point C; Vout = 20 V – yellow curve, point D), the firmware will start to slowly increase the ripple in order to lower the operating frequency (the slope of this increasing ripple depends on the buck inductance LEXT, see equation (12) on page 17). It will continue increasing the ripple until the frequency falls below the high threshold fsw_max (corrected points C’ and D’, see Figure 16). 3) If the achieved operating frequency is above the maximum allowed switching frequency f sw_max (e.g. Vout = 25 V – dark blue curve, point E; Vout = 30 V – green curve, point F), the firmware will start to slowly increase the ripple in order to lower the operating frequency (the slope of this increasing ripple depends on the buck inductance LEXT, see equation (12) on page 17). It will continue increasing the ripple until it hits its maximum allowed value Iripple_max. The switching frequency will be determined by Iripple_max and could be outside the predefined borders (corrected points E’ and F’, see Figure 17). 4) If the achieved operating frequency is below the minimum allowed switching frequency fsw_min (e.g. Vout = 5 V – blue curve, point A), the firmware will start to slowly decrease the ripple in order to raise the operating frequency (the slope of this decreasing ripple depends on the buck inductance LEXT, see equation (12) on page 17). It will continue decreasing the ripple until the frequency reaches the low threshold value defined by the parameter fsw_min, or if the ripple hits the minimum allowed value defined by the parameter Iripple_min. In this case, the switching frequency could be outside the predefined borders (corrected point A’, see Figure 17). Datasheet 22 Revision 1.0, 2015-04-08 ILD2111 Functional Description Iout=350mA, Vout[V] 800 700 600 fsw [kHz] 500 400 300 30% OPERATING AREA D 200 C 50% 25% 150kHz B’ B C’ D’ 100 100kHz 0 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 Iripple [%] Vout=5V Vout=10V Vout=15V Vout=20V Vout=25V Vout=30V Figure 16. FRC Algorithm Example – Operating Point successfully put into Operating Area Datasheet 23 Revision 1.0, 2015-04-08 ILD2111 Functional Description Iout=350mA, Vout[V] 800 700 600 fsw [kHz] 500 400 300 30% OPERATING AREA F E 200 50% 25% F’ E’ 150kHz 100 100kHz A’ A 0 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 Iripple [%] Vout=5V Vout=10V Vout=15V Vout=20V Vout=25V Vout=30V Figure 17. FRC Algorithm Example – Operating Point is outside the Predefined Borders Datasheet 24 Revision 1.0, 2015-04-08 ILD2111 Functional Description An example of a frequency ripple control scheme is shown below in Figure 18, Figure 19 and Figure 20. Resistances and voltage drops of used components (VD – forward voltage of the freewheeling diode, RL – inductor resistance, RON = RDS – channel resistance when the MOSFET is ON, RCS – shunt resistance connected to the CS pin, VOUT = N·VLED+N·RLED·IOUT – output voltage (LED lighting load), N – number of LEDs, VLED – LED forward voltage, RLED – LED forward resistance) are included in calculations. 120 35 100 30 25 80 20 60 15 40 Iripple [%] fsw [kHz] FRC scheme for Iout=800 mA 10 20 5 0 0 0 10 20 30 40 50 60 Vout [V] fsw Iripple Figure 18. 800 mA FRC Scheme 140 45 120 40 100 35 80 30 60 25 40 20 20 15 0 Iripple [%] fsw [kHz] FRC scheme for Iout=550 mA 10 0 10 20 30 40 50 60 Vout [V] fsw Iripple Figure 19. 550 mA FRC Scheme Datasheet 25 Revision 1.0, 2015-04-08 ILD2111 Functional Description FRC scheme for Iout=350 mA 160 60 140 55 50 45 100 40 80 35 60 30 Iripple [%] fsw [kHz] 120 25 40 20 20 15 0 10 0 10 20 30 40 50 60 Vout [V] fsw Iripple Figure 20. 350 mA FRC Scheme Frequency Ripple Controller behavior depends on the output voltage load as mentioned before. As can be seen in previous figures, the FRC regulates the switching frequency and current ripple for this dedicated example as follows:      st 1 area – Vout 45 V (near VIN) approximately: TOFF_min criteria have the highest priority , so the frequency and ripple will have the values determined by the external hardware components (not by FRC) and can be outside the defined limits. 1 If the high voltage load is applied at the output (large number of LEDs, the output voltage is near the input voltage), the operating frequency will be low and if it falls below f sw_min, the frequency-ripple controller will start to correct it by decreasing the ripple value, as described above. On the other hand, due to the high output voltage, TOFF is quite short (see equation (11) on page 17). It is very important that the turn-off time must be longer than the predefined TOFF_min time (constant Toff_min, see Table 3-19), because during that time all calculations must be performed before starting a new cycle. At that point, the frequency-ripple controller starts to increase the ripple again in order to meet TOFF_min criteria. The final outcome is that the current ripple and switching frequency could stay outside the predefined limits (above I ripple_max and below fsw_min respectively) – point G’ in Figure 21. If TOFF falls below the minimum allowed value (low ripple means short T OFF time for constant output voltage), the regulator cannot maintain the average current any longer, therefore influencing accuracy. If parameters are configured properly, any of above mentioned actions lead to stable operating conditions for the given current/load situation. However, there is drift in the operating frequency produced by the input voltage ripple that has to be taken into account when deciding on parameter values. The frequency ripple controller will always try to put the operating point into the operating area, but its final position will depend on the other criteria that affect its position. Datasheet 26 Revision 1.0, 2015-04-08 ILD2111 Functional Description FRC scheme for Iout=350mA 160 60 55 140 G’ 50 120 fsw [kHz] 100 40 80 35 30 60 25 G’ 40 Iripple [%] 45 20 20 15 0 10 0 10 20 30 40 50 60 Vout [V] fsw Iripple Figure 21. Operating Point determined by Toff_min criteria Datasheet 27 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.5 Input Voltage Measurement and Calibration There are some indirect measurements, like the output voltage VOUT and output power POUT, that take input voltage measurement as an input. Therefore the accuracy of those measurements depends on the input voltage VIN accuracy, and typically is lower due to the accuracies of other variables. Therefore it is important that the input voltage is accurately measured. The input voltage is sensed at the VIN pin. A filter capacitor CVIN (typically 100 nF) is used for voltage (at the pin VIN) filtering of conductive and electromagnetic interference caused by the converter switching operation. The measurement circuit is shown in Figure 22 below. R_vin VIN ILD2111 VIN S H U N T IMEAS CVIN ADC GND Figure 22. Input Voltage Measurement Schematic Two measurement ranges related to the VIN pin are implemented. They are called current ranges because calibration is based on the current flowing into the VIN pin. The two ranges use a different value of the internal shunt resistor, where ADC measures the voltage drop. The reason for calibration is to make results independent of RSHUNT production tolerance by including the measured value of RSHUNT as part of internal chip calibration data during chip production. Nominal shunt values for an appropriate current range are as follows: 1) Current range 00b => IMEAS = 209 µA, RSHUNT = 6690 Ω. 2) Current range 01b => IMEAS = 1.6 mA, RSHUNT = 1490 Ω. The current range is defined by the parameter Vin_current_range (see Table 3-8). Depending on the input voltage range to be measured, for lower power dissipation, the value of the external resistor R_vin and the maximum current measurement range must be chosen carefully. Especially for high VIN voltage (bus voltage), power dissipation needs to be considered as part of system losses. For more details, see the examples below. Datasheet 28 Revision 1.0, 2015-04-08 ILD2111 Functional Description Examples: 1) If the maximum bus voltage is high, e.g. VINMAX = 500 V, the current measurement range (209 µA) should be chosen to minimize power dissipation over R_vin. The value of the external resistor R_vin is obtained from the equation below (209 µA would ideally be full scale at the ADC; to achieve accurate measurement over the production spread of ILD2111, use a margin factor of 75%). Therefore, 𝑅_𝑣𝑖𝑛 = 𝑉𝐼𝑁𝑀𝐴𝑋 0.75∙𝐼209µ𝐴 − 𝑅𝑆𝐻𝑈𝑁𝑇 = 3.18 MΩ. (14) 2) If the maximum bus voltage is lower, e.g. VINMAX = 80 V, the current measurement range (1.6 mA) should be chosen. Therefore, 𝑅_𝑣𝑖𝑛 = Datasheet 𝑉𝐼𝑁𝑀𝐴𝑋 0.75∙𝐼1.6𝑚𝐴 29 − 𝑅𝑆𝐻𝑈𝑁𝑇 = 65.2 kΩ. (15) Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.6 Protection Features Table 3-5 gives an overview of the supported protection features. Two protection modes are implemented (auto restart mode and latch mode), which can be entered. Protection features can be configured by the parameters that are shown in Table 3-9 and Table 3-10. An error counter counts errors up to 4 restarts, defined by the constant value Err_restart_tries (see Table 3-14). The error counter is reset when the device operates without additional errors for the time defined by the constant Err_cnt_clear_time (see Table 3-14), or at the startup sequence, e.g. if VCC falls below the voltage threshold (see Table 4-4). Table 3-5. Protection Features Undervoltage Protection for DC Input Line – VIN Undervoltage Overvoltage Protection for DC Input Line – VIN Overvoltage Output Undervoltage Protection – VOUT Undervoltage Open Output Protection Output Overvoltage Protection – VOUT Overvoltage Output Overpower Protection – POUT Overpower Overtemperature Protection Overcurrent Protection – Level 2 (OCP2) Functional Protections Datasheet 30 Section 3.6.1 Section 3.6.2 Section 3.6.3 Section 3.6.4 Section 3.6.5 Section 3.6.6 Section 3.6.7 Section 3.6.8 Section 3.6.9 Revision 1.0, 2015-04-08 ILD2111 Functional Description Protection functions are shown in a matrix in Table 3-6 below. Startup Normal Shutdown Error Current Buck OFF Consequence Minimum Duration of effect Operating Mode Detection Active Name of Fault Table 3-6. Protection Functions Matrix Description of Fault Characteristics of Fault VIN Undervoltage INPUV 1.6 ms X X - - - VIN Overvoltage INPOV 1.6 ms X X - - - VOUT Undervoltage OUTUV 0.8 ms @40 kHz - X - - - Open Output OPEN 1) X X - - - VOUT Overvoltage OUTOV 0.4 ms @40 kHz - X - - - POUT Overpower PWR 6.4 ms @40 kHz - X - - - Overtemperature (Internal or External) OTI or OTE 0.4 ms @40 kHz X X - - - OCP2 OCP Instantly X X - - - Startup - Waits until condition is removed Normal – Auto-restart Startup - Waits until condition is removed Normal – Auto-restart Auto-restart mode with 4 tries (restarts). After 4 failed attempts, the device enters latch mode Auto-restart mode with 4 tries (restarts). In each restart try, I-set procedure will be executed. After 4 failed attempts, the device enters latch mode Auto-restart mode with 4 tries (restarts). After 4 failed attempts, the device enters latch mode Auto-restart mode with 4 tries (restarts). After 4 failed attempts, the device enters latch mode Startup - Waits until condition is removed Normal – Auto-restart The device is in predefined time loop until the device is switched off or when the cause of the OCP2 event is removed – see Section 3.6.8 X = Checked during Operating Mode - = Not checked during Operation Mode In each restart attempt, the IC remains in a time loop whose duration is determined by the constant Err_restart_time, see Table 3-14 1) Defined by constant Open_out_timeout, see Section 3.6.4 . All protections are described in the following sections. Datasheet 31 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.6.1 Undervoltage Protection for DC Input Line – VIN Undervoltage Undervoltage protection for the DC input line prevents the device from operating with an excessively low VIN voltage. If the input voltage is below the specified value, the output current is turned off. The device waits until the input undervoltage (low voltage value) condition is removed (Vin_min_start is met) and then starts with output current generation again. There are two hysteretic input voltage values that are used as thresholds 1 during the startup sequence (upper threshold value – parameter Vin_min_start, see Table 3-9) and during 1 operation (lower threshold value – parameter Vin_min_oper, see Table 3-9) . If the input voltage is VIN < Vin_min_oper during operation, the buck converter will be shut down and will wait for the VIN startup condition (when Vin_min_start is reached). This event does not affect the error counter. 3.6.2 Overvoltage Protection for DC Input Line – VIN Overvoltage Overvoltage protection for the DC input line prevents the device from operating with an excessively high VIN voltage. After the overvoltage condition on input is detected, the output current is turned off. The device waits for the input overvoltage condition to be removed (Vin_max_start is met) and then starts output current generation again. There are two hysteretic input voltage values that are used as thresholds during the startup sequence 1 (lower threshold value – parameter Vin_max_start, see Table 3-9) and during operation (upper threshold value 1 – parameter Vin_max_oper, see Table 3-9) . If the input voltage is VIN > Vin_max_oper during operation, the buck converter will be shut down and will wait for the VIN startup condition (when Vin_max_start is reached). This event does not affect the error counter. 3.6.3 Output Undervoltage Protection – VOUT Undervoltage Output undervoltage protection prevents the device from operating with an excessively low output voltage VLEDmin or when LED output is lowered. If the output voltage is lower than the minimum value VOUT < Vout_min, an undervoltage output is detected, and the device enters error auto-restart mode with 4 tries (restarts) – constant Err_restart_tries (see Table 3-14). After 4 failed attempts, the device enters latch mode. The minimum output operating voltage value is programmable (parameter Vout_min, Table 3-9). Undervoltage output is checked during steady-state condition, after completing soft-start. The restart timeout startup delay is predefined by the constant Err_restart_time (see Table 3-14). 3.6.4 Open Output Protection Open output protection prevents the device from operating when no load on output is detected. It is detected when the time to achieve IMAX (see Figure 11) exceeds the value of the parameter Open_out_timeout 2 (see Table 3-14) . If the open output condition is detected, the device enters error auto-restart mode with 4 tries (restarts) – constant Err_restart_tries (see Table 3-14). In each attempt, the device executes the reference resistor reading procedure (I-set procedure, see Section 3.3.3). The duration of the I-set procedure is defined by the parameter RC_measurement_timeout (duration = 2 · RC_measurement_timeout, see Table 3-19). The restart timeout startup delay is predefined by the constant Err_restart_time (see Table 3-14). After 4 failed attempts, the device enters latch mode. The total duration of the restart attempt can be obtained as the sum of the two above-mentioned times (I-set procedure + restart timeout). If the LED lighting load is connected (or replaced) at the output between two restart attempts, the I-set procedure will detect the new R_iset resistance and the buck converter will try to start with the newly determined reference current. 1 To minimize the impact of fluctuations on the exact VIN voltage value, filtering is implemented using a first-order filter whose coefficient is defined by the constant Vin_filt_coef (see Table 3-14) 2 During buck ‘on time’ TON (see Figure 11), the gate driver stays constantly ‘high’ until IMAX is reached, or Open_out_timeout expires. This can lead to a long ‘high’ time. In case there is a ‘high side driver’ circuit between the ILD2111 gate drive and MOSFET gate, proper functionality for all operating conditions needs to be considered. A stable OCP1 value (IMAX) is obtained by filtering defined by the constant Alt_OCP1_filt_stable (see Table 3-14) Datasheet 32 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.6.5 Output Overvoltage Protection – VOUT Overvoltage Output overvoltage protection prevents the device from operating when the high voltage at the output VOUT is 1 detected . If the output voltage is higher than the maximum value VOUT > Vout_max, the device enters error auto-restart mode with 4 tries (restarts) – constant Err_restart_tries (see Table 3-14). After 4 failed attempts, the device enters latch mode. The maximum output operating voltage value is programmable (parameter Vout_max, Table 3-9). Output voltage is checked during the steady-state condition, after completing soft-start. The restart timeout startup delay is predefined by the constant Err_restart_time (see Table 3-14). 3.6.6 Output Overpower Protection – POUT Overpower 2 Output overpower protection prevents damage to output components due to high output power . The maximum allowed output power value (parameter Pout_max, see Table 3-9) is set by the constants Pout_corr_LC and Pout_corr_HC (Pout_max_lc = Pout_corr_LC · Pout_max and Pout_max_hc = Pout_corr_HC · Pout_max) for low current and high current range respectively (see Table 3-14). The parameter Ref_current_HCTH decides between the low current and high current range (see Table 3-14). If the output power exceeds the maximum allowed operational value, the device enters error auto-restart mode with 4 tries (restarts) – constant Err_restart_tries (see Table 3-14). After 4 failed attempts, the device enters latch mode. Output overpower is checked during the steady-state condition after completing soft-start. The restart timeout startup delay is predefined by the constant Err_restart_time (see Table 3-14). 1 Output voltage is internally calculated, based on VIN and T ON / TPWM duty factor. Output voltage can be calculated approximately as VOUT = D * VIN = (TON / TPWM) * VIN (all resistances and voltage drops of used components are neglected). To minimize the impact of fluctuations on the exact TPWM period value, filtering is implemented using a first-order filter whose coefficient is defined by the parameter Tpwm_filt_coef (see Table 3-14). 2 Output power is internally calculated, based on V IN, IOUT and TON / TPWM ratio. The actual TON / TPWM ratio (for true output power) also depends on parasitic effects (e.g. MOSFET diode reverses recovery time, additional circuit like high side driver). These parasitic effects are unknown to the chip calculation and need to be considered for choosing appropriate Pout_max values. To minimize the impact of fluctuations on the calculated POUT value, filtering is implemented using a first-order filter whose coefficient is defined by the parameter Pout_filt_coef (see Table 3-14) before comparing the output power against Pout_max_lc or Pout_max_hc thresholds. Datasheet 33 Revision 1.0, 2015-04-08 ILD2111 Functional Description 3.6.7 Overtemperature Protection The ILD2111 supports overtemperature protection by means of internal and external temperature sensors. If both internal temperature protection and external temperature protection requests for the current level change, the lower current level will prevail. If the external sensor is not used (disabled by configuration), only the internal temperature protection is processed. 3.6.7.1 Internal Temperature Sensor – Internal PWM Dimming 1 Internal temperature-based protection uses internal temperature sensor measurement for reduction of the output current in the case that device temperature increases. For this purpose, two temperature thresholds - T1 and T2 - are defined (parameters ITP_temperature_hot – T1 and ITP_temperature_critical – T2 increasing in value – see Table 3-10) as well as one up-slope (constant ITP_PWM_inc_step - Table 3-15 and parameter ITP_PWM_inc_time_step - Table 3-10) and one down-slope (constant ITP_PWM_dec_step - Table 3-15 and parameter ITP_PWM_dec_time_step - Table 3-10). Temperature thresholds can be set in steps of 1°C and slopes as percentages of the average current per minute. The output current level is reduced by PWM modulation with a programmable frequency rate – see Figure 28. There are three temperature-related operating conditions: - Normal T 2 mA) OCP1 Comparator Characteristics Operating range VOCP1 OCP1 threshold voltage step width OCP1 threshold at full scale setting (CS_OCP1LVL=FFH) OCP1 integral nonlinearity VOCP1ST VOCP1FS VOCP1INL Values Unit Note / Test Condition Min. Typ. Max. 600 1000 1500 mV Analog clamp structure activated - 0.6 - V Current sense range 11b - 0.8 - V Current sense range 10b -5 - 5 % Voltage divider tolerance 125 155 190 ns 2) 0 0 392 583 -1.9 1.581 2.371 403 605 - VREF/6 VREF/4 430 627 1.9 V V mV mV mV mV Current sense range 11b 1) Current sense range 10b 1) Current sense range 11b 1) Current sense range 10b 1) Current sense range 11b 1) Current sense range 10b 1) Current sense range 11b -2.9 - 2.9 180 260 345 LSB8 ns 120 185 250 ns 100 130 165 ns 60 - 95 ns 1) 1) dVCS/dt = 100 V/µs fMCLK = 66 MHz GD0 driven by QR_GATE FIL_OCP2.STABLE = 3 1) LSB8 Delay from VCS crossing VCSOCP1 to begin of GD0 turn-off (IGD0 > 2 mA) OCP1 comparator input single pulse width filter tCSGD0OCP1 tOCP1PW Sample & Hold Characteristics Nominal S&H operating VCSH 0 VREF/6 range 0 VREF/4 Reduced S&H operating RRCVSH 4 90 range S&H settling time for ADC tCSHSTC 300 sampling 1) Defined by the parameter Current_sense_OCP1 (See Table 3-8). 2) Not tested in production test. 3) Operational values. 1) Current sense range 10b 2) dVCS/dt = 53 mV/µs fMCLK = 66 MHz GD0 driven by QR_GATE 2) dVCS/dt = 272 mV/µs fMCLK = 66 MHz GD0 driven by QR_GATE 2) dVCS/dt = 100 V/µs fMCLK = 66 MHz GD0 driven by QR_GATE Shorter pulses than min. are suppressed, longer pulses than max. are 2) passed 1) V V % Current sense range 11b 1) Current sense range 10b ns STC = 5 3) The absolute error of the OCP1 comparator is limited according to |VOCP1 - VOCP1Nom| ≤ |VOCP1FS - VOCP1ST * 255| + |VOCP1INL| Datasheet 59 Revision 1.0, 2015-04-08 ILD2111 Electrical Characteristics If the voltage at pin CS VCS(t) is a linear rising signal starting below the OCP1 threshold, the delay between the time when the voltage crosses the threshold and the CS comparator output rising edge t CSGD0OCP1 is a function of the slope. Two representative slopes are specified to characterize this dependency. Table 4-8. Electrical Characteristics of Gate Driver Pin GD0 Parameter Symbol Values Unit Note / Test Condition APD low voltage (active pull down while device is not powered or gate driver is not enabled) RPPD value VAPD Min. - RPPD - 600 - kΩ RPPD tolerance RPD -25 - 25 % Driver Output low impedance RGDL - - 6.5 Ω Output voltage at high state VGDH 4.5 - 15 V Output voltage tolerance VGDH -5 - 5 % -0.5 - 0.5 V VGDHRR VVCC 0.5 - VVCC V -IGDH 30 - 118 mA IGDH tIGDHST -20 - - 20 40 % ns IGDDIS 500 - - mA Rail-to-rail output high voltage Nominal output high current 2) Output high current tolerance Output high current settling time Discharge current 1) 2) 3) 4) Typ. - Max. 1.6 V IGD = 5 mA Permanent pull-down resistor inside gate driver Permanent pull-down resistor inside gate driver Driver stage enabled and at low state 1) Programming options 4) Tolerance of programming options if VGDH > 10 V Tolerance of programming options if VGDH < 10 V If VVCC < programmed VGDH and output at high state 3) Programming options , CLOAD = 2 nF Start of high state to 4) output current stable VGD = 4 V and driver at 4) low state Defined by the parameter GD_voltage (See Table 3-8). If open drain mode is selected, then -IGDH = 0. Defined by the parameter GD_current (See Table 3-8). Not tested in production test. Table 4-9. Electrical Characteristics of Digital Input Pin PWM Parameter Symbol Input capacitance CINPUT Min. - Typ. - Input low voltage VIL - Input high voltage VIH Input low current with active weak pull-up WPU Input high current with active weak pull-down WPD Maximum input frequency 1) Values Unit Note / Test Condition Max. 25 pF 1) - 1.0 V 2.1 - - V -ILPU 30 - 90 µA Measured at max. VIL IHPD 110 - 300 µA Measured at min. VIH fINPUT 15 - - MHz Not tested in production test. Datasheet 60 Revision 1.0, 2015-04-08 ILD2111 Electrical Characteristics Table 4-10. Electrical Characteristics of Pin TS Parameter Nominal S&H input voltage range Reduced S&H input voltage range Maximum Error for ADC measurement (8 bit result) Maximum Error for corrected ADC measurement (8 bit result) S&H settling time for ADC sample Voltage Drop of sampled input voltage if ADC measurement is started 100 μs after end of sampling phase 1) 2) Symbol Values VZSH Min. 0 Typ. - RRZVSH 4 - Max. 2/3 * VREF 95 TE0ZVS0 TE256ZVS0 TET0ZVS0 TET256ZVS0 - - tZSHSTC - VZDROP 6.3 6.3 2.8 4.6 LSB8 LSB8 LSB8 LSB8 1) - 300 ns STC = 5 0 - 3 LSB8 TJ = 85°C 0 5 - 1) 1) 1) 1) TJ = 125°C 1) LSB8 Not tested in production test. Operational values. Symbol Usable sample time tS Conversion time for STC = 5 tC(STC=5) Min. 24 * tMCLK - Conversion time for STC = 15 tC(STC=15) - Integral non-linearity INL - 57 * tMCLK 97 * tMCLK - Differential non-linearity DNL - - 3) V 2) Parameter 2) Note / Test Condition % Table 4-11. Electrical Characteristics of the A/D Converter 1) Unit 1) Values Typ. - Unit Note / Test Condition ns Selected by STC between 5 and 15 ns 2) - ns 2) 1 LSB8 3) 0.8 LSB8 Max. 64 * tMCLK - The sample time tS of the A/D converter is given by tS = (STC+1) * 4 * tMCLK. The conversion time tC (including sample time) is given by tC = 33 * tMCLK + (STC+1) * 4 * tMCLK. Any conversion needs exact these numbers of clock cycles by design. ADC capability measured via channel MFIO without errors due to switching of neighboring pins, measured with STC = 5. Table 4-12. Electrical Characteristics of the Reference Voltage VREF Parameter Symbol Reference voltage VREF Min. - Typ. 2.428 Max. - V VREF tolerance VREF -1 - 1 % Trimmed, TA = 25°C VREF tolerance VREF -2 - 2 % Trimmed, over full temperature range and 1) aging 1) Values Unit Note / Test Condition Not tested in production test. Datasheet 61 Revision 1.0, 2015-04-08 ILD2111 Electrical Characteristics Table 4-13. Electrical Characteristics of the Clock Oscillators Parameter Symbol Master clock oscillation period tMCLK Values Min. 20.0 Typ. 20.9 Max. 22.0 Unit Note / Test Condition ns Referred as 50 MHz fMCLK Table 4-14. Electrical Characteristics of the internal Temperature Sensor Parameter Symbol Min. Typ. Temperature sensor output voltage operating range Temperature sensor tolerance VADCTEMP 0 - TEMP -8 - 1) Values Max. 190/255 * VREF 8 Unit Note / Test Condition V VADCTEMP = VREF/255 * (40 + temperature in °C) Incl. ADC conversion 1) accuracy at 4 σ K Not tested in production test. Table 4-15. Electrical Characteristics of the OTP Programming Parameter OTP programming voltage at the VCC pin OTP programming current 1) 2) Symbol Unit Note / Test Condition VPP Min. 7.35 Typ. 7.5 Values Max. 7.65 V 1) 2) IPP - 1.6 - mA Programming of 4 bit in 2) parallel Operational values. Not tested in production test. Datasheet 62 Revision 1.0, 2015-04-08 ILD2111 Outline Dimensions 5 Outline Dimensions Outline dimensions are shown in Figure 32. Figure 32. PG-DSO-8-58 Notes 1. You can find all of our packages, types of packing and other information on our Infineon Internet page “Products”: http://www.infineon.com/products. 2. Dimensions in mm. Datasheet 63 Revision 1.0, 2015-04-08 Edition 2015-04-08 Published by Infineon Technologies AG 81726 Munich, Germany © 2015 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. 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