IPA040N06NM5SXKSA1

IPA040N06NM5S MOSFET OptiMOSTM5Power-Transistor,60V PG-TO220FP Features •Idealforhighfrequencyswitchingandsync.rec. •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 Productvalidation QualifiedaccordingtoJEDECStandard Drain Pin 2 Table1KeyPerformanceParameters Parameter Value Unit VDS 60 V RDS(on),max 4 mΩ ID 72 A Qoss 44 nC QG(0V..10V) 38 nC Type/OrderingCode Package IPA040N06NM5S PG-TO 220 FullPAK Final Data Sheet Gate Pin 1 Source Pin 3 Marking 040N065S 1 RelatedLinks - Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Final Data Sheet 2 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 72 51 A VGS=10V,TC=25°C VGS=10V,TC=100°C - 288 A TC=25°C - - 77 mJ ID=72A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 36 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Pulsed drain current1) 2) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case RthJC Values Min. Typ. Max. - - 4.2 °C/W - 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 2.8 3.3 V VDS=VGS,ID=50µA - 0.1 10 1 100 µA VDS=60V,VGS=0V,Tj=25°C VDS=60V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 3.6 4.7 4.0 - mΩ VGS=10V,ID=72A VGS=6V,ID=18A Gate resistance3) RG - 1.3 - Ω - Transconductance gfs - 110 - S |VDS|≥2|ID|RDS(on)max,ID=72A Min. Typ. Max. V(BR)DSS 60 - Gate threshold voltage VGS(th) 2.1 Zero gate voltage drain current IDSS Gate-source leakage current 1) See Diagram 3 for more detailed information See Diagram 13 for more detailed information 3) Defined by design. Not subject to production test. 2) Final Data Sheet 3 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Unit Note/TestCondition 3500 pF VGS=0V,VDS=30V,f=1MHz 670 - pF VGS=0V,VDS=30V,f=1MHz - 28 - pF VGS=0V,VDS=30V,f=1MHz td(on) - 14 - ns VDD=30V,VGS=10V,ID=72A, RG,ext=3Ω Rise time tr - 16 - ns VDD=30V,VGS=10V,ID=72A, RG,ext=3Ω Turn-off delay time td(off) - 33 - ns VDD=30V,VGS=10V,ID=72A, RG,ext=3Ω Fall time tf - 8 - ns VDD=30V,VGS=10V,ID=72A, RG,ext=3Ω Unit Note/TestCondition Min. Typ. Max. Ciss - 2700 Output capacitance Coss - Reverse transfer capacitance Crss Turn-on delay time Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 13 - nC VDD=30V,ID=72A,VGS=0to10V Gate charge at threshold Qg(th) - 8 - nC VDD=30V,ID=72A,VGS=0to10V Gate to drain charge Qgd - 7 - nC VDD=30V,ID=72A,VGS=0to10V Switching charge Qsw - 13 - nC VDD=30V,ID=72A,VGS=0to10V Gate charge total Qg - 38 50 nC VDD=30V,ID=72A,VGS=0to10V Gate plateau voltage Vplateau - 4.9 - V VDD=30V,ID=72A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 33 - nC VDS=0.1V,VGS=0to10V Output charge Qoss - 44 - nC VDD=30V,VGS=0V Unit Note/TestCondition 1) Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) 2) Values Min. Typ. Max. IS - - 30 A TC=25°C IS,pulse - - 288 A TC=25°C VSD - 0.88 1.2 V VGS=0V,IF=30A,Tj=25°C trr - 33 - ns VR=30V,IF=30A,diF/dt=100A/µs Qrr - 28 - nC VR=30V,IF=30A,diF/dt=100A/µs Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S 4Electricalcharacteristicsdiagrams Diagram2:Draincurrent 40 80 35 70 30 60 25 50 ID[A] Ptot[W] Diagram1:Powerdissipation 20 40 15 30 10 20 5 10 0 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 102 10 µs 1 ms 10 ms 100 µs 100 ID[A] ZthJC[K/W] 101 100 DC 10-1 10-1 10-2 10-1 100 101 102 10-2 10-5 10-4 10-3 VDS[V] 10-1 100 101 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-2 ZthJC=f(tp);parameter:D=tp/T 5 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 300 12 8V 10 V 250 10 7V 4.5 V 6V 5V 8 RDS(on)[mΩ] ID[A] 200 150 100 6 6V 7V 4 8V 5V 10 V 50 2 4.5 V 0 0 1 2 3 4 0 5 0 25 50 75 VDS[V] 100 ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 300 12 250 10 200 8 RDS(on)[mΩ] ID[A] 125 150 ID[A] 150 100 175 °C 6 4 50 25 °C 2 175 °C 25 °C 0 0 1 2 3 4 5 6 7 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=72A;parameter:Tj 6 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S Diagram9:Normalizeddrain-sourceonresistance Diagram10:Typ.gatethresholdvoltage 2.0 3.5 3.0 2.5 1.2 VGS(th)[V] RDS(on)(normalizedto25°C) 1.6 0.8 2.0 500 µA 1.5 50 µA 1.0 0.4 0.5 0.0 -80 -40 0 40 80 120 160 0.0 -80 200 -40 0 40 Tj[°C] 80 120 160 200 Tj[°C] RDS(on)=f(Tj),ID=72A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss Coss 102 IF[A] 102 C[pF] 103 101 Crss 101 0 10 20 30 40 50 60 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 7 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 12 V 30 V 48 V 8 25 °C 101 100 °C VGS[V] IAV[A] 6 4 0 10 150 °C 2 10-1 100 101 102 103 tAV[µs] 0 0 5 10 15 20 25 30 35 40 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=72Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 65 64 63 VBR(DSS)[V] 62 61 60 59 58 57 -80 -40 0 40 80 120 160 200 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 8 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S 5PackageOutlines 1 2 3 DIMENSIONS A A1 A2 b b1 b2 b3 b4 c D D1 E e H L L1 øP Q MILLIMETERS MIN. MAX. 4.50 4.90 2.34 2.80 2.42 2.86 0.65 0.90 0.95 1.38 1.20 1.50 0.65 1.38 1.20 1.50 0.40 0.63 15.67 16.15 8.97 9.83 10.00 10.65 2.54 28.70 29.75 12.78 13.75 3.45 2.83 3.00 3.38 3.50 3.15 DOCUMENT NO. Z8B00181328 REVISION 03 ISSUE DATE 23.07.2018 SCALE 5:1 0 1 2 3 4 5mm EUROPEAN PROJECTION Figure1OutlinePG-TO220FullPAK,dimensionsinmm/inches Final Data Sheet 9 Rev.2.1,2019-09-02 OptiMOSTM5Power-Transistor,60V IPA040N06NM5S RevisionHistory IPA040N06NM5S Revision:2019-09-02,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-07-16 Release of final version 2.1 2019-09-02 Update package outline Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 10 Rev.2.1,2019-09-02