IPA050N10NM5S
MOSFET
OptiMOSTM5Power-Transistor,100V
PG-TO220FP
Features
•Idealforhighfrequencyswitchingandsync.rec.
•ExcellentgatechargexRDS(on)product(FOM)
•Verylowon-resistanceRDS(on)
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
Productvalidation
QualifiedaccordingtoJEDECStandard
Drain
Pin 2
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
100
V
RDS(on),max
5.0
mΩ
ID
66
A
Qoss
67
nC
QG(0V..10V)
51
nC
Type/OrderingCode
Package
IPA050N10NM5S
PG-TO 220 FullPAK
Final Data Sheet
Gate
Pin 1
Source
Pin 3
Marking
050N105S
1
RelatedLinks
-
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Final Data Sheet
2
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
66
47
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
-
264
A
TC=25°C
-
-
110
mJ
ID=66A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
38
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
175
°C
IEC climatic category; DIN IEC 68-1:
55/175/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
ID,pulse
-
Avalanche energy, single pulse
EAS
Gate source voltage
Pulsed drain current1)
2)
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case
RthJC
Values
Min.
Typ.
Max.
-
-
3.9
°C/W -
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3.0
3.8
V
VDS=VGS,ID=84µA
-
0.1
10
1
100
µA
VDS=100V,VGS=0V,Tj=25°C
VDS=100V,VGS=0V,Tj=125°C
IGSS
-
1
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
4.7
5.6
5.0
-
mΩ
VGS=10V,ID=33A
VGS=6V,ID=17A
Gate resistance3)
RG
-
1.2
-
Ω
-
Transconductance
gfs
-
85
-
S
|VDS|≥2|ID|RDS(on)max,ID=33A
Min.
Typ.
Max.
V(BR)DSS
100
-
Gate threshold voltage
VGS(th)
2.2
Zero gate voltage drain current
IDSS
Gate-source leakage current
1)
See Diagram 3 for more detailed information
See Diagram 13 for more detailed information
3)
Defined by design. Not subject to production test.
2)
Final Data Sheet
3
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
Table5Dynamiccharacteristics
Parameter
Symbol
Input capacitance1)
Values
Unit
Note/TestCondition
4700
pF
VGS=0V,VDS=50V,f=1MHz
560
-
pF
VGS=0V,VDS=50V,f=1MHz
-
25
-
pF
VGS=0V,VDS=50V,f=1MHz
td(on)
-
13
-
ns
VDD=50V,VGS=10V,ID=33A,
RG,ext=1.6Ω
Rise time
tr
-
7
-
ns
VDD=50V,VGS=10V,ID=33A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
27
-
ns
VDD=50V,VGS=10V,ID=33A,
RG,ext=1.6Ω
Fall time
tf
-
7
-
ns
VDD=50V,VGS=10V,ID=33A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Min.
Typ.
Max.
Ciss
-
3600
Output capacitance
Coss
-
Reverse transfer capacitance
Crss
Turn-on delay time
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Values
Min.
Typ.
Max.
Qgs
-
16
-
nC
VDD=50V,ID=33A,VGS=0to10V
Gate charge at threshold
Qg(th)
-
11
-
nC
VDD=50V,ID=33A,VGS=0to10V
Gate to drain charge
Qgd
-
10
-
nC
VDD=50V,ID=33A,VGS=0to10V
Switching charge
Qsw
-
16
-
nC
VDD=50V,ID=33A,VGS=0to10V
Gate charge total
Qg
-
51
68
nC
VDD=50V,ID=33A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.5
-
V
VDD=50V,ID=33A,VGS=0to10V
Gate charge total, sync. FET
Qg(sync)
-
44
-
nC
VDS=0.1V,VGS=0to10V
Output charge
Qoss
-
67
-
nC
VDD=50V,VGS=0V
Unit
Note/TestCondition
1)
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
2)
Values
Min.
Typ.
Max.
IS
-
-
32
A
TC=25°C
IS,pulse
-
-
264
A
TC=25°C
VSD
-
0.95
1.2
V
VGS=0V,IF=66A,Tj=25°C
trr
-
48
-
ns
VR=50V,IF=66A,diF/dt=100A/µs
Qrr
-
62
-
nC
VR=50V,IF=66A,diF/dt=100A/µs
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
40
70
35
60
30
50
40
ID[A]
Ptot[W]
25
20
30
15
20
10
10
5
0
0
25
50
75
100
125
150
175
0
200
0
25
50
75
TC[°C]
100
125
150
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
200
101
10
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
1 µs
102
10 µs
1 ms
10 ms
100 µs
1
100
ZthJC[K/W]
10
ID[A]
175
TC[°C]
100
DC
10-1
10-1
10-2
10-3
10-1
100
101
102
103
10-2
10-5
10-4
10-3
VDS[V]
10-1
100
101
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-2
ZthJC=f(tp);parameter:D=tp/T
5
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
280
15.0
8V
7V
10 V
240
12.5
6V
4.5 V
200
10.0
ID[A]
RDS(on)[mΩ]
160
120
5V
5V
7.5
6V
5.0
7V
8V
80
10 V
2.5
40
4.5 V
0
0
1
2
3
4
0.0
5
0
20
40
60
VDS[V]
80
100
120
140
ID[A]
ID=f(VDS),Tj=25°C;parameter:VGS
RDS(on)=f(ID),Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.drain-sourceonresistance
280
15.0
240
12.5
200
10.0
175 °C
ID[A]
RDS(on)[mΩ]
160
120
7.5
5.0
25 °C
80
40
2.5
175 °C
25 °C
0
0
1
2
3
4
5
6
7
VGS[V]
0
2
4
6
8
10
VGS[V]
ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
0.0
RDS(on)=f(VGS),ID=33A;parameter:Tj
6
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
Diagram9:Normalizeddrain-sourceonresistance
Diagram10:Typ.gatethresholdvoltage
2.0
4.0
3.5
1.6
2.5
1.2
VGS(th)[V]
RDS(on)(normalizedto25°C)
3.0
0.8
2.0
840 µA
1.5
84 µA
1.0
0.4
0.5
0.0
-80
-40
0
40
80
120
160
0.0
-80
200
-40
0
40
Tj[°C]
80
120
160
200
Tj[°C]
RDS(on)=f(Tj),ID=33A,VGS=10V
VGS(th=f(Tj),VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
25 °C, max
175 °C
175 °C, max
Ciss
Coss
102
IF[A]
102
C[pF]
103
101
Crss
101
0
20
40
60
80
100
100
0.00
0.25
VDS[V]
0.75
1.00
1.25
1.50
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
0.50
IF=f(VSD);parameter:Tj
7
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
2
10
10
20 V
50 V
80 V
8
25 °C
1
10
100 °C
VGS[V]
IAV[A]
6
4
0
10
150 °C
2
10-1
100
101
102
103
tAV[µs]
0
0
10
20
30
40
50
60
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj,start
VGS=f(Qgate),ID=33Apulsed,Tj=25°C;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Diagram Gate charge waveforms
108
106
VBR(DSS)[V]
104
102
100
98
96
-80
-40
0
40
80
120
160
200
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
8
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
5PackageOutlines
1
2
3
DIMENSIONS
A
A1
A2
b
b1
b2
b3
b4
c
D
D1
E
e
H
L
L1
øP
Q
MILLIMETERS
MIN.
MAX.
4.50
4.90
2.34
2.80
2.42
2.86
0.65
0.90
0.95
1.38
1.20
1.50
0.65
1.38
1.20
1.50
0.40
0.63
15.67
16.15
8.97
9.83
10.00
10.65
2.54
28.70
29.75
12.78
13.75
3.45
2.83
3.00
3.38
3.50
3.15
DOCUMENT NO.
Z8B00181328
REVISION
03
ISSUE DATE
23.07.2018
SCALE 5:1
0
1
2
3
4 5mm
EUROPEAN PROJECTION
Figure1OutlinePG-TO220FullPAK,dimensionsinmm/inches
Final Data Sheet
9
Rev.2.1,2019-08-28
OptiMOSTM5Power-Transistor,100V
IPA050N10NM5S
RevisionHistory
IPA050N10NM5S
Revision:2019-08-28,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2019-07-03
Release of final version
2.1
2019-08-28
Update package outline
Trademarks
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InfineonTechnologiesAG
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Final Data Sheet
10
Rev.2.1,2019-08-28