IPA083N10N5XKSA1

IPA083N10N5 MOSFET OptiMOSª5Power-Transistor,100V TO-220-FP Features •Idealforhighfrequencyswitchingandsync.rec. •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplications •Halogen-freeaccordingtoIEC61249-2-21 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 8.3 mΩ ID 44 A Qoss 40 nC QG(0V..10V) 30 nC Type/OrderingCode Package IPA083N10N5 PG-TO220-FP 1) Drain Pin 2 Gate Pin 1 Source Pin 3 Marking 083N10N5 RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Final Data Sheet 2 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 44 32 A TC=25°C TC=100°C - 176 A TC=25°C - - 83 mJ ID=44A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 36 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition K/W - Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current1) ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case RthJC Values Min. Typ. Max. - 3.1 4.1 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Min. Typ. Max. V(BR)DSS 100 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 2.2 3.0 3.8 V VDS=VGS,ID=49µA Zero gate voltage drain current IDSS - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 7.2 8.8 8.3 11.0 mΩ VGS=10V,ID=44A VGS=6V,ID=22A Gate resistance2) RG - 1.2 1.8 Ω - Transconductance gfs 38 76 - S |VDS|>2|ID|RDS(on)max,ID=44A 1) 2) see Diagram 3 Defined by design. Not subject to production test. Final Data Sheet 3 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Unit Note/TestCondition 2730 pF VGS=0V,VDS=50V,f=1MHz 337 438 pF VGS=0V,VDS=50V,f=1MHz - 16 28 pF VGS=0V,VDS=50V,f=1MHz td(on) - 15 - ns VDD=50V,VGS=10V,ID=44A, RG,ext=1.6Ω Rise time tr - 5 - ns VDD=50V,VGS=10V,ID=44A, RG,ext=1.6Ω Turn-off delay time td(off) - 24 - ns VDD=50V,VGS=10V,ID=44A, RG,ext=1.6Ω Fall time tf - 5 - ns VDD=50V,VGS=10V,ID=44A, RG,ext=1.6Ω Unit Note/TestCondition Min. Typ. Max. Ciss - 2100 Output capacitance Coss - Reverse transfer capacitance Crss Turn-on delay time Table6Gatechargecharacteristics2) Parameter Symbol Values Min. Typ. Max. Qgs - 10 - nC VDD=50V,ID=44A,VGS=0to10V Gate to drain charge Qgd - 6 10 nC VDD=50V,ID=44A,VGS=0to10V Switching charge Qsw - 10 - nC VDD=50V,ID=44A,VGS=0to10V Gate charge total Qg - 30 37 nC VDD=50V,ID=44A,VGS=0to10V Gate plateau voltage Vplateau - 4.8 - V VDD=50V,ID=44A,VGS=0to10V Qoss - 40 53 nC VDD=50V,VGS=0V Unit Note/TestCondition Gate to source charge 1) 1) 1) Output charge Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) 2) Values Min. Typ. Max. IS - - 30 A TC=25°C IS,pulse - - 176 A TC=25°C VSD - 0.9 1.2 V VGS=0V,IF=44A,Tj=25°C trr - 55 110 ns VR=50V,IF=IS,diF/dt=100A/µs Qrr - 95 190 nC VR=50V,IF=IS,diF/dt=100A/µs Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 40 50 40 30 ID[A] Ptot[W] 30 20 20 10 10 0 0 50 100 150 0 200 0 50 100 TC[°C] 150 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 1 µs 102 0.5 10 µs 100 ZthJC[K/W] ID[A] 100 µs 1 ms 1 10 0.2 0.1 0.05 0.02 10 -1 0.01 10 ms 100 single pulse DC -1 10 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 5 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 180 20 10 V 8V 160 6V 4.5 V 140 15 5V RDS(on)[mΩ] ID[A] 120 100 80 6V 10 8V 10 V 60 5V 5 40 20 0 4.5 V 0 1 2 3 4 0 5 0 20 40 60 80 VDS[V] 100 120 140 160 180 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 180 120 160 100 140 80 100 gfs[S] ID[A] 120 80 60 60 40 40 20 20 0 175 °C 0 2 25 °C 4 6 8 0 0 VGS[V] 40 60 80 100 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 20 gfs=f(ID);Tj=25°C 6 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 18 4.0 16 3.5 14 490 µA 3.0 12 49 µA max 10 VGS(th)[V] RDS(on)[mΩ] 2.5 typ 8 2.0 1.5 6 1.0 4 0.5 2 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=44A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 175 °C 25 °C, max 175 °C, max Ciss 103 102 IF[A] C[pF] Coss 102 101 Crss 101 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 7 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 8 50 V 25 °C 100 °C 1 10 20 V 80 V VGS[V] IAS[A] 6 4 150 °C 2 100 100 101 102 103 0 0 tAV[µs] 10 20 30 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=44Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 90 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 8 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 5PackageOutlines Figure1OutlinePG-TO220-FP,dimensionsinmm/inches Final Data Sheet 9 Rev.2.1,2016-10-03 OptiMOSª5Power-Transistor,100V IPA083N10N5 RevisionHistory IPA083N10N5 Revision:2016-10-03,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-12-18 Release of final version 2.1 2016-10-03 Update Avalanche Energy TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 10 Rev.2.1,2016-10-03