IPB015N08N5ATMA1

IPB015N08N5 MOSFET OptiMOSª5Power-Transistor,80V D²-PAK7pin Features •Idealforhighfrequencyswitchingandsync.rec. •OptimizedtechnologyforDC/DCconverters •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplications •Halogen-freeaccordingtoIEC61249-2-21 tab 1 7 Drain Pin 4, tab Table1KeyPerformanceParameters Parameter Value Unit VDS 80 V RDS(on),max 1.5 mΩ ID 260 A Qoss 207 nC QG(0V..10V) 178 nC Type/OrderingCode Package IPB015N08N5 PG-TO263-7 1) Gate Pin 1 Source Pin 2,3,5,6,7 Marking 015N08N5 RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 260 199 A VGS=10V,TC=25°C1) VGS=10V,TC=100°C - 1040 A TC=25°C - - 1230 mJ ID=100A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 375 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Pulsed drain current2) 3) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.3 0.4 K/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 K/W - Thermal resistance, junction - ambient, RthJA 6 cm2 cooling area4) - - 40 K/W - Soldering temperature and reflow soldering is allowed - - 260 °C Reflow MSL1 Tsold 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Final Data Sheet 3 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.8 V VDS=VGS,ID=279µA - 0.1 10 1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 1.1 1.5 1.5 1.8 mΩ VGS=10V,ID=100A VGS=6V,ID=50A Gate resistance 1) RG - 1.5 2.3 Ω - Transconductance gfs 123 245 - S |VDS|>2|ID|RDS(on)max,ID=100A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 80 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 13000 16900 pF VGS=0V,VDS=40V,f=1MHz Output capacitance Coss - 2000 2600 pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance Crss - 86 150 pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 33 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.6Ω Rise time tr - 32 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.6Ω Turn-off delay time td(off) - 83 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.6Ω Fall time tf - 28 - ns VDD=40V,VGS=10V,ID=100A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 56 - nC VDD=40V,ID=100A,VGS=0to10V Gate to drain charge1) Qgd - 37 56 nC VDD=40V,ID=100A,VGS=0to10V Switching charge Qsw - 58 - nC VDD=40V,ID=100A,VGS=0to10V Gate charge total Qg - 178 222 nC VDD=40V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.5 - V VDD=40V,ID=100A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 153 - nC VDS=0.1V,VGS=0to10V Output charge1) Qoss - 207 276 nC VDD=40V,VGS=0V 1) 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 202 A TC=25°C - 1040 A TC=25°C - 0.86 1.2 V VGS=0V,IF=100A,Tj=25°C trr - 94 188 ns VR=40V,IF=100A,diF/dt=100A/µs Qrr - 246 492 nC VR=40V,IF=100A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 400 280 350 240 300 200 160 ID[A] Ptot[W] 250 200 120 150 80 100 40 50 0 0 50 100 150 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 4 100 10 103 1 µs 10 µs 102 100 µs 0.5 101 ZthJC[K/W] ID[A] 1 ms 10 ms DC 10-1 0.2 0.1 100 0.05 0.02 10-1 0.01 single pulse 10-2 10-1 100 101 102 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 Diagram5:Typ.outputcharacteristics 720 5 6V 7V 10 V Diagram6:Typ.drain-sourceonresistance 5.5 V 5V 4.5 V 640 4 560 5.5 V RDS(on)[mΩ] ID[A] 480 400 320 2 5V 240 6V 7V 10 V 160 1 4.5 V 80 0 3 0 1 2 3 4 0 5 0 50 100 VDS[V] 150 200 250 300 RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 300 300 250 250 200 200 gfs[S] ID[A] ID=f(VDS);Tj=25°C;parameter:VGS 150 100 400 450 150 100 150 °C 50 0 350 ID[A] 0 2 25 °C 4 50 6 8 0 0 VGS[V] 80 120 160 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 40 gfs=f(ID);Tj=25°C 7 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 4 4.0 3.5 3 2790 µA 3.0 279 µA VGS(th)[V] RDS(on)[mΩ] 2.5 2 max 2.0 1.5 typ 1 1.0 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=100A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 104 10 25 °C 25 °C. max 175 °C 175 °C. max Ciss 4 103 10 IF[A] C[pF] Coss 103 Crss 102 101 0 20 40 102 101 60 80 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 8 25 °C 102 40 V 6 VGS[V] IAV[A] 100 °C 150 °C 60 V 20 V 4 1 10 2 100 100 101 102 103 tAV[µs] 0 0 50 100 150 200 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=100Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 90 VBR(DSS)[V] 85 80 75 70 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 5PackageOutlines Figure1OutlinePG-TO263-7,dimensionsinmm/inches Final Data Sheet 10 Rev.2.2,2020-11-16 OptiMOSª5Power-Transistor,80V IPB015N08N5 RevisionHistory IPB015N08N5 Revision:2020-11-16,Rev.2.2 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-12-11 Release of final version 2.1 2015-10-15 Update package Outline 2.2 2020-11-16 Update Max Id Current Rating Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.2,2020-11-16