IPB020N10N5LF
MOSFET
OptiMOSTM5LinearFET,100V
D²PAK
Features
•Idealforhot-swapande-fuseapplications
•Verylowon-resistanceRDS(on)
•WidesafeoperatingareaSOA
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Halogen-freeaccordingtoIEC61249-2-21
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
100
V
RDS(on),max
2.0
mΩ
ID(siliconlimited)
289
A
ID(packagelimited)
120
A
Ipulse(VDS=56V,tp=10
10.2
ms)
A
Type/OrderingCode
Package
IPB020N10N5LF
PG-TO 263-3
1)
Drain
Pin 2, Tab
Gate
Pin 1
Source
Pin 3
Marking
020N10LF
RelatedLinks
-
J-STD20 and JESD22
Final Data Sheet
1
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
120
120
29
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TC=25°C,RthJA=40K/W1)
-
480
A
TC=25°C
-
-
979
mJ
ID=100A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
313
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
150
°C
IEC climatic category;
DIN IEC 68-1: 55/150/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
Pulsed drain current2)
ID,pulse
-
Avalanche energy, single pulse3)
EAS
Gate source voltage
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case
Values
Min.
Typ.
Max.
RthJC
-
0.25
0.4
K/W
-
Device on PCB,
minimal footprint
RthJA
-
-
62
K/W
-
Device on PCB,
6 cm² cooling area1)
RthJA
-
-
40
K/W
-
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
3Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3.3
4.1
V
VDS=VGS,ID=270µA
-
1
10
10
100
µA
VDS=100V,VGS=0V,Tj=25°C
VDS=100V,VGS=0V,Tj=125°C
IGSS
-
2
-2
5
-5
µA
VGS=20V,VDS=0V
VGS=-10V,VDS=0V
RDS(on)
-
1.8
2
mΩ
VGS=10V,ID=100A
Gate resistance
RG
-
44
66
Ω
-
Transconductance
gfs
31
62
-
S
|VDS|>2|ID|RDS(on)max,ID=100A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
100
-
Gate threshold voltage
VGS(th)
2.5
Zero gate voltage drain current
IDSS
Gate-source leakage current
Drain-source on-state resistance
1)
Table5Dynamiccharacteristics1)
Parameter
Symbol
Input capacitance
Values
Min.
Typ.
Max.
Ciss
-
650
840
pF
VGS=0V,VDS=50V,f=1MHz
Output capacitance
Coss
-
1900
2500
pF
VGS=0V,VDS=50V,f=1MHz
Reverse transfer capacitance
Crss
-
25
-
pF
VGS=0V,VDS=50V,f=1MHz
Turn-on delay time
td(on)
-
7
-
ns
VDD=50V,VGS=10V,ID=50A,
RG,ext=1.7Ω
Rise time
tr
-
28
-
ns
VDD=50V,VGS=10V,ID=50A,
RG,ext=1.7Ω
Turn-off delay time
td(off)
-
128
-
ns
VDD=50V,VGS=10V,ID=50A,
RG,ext=1.7Ω
Fall time
tf
-
82
-
ns
VDD=50V,VGS=10V,ID=50A,
RG,ext=1.7Ω
Unit
Note/TestCondition
Table6Gatechargecharacteristics2)
Parameter
Symbol
Values
Min.
Typ.
Max.
Qgs
-
4.4
-
nC
VDD=50V,ID=180A,VGS=0to10V
Qgd
-
141
-
nC
VDD=50V,ID=180A,VGS=0to10V
Gate charge total
Qg
-
195
-
nC
VDD=50V,ID=180A,VGS=0to10V
Gate plateau voltage
Vplateau
-
7.1
-
V
VDD=50V,ID=180A,VGS=0to10V
Qoss
-
209
-
nC
VDD=50V,VGS=0V
Gate to source charge
1)
Gate to drain charge
1)
1)
Output charge
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
120
A
TC=25°C
-
480
A
TC=25°C
-
0.89
1.2
V
VGS=0V,IF=100A,Tj=25°C
trr
-
62
-
ns
VR=50V,IF=50A,diF/dt=100A/µs
Qrr
-
113
-
nC
VR=50V,IF=50A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
350
350
300
300
250
250
200
200
ID[A]
Ptot[W]
limited by package
limited by silicon
150
150
100
100
50
50
0
0
25
50
75
100
125
150
0
175
0
20
40
60
TC[°C]
80
100
120
140
160
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
100
10
1 µs
10 µs
10 ms
100 µs
0.5
102
10-1
0.2
ZthJC[K/W]
1 ms
ID[A]
DC
1
10
0.1
0.05
0.02
10
-2
0.01
single pulse
100
10-1
100
101
102
103
10-3
10-6
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
120
2.0
8V
10 V
100
10 V
1.5
60
RDS(on)[mΩ]
ID[A]
80
8V
6V
1.0
40
5.5 V
20
0.5
5V
4.5 V
0
0
1
2
3
4
0.0
5
0
20
40
VDS[V]
60
80
100
120
100
120
ID[A]
ID=f(VDS);Tj=25°C,tp=30µs;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
120
80
70
100
60
80
gfs[S]
ID[A]
50
60
40
30
40
20
20
150 °C
10
25 °C
0
0
1
2
3
4
5
6
7
0
0
20
VGS[V]
60
80
ID[A]
ID=f(VGS);VDS=10V;parameter:Tj
Final Data Sheet
40
gfs=f(ID);Tj=25°C
7
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
Diagram9:Normalizeddrain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
2.0
4
2700 µA
1.6
270 µA
1.2
VGS(th)[V]
RDS(on),normalizedto25°C
3
0.8
2
1
0.4
0.0
-80
-40
0
40
80
120
0
-60
160
-20
20
60
Tj[°C]
100
140
180
Tj[°C]
RDS(on)=f(Tj),ID=100A,VGS=10V
VGS(th)=f(Tj);VGS=VDS
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
4
103
10
25 °C
25 °C, max
150 °C
150 °C, max
Coss
103
102
IF[A]
C[pF]
Ciss
102
101
Crss
101
0
20
40
60
80
100
100
0.0
0.5
VDS[V]
1.5
2.0
2.5
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
IF=f(VSD);parameter:Tj
8
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
3
10
12
10
102
25 °C
VGS[V]
IAV[A]
100 °C
125 °C
101
80 V
20 V
8
50 V
6
4
2
100
100
101
102
103
0
0
50
tAV[µs]
100
150
200
250
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=100Apulsed,resistiveload;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Gate charge waveforms
110
VBR(DSS)[V]
105
100
95
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
5PackageOutlines
Figure1OutlinePG-TO263-3,dimensionsinmm/inches
Final Data Sheet
10
Rev.2.1,2017-02-16
OptiMOSTM5LinearFET,100V
IPB020N10N5LF
RevisionHistory
IPB020N10N5LF
Revision:2017-02-16,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2016-12-15
Release of final version
2.1
2017-02-16
Update technology heading
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Final Data Sheet
11
Rev.2.1,2017-02-16