IPB032N10N5ATMA1

IPB032N10N5 MOSFET OptiMOSª5Power-Transistor,100V D²-PAK7pin Features •Idealforhighfrequencyswitchingandsync.rec. •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplications •Halogen-freeaccordingtoIEC61249-2-21 tab 1 7 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 3.2 mΩ ID 166 A Qoss 98 nC QG(0V..10V) 76 nC Type/OrderingCode Package IPB032N10N5 PG-TO263-7 1) Drain Pin 4, tab Gate Pin 1 Source Pin 2,3,5,6,7 Marking 032N10N5 RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 166 118 A TC=25°C TC=100°C - 664 A TC=25°C - - 233 mJ ID=100A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 187 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current1) ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.5 0.8 K/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 K/W - Thermal resistance, junction - ambient, RthJA 6 cm2 cooling area2) - - 40 K/W - Soldering temperature and reflow soldering is allowed - - 260 °C reflow MSL1 Tsold 1) see Diagram 3 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) Final Data Sheet 3 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3.0 3.8 V VDS=VGS,ID=125µA - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 2.8 3.4 3.2 4.2 mΩ VGS=10V,ID=83A VGS=6V,ID=42A Gate resistance1) RG - 1.3 2 Ω - Transconductance gfs 84 168 - S |VDS|>2|ID|RDS(on)max,ID=83A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 5360 6970 pF VGS=0V,VDS=50V,f=1MHz Output capacitance Coss - 829 1078 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 37 65 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 16.2 - ns VDD=50V,VGS=10V,ID=83A, RG,ext=1.6Ω Rise time tr - 9.7 - ns VDD=50V,VGS=10V,ID=83A, RG,ext=1.6Ω Turn-off delay time td(off) - 35 - ns VDD=50V,VGS=10V,ID=83A, RG,ext=1.6Ω Fall time tf - 9.8 - ns VDD=50V,VGS=10V,ID=83A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Values Min. Typ. Max. Qgs - 25 - nC VDD=50V,ID=83A,VGS=0to10V Gate to drain charge Qgd - 16 23 nC VDD=50V,ID=83A,VGS=0to10V Switching charge Qsw - 25 - nC VDD=50V,ID=83A,VGS=0to10V Gate charge total Qg - 76 95 nC VDD=50V,ID=83A,VGS=0to10V Gate plateau voltage Vplateau - 4.7 - V VDD=50V,ID=83A,VGS=0to10V Output charge1) Qoss - 98 130 nC VDD=50V,VGS=0V Gate to source charge 1) 1) 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 156 A TC=25°C - 624 A TC=25°C - 0.9 1.2 V VGS=0V,IF=83A,Tj=25°C trr - 62 124 ns VR=50V,IF=83,diF/dt=100A/µs Qrr - 103 206 nC VR=50V,IF=83,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 200 200 180 160 160 140 120 ID[A] Ptot[W] 120 80 100 80 60 40 40 20 0 0 25 50 75 100 125 150 175 0 200 0 50 100 TC[°C] 150 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 100 10 1 µs 10 µs 0.5 100 µs 102 ZthJC[K/W] ID[A] 0.2 1 ms 101 10 ms 0.1 10-1 0.05 0.02 100 10-1 10-1 0.01 DC single pulse 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 700 6 10 V 8V 600 5 5V 500 5.5 V 6V 6V ID[A] RDS(on)[mΩ] 400 300 5.5 V 4 8V 3 10 V 200 5V 2 100 4.5 V 0 0 1 2 3 4 1 5 0 100 200 VDS[V] 300 400 500 600 700 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 500 240 450 200 400 350 160 gfs[S] ID[A] 300 250 120 200 80 150 100 40 175 °C 25 °C 50 0 0 2 4 6 8 0 0 VGS[V] 80 120 160 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 40 gfs=f(ID);Tj=25°C 7 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 7 4.0 3.5 6 1250 µA 3.0 5 125 µA 2.5 max 3 VGS(th)[V] RDS(on)[mΩ] 4 typ 2.0 1.5 2 1.0 1 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=83A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 103 10 25 °C 175 °C 25 °C, max 175 °C, max 104 Ciss Coss IF[A] C[pF] 102 3 10 101 102 101 Crss 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 50 V 8 102 80 V 6 20 V VGS[V] IAS[A] 25 °C 100 °C 4 150 °C 1 10 2 100 100 101 102 103 0 0 10 tAV[µs] 20 30 40 50 60 70 80 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate),ID=83Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 5PackageOutlines Figure1OutlinePG-TO263-7,dimensionsinmm/inches Final Data Sheet 10 Rev.2.0,2016-12-12 OptiMOSª5Power-Transistor,100V IPB032N10N5 RevisionHistory IPB032N10N5 Revision:2016-12-12,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2016-12-12 Release of final version TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe productofInfineonTechnologiesincustomer’sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.0,2016-12-12