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IPB083N15N5LFATMA1

IPB083N15N5LFATMA1

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TO263-3

  • 描述:

    MOSFET N-CH 150V 105A D2PAK

  • 数据手册
  • 价格&库存
IPB083N15N5LFATMA1 数据手册
IPB083N15N5LF MOSFET OptiMOSTM5LinearFET,150V D²PAK Features •Idealforhot-swapande-fuseapplications •Verylowon-resistanceRDS(on) •WidesafeoperatingareaSOA •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplications •Halogen-freeaccordingtoIEC61249-2-21 Table1KeyPerformanceParameters Parameter Value Unit VDS 150 V RDS(on),max 8.3 mΩ ID 105 A Ipulse(VDS=56V,tp=10 5.6 ms) A Type/OrderingCode Package IPB083N15N5LF PG-TO 263-3 1) Drain Pin 2, Tab Gate Pin 1 Source Pin 3 Marking 083N15LF RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF 1Maximumratings atTC=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 105 66 14 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TC=25°C,RthJA=40K/W1) - 420 A TC=25°C - - 10 mJ ID=25A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 179 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 150 °C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse3) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.45 0.7 K/W - Device on PCB, minimal footprint RthJA - - 62 K/W - Device on PCB, 6 cm² cooling area1) RthJA - - 40 K/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 4.1 4.9 V VDS=VGS,ID=134µA - 1 10 2 100 µA VDS=120V,VGS=0V,Tj=25°C VDS=120V,VGS=0V,Tj=125°C IGSS - 2 -2 5 -5 µA VGS=20V,VDS=0V VGS=-10V,VDS=0V RDS(on) - 6.9 8.3 mΩ VGS=10V,ID=100A Gate resistance RG - 28 42 Ω - Transconductance gfs 9 18 - S |VDS|>2|ID|RDS(on)max,ID=52A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 150 - Gate threshold voltage VGS(th) 3.3 Zero gate voltage drain current IDSS Gate-source leakage current Drain-source on-state resistance 1) Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 160 210 pF VGS=0V,VDS=75V,f=1MHz Output capacitance Coss - 740 960 pF VGS=0V,VDS=75V,f=1MHz Reverse transfer capacitance Crss - 11 - pF VGS=0V,VDS=75V,f=1MHz Turn-on delay time td(on) - 7 - ns VDD=75V,VGS=10V,ID=52A, RG,ext=1.6Ω Rise time tr - 46 - ns VDD=75V,VGS=10V,ID=52A, RG,ext=1.6Ω Turn-off delay time td(off) - 25 - ns VDD=75V,VGS=10V,ID=52A, RG,ext=1.6Ω Fall time tf - 6 - ns VDD=75V,VGS=10V,ID=52A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Values Min. Typ. Max. Qgs - 1.2 - nC VDD=75V,ID=52A,VGS=0to10V Qgd - 31 - nC VDD=75V,ID=52A,VGS=0to10V Gate charge total Qg - 45 - nC VDD=75V,ID=52A,VGS=0to10V Gate plateau voltage Vplateau - 6.6 - V VDD=75V,ID=52A,VGS=0to10V Qoss - 111 148 nC VDD=75V,VGS=0V Gate to source charge 1) Gate to drain charge 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 105 A TC=25°C - 420 A TC=25°C - 0.99 1.2 V VGS=0V,IF=100A,Tj=25°C trr - 61 - ns VR=75V,IF=52A,diF/dt=100A/µs Qrr - 92 - nC VR=75V,IF=52A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 200 120 175 100 150 80 ID[A] Ptot[W] 125 100 60 75 40 50 20 25 0 0 20 40 60 80 100 120 140 0 160 0 20 40 60 TC[°C] 80 100 120 140 160 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 100 10 1 µs 10 µs 0.5 100 µs 102 10 ms 1 ms ZthJC[K/W] ID[A] DC 0.2 10-1 0.1 101 0.05 0.02 0.01 single pulse 0 10 100 101 102 103 10 -2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 30 10 25 8 10V 8V 10 V RDS(on)[mΩ] ID[A] 20 15 6 4 7V 10 2 5 6V 5.5V 0 5V 0 1 2 3 4 0 5 0 5 10 15 VDS[V] 20 25 30 35 40 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 20 14 12 15 10 gfs[S] ID[A] 8 10 6 4 5 150 °C 2 25 °C 0 0 1 2 3 4 5 6 7 8 0 0 5 VGS[V] 15 20 25 ID[A] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 10 gfs=f(ID),VDS=5V,Tj=25°C 7 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF Diagram9:Normalizeddrain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 2.00 5 1.75 4 1340 µA 134 µA 1.25 3 VGS(th)[V] RDS(on),normalizedto25°C 1.50 1.00 0.75 2 0.50 1 0.25 0.00 -80 -40 0 40 80 120 0 -80 160 -40 0 Tj[°C] 40 80 120 160 Tj[°C] RDS(on)=f(Tj),ID=52A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 150 °C 150 °C, max Coss 102 IF[A] C[pF] 103 Ciss 2 101 10 Crss 101 0 25 50 75 100 125 150 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 12 10 75V 30V 101 120V VGS[V] IAV[A] 8 100 °C 25 °C 100 6 4 2 125 °C 10-1 100 101 102 103 0 0 10 tAV[µs] 20 30 40 50 60 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate);ID=52Apulsed,resistiveload;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 160 158 156 VBR(DSS)[V] 154 152 150 148 146 144 -80 -40 0 40 80 120 160 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF 5PackageOutlines Figure1OutlinePG-TO263-3,dimensionsinmm/inches Final Data Sheet 10 Rev.2.0,2017-04-04 OptiMOSTM5LinearFET,150V IPB083N15N5LF RevisionHistory IPB083N15N5LF Revision:2017-04-04,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2017-04-04 Release of final version TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2017InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe productofInfineonTechnologiesincustomer’sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.0,2017-04-04
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