IPB14N03LA
IPI14N03LA, IPP14N03LA
OptiMOS®2 Power-Transistor
Product Summary
Features
• Ideal for high-frequency dc/dc converters
• N-channel
V DS
25
V
R DS(on),max (SMD version)
13.6
mΩ
ID
30
A
• Logic level
• Excellent gate charge x R DS(on) product (FOM)
• Very low on-resistance R DS(on)
• Superior thermal resistance
P-TO263-3-2
P-TO262-3-1
P-TO220-3-1
• 175 °C operating temperature
• dv /dt rated
Type
Package
Ordering Code
Marking
IPB14N03LA
P-TO263-3-2
Q67042-S4156
14N03LA
IPI14N03LA
P-TO262-3-1
Q67042-S4157
14N03LA
IPP14N03LA
P-TO220-3-1
Q67042-S4158
14N03LA
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
T C=25 °C1)
30
T C=100 °C
30
Unit
A
Pulsed drain current
I D,pulse
T C=25 °C2)
210
Avalanche energy, single pulse
E AS
I D=24 A, R GS=25 Ω
60
mJ
Reverse diode dv /dt
dv /dt
I D=30 A, V DS=20 V,
di /dt =200 A/µs,
T j,max=175 °C
6
kV/µs
Gate source voltage3)
V GS
Power dissipation
P tot
Operating and storage temperature
T j, T stg
T C=25 °C
IEC climatic category; DIN IEC 68-1
Rev. 1.3
±20
V
46
W
-55 ... 175
°C
55/175/56
page 1
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
Parameter
Values
Symbol Conditions
Unit
min.
typ.
max.
-
-
3.2
minimal footprint
-
-
62
6 cm2 cooling area4)
-
-
40
Thermal characteristics
Thermal resistance, junction - case
R thJC
SMD version, device on PCB
R thJA
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
25
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=20 µA
1.2
1.6
2
Zero gate voltage drain current
I DSS
V DS=25 V, V GS=0 V,
T j=25 °C
-
0.1
1
V DS=25 V, V GS=0 V,
T j=125 °C
-
10
100
V
µA
Gate-source leakage current
I GSS
V GS=20 V, V DS=0 V
-
10
100
nA
Drain-source on-state resistance
R DS(on)
V GS=4.5 V, I D=20 A
-
18.5
23.1
mΩ
V GS=4.5 V, I D=20 A,
SMD version
-
18.2
22.7
V GS=10 V, I D=30 A
-
11.6
13.9
V GS=10 V, I D=30 A,
SMD version
-
11.3
13.6
-
0.9
-
Ω
17
33
-
S
Gate resistance
RG
Transconductance
g fs
|V DS|>2|I D|R DS(on)max,
I D=30 A
1)
Current is limited by bondwire; with an R thJC=3.2 K/W the chip is able to carry 45 A.
2)
See figure 3
3)
T j,max=150 °C and duty cycle D
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