IPD068N10N3 G
OptiMOS®3 Power-Transistor
Product Summary
Features
• N-channel, normal level
• Excellent gate charge x R DS(on) product (FOM)
VDS
100
V
RDS(on),max
6.8
mW
ID
90
A
• Very low on-resistance R DS(on)
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
• Qualified according to JEDEC1) for target application
• Ideal for high-frequency switching and synchronous rectification
• Halogen-free according to IEC61249-2-21
Type
IPD068N10N3 G
Package
PG-TO252-3
Marking
068N10N
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
T C=25 °C2)
90
T C=100 °C
72
Unit
A
Pulsed drain current2)
I D,pulse
T C=25 °C
360
Avalanche energy, single pulse
E AS
I D=90 A, R GS=25 W
130
mJ
Gate source voltage
V GS
±20
V
Power dissipation
P tot
150
W
Operating and storage temperature
T j, T stg
-55 ... 175
°C
T C=25 °C
IEC climatic category; DIN IEC 68-1
1)
2)
55/175/56
J-STD20 and JESD22
See figure 3
Rev. 2.2
page 1
2014-05-19
IPD068N10N3 G
Parameter
Values
Symbol Conditions
Unit
min.
typ.
max.
-
-
1
minimal footprint
-
-
62
6 cm2 cooling area3)
-
-
40
100
-
-
Thermal characteristics
Thermal resistance, junction - case
R thJC
Thermal resistance,
R thJA
junction - ambient
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
Gate threshold voltage
V GS(th)
V DS=V GS, I D=90 µA
2
2.7
3.5
Zero gate voltage drain current
I DSS
V DS=100 V, V GS=0 V,
T j=25 °C
-
0.1
1
V DS=100 V, V GS=0 V,
T j=125 °C
-
10
100
V
µA
Gate-source leakage current
I GSS
V GS=20 V, V DS=0 V
-
1
100
nA
Drain-source on-state resistance
R DS(on)
V GS=10 V, I D=90 A
-
5.7
6.8
mW
V GS=6 V, I D=45 A
-
7.1
12.3
-
1.6
-
W
54
107
-
S
Gate resistance
RG
Transconductance
g fs
|V DS|>2|I D|R DS(on)max,
I D=90 A
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 2.2
page 2
2014-05-19
IPD068N10N3 G
Parameter
Values
Symbol Conditions
Unit
min.
typ.
max.
-
3690
4910
-
646
-
Dynamic characteristics
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
C rss
-
25
-
Turn-on delay time
t d(on)
-
19
-
Rise time
tr
-
37
-
Turn-off delay time
t d(off)
-
37
-
Fall time
tf
-
9
-
Gate to source charge
Q gs
-
18
-
Gate to drain charge
Q gd
-
10
-
Switching charge
Q sw
-
17
-
Gate charge total
Qg
-
51
68
Gate plateau voltage
V plateau
-
4.9
-
Output charge
Q oss
-
68
91
nC
-
-
90
A
-
-
360
-
1
1.2
V
-
73
-
ns
-
139
-
nC
V GS=0 V, V DS=50 V,
f =1 MHz
V DD=50 V, V GS=10 V,
I D=80 A, R G,ext=3.6 W
pF
ns
Gate Charge Characteristics6)
V DD=50 V, I D=90 A,
V GS=0 to 10 V
V DD=50 V, V GS=0 V
nC
V
Reverse Diode
Diode continous forward current
IS
Diode pulse current
I S,pulse
Diode forward voltage
V SD
Reverse recovery time
t rr
Reverse recovery charge
Q rr
6)
T C=25 °C
V GS=0 V, I F=90 A,
T j=25 °C
V R=15 V, I F=80 A ,
di F/dt =100 A/µs
See figure 16 for gate charge parameter definition
Rev. 2.2
page 3
2014-05-19
IPD068N10N3 G
1 Power dissipation
2 Drain current
P tot=f(T C)
I D=f(T C); V GS≥10 V
175
100
150
80
60
100
ID [A]
Ptot [W]
125
75
40
50
20
25
0
0
0
50
100
150
200
0
50
TC [°C]
100
150
200
TC [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D=f(V DS); T C=25 °C; D =0
Z thJC=f(t p)
parameter: t p
parameter: D =t p/T
103
101
limited by on-state
resistance
1 µs
10 µs
102
100
0.5
ZthJC [K/W]
ID [A]
100 µs
1 ms
101
0.2
0.1
10-1
0.05
10 ms
0.02
0.01
DC
single pulse
100
10-2
10-1
100
101
102
103
VDS [V]
Rev. 2.2
10-5
10-4
10-3
10-2
10-1
100
tp [s]
page 4
2014-05-19
IPD068N10N3 G
5 Typ. output characteristics
6 Typ. drain-source on resistance
I D=f(V DS); T j=25 °C
R DS(on)=f(I D); T j=25 °C
parameter: V GS
parameter: V GS
400
18
10 V
15
320
4.5 V
7.5 V
5V
RDS(on) [mW]
12
240
ID [A]
6V
160
9
6V
7.5 V
5.5 V
6
10 V
5V
80
3
4.5 V
0
0
0
0
1
2
3
4
5
0
50
VDS [V]
100
150
ID [A]
7 Typ. transfer characteristics
8 Typ. forward transconductance
I D=f(V GS); |V DS|>2|I D|R DS(on)max
g fs=f(I D); T j=25 °C
parameter: T j
150
160
120
ID [A]
gfs [S]
100
80
50
25 °C
40
175 °C
0
0
0
2
4
6
8
VGS [V]
Rev. 2.2
0
50
100
150
ID [A]
page 5
2014-05-19
IPD068N10N3 G
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R DS(on)=f(T j); I D=90 A; V GS=10 V
V GS(th)=f(T j); V GS=V DS
parameter: I D
16
4
14
3.5
12
3
10
2.5
VGS(th) [V]
RDS(on) [mW]
900 µA
98 %
8
typ
90 µA
2
6
1.5
4
1
2
0.5
0
0
-60
-20
20
60
100
140
180
-60
-20
20
Tj [°C]
60
100
140
180
Tj [°C]
11 Typ. capacitances
12 Forward characteristics of reverse diode
C =f(V DS); V GS=0 V; f =1 MHz
I F=f(V SD)
parameter: T j
104
103
Ciss
175 °C, 98%
Coss
103
25 °C
102
IF [A]
C [pF]
175 °C
102
25 °C, 98%
101
Crss
101
100
0
20
40
60
80
VDS [V]
Rev. 2.2
0
0.5
1
1.5
2
VSD [V]
page 6
2014-05-19
IPD068N10N3 G
13 Avalanche characteristics
14 Typ. gate charge
I AS=f(t AV); R GS=25 W
V GS=f(Q gate); I D=90 A pulsed
parameter: T j(start)
parameter: V DD
100
10
25 °C
8
80 V
100 °C
50 V
6
20 V
VGS [V]
IAS [A]
150 °C
10
4
2
0
1
0.1
1
10
100
0
1000
20
40
60
Qgate [nC]
tAV [µs]
15 Drain-source breakdown voltage
16 Gate charge waveforms
V BR(DSS)=f(T j); I D=1 mA
110
V GS
Qg
VBR(DSS) [V]
105
100
V gs(th)
95
Q g(th)
Q sw
Q gs
90
-60
-20
20
60
100
140
Q gate
Q gd
180
Tj [°C]
Rev. 2.2
page 7
2014-05-19
IPD068N10N3 G
PG-TO-252 (D-Pak)
Rev. 2.2
page 8
2014-05-19
IPD068N10N3 G
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
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conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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contact the nearest Infineon Technologies Office (www.infineon.com).
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on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with
the express written approval of Infineon Technologies, if a failure of such components can
reasonably be expected to cause the failure of that life-support device or system or to affect
the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user
or other persons may be endangered.
Rev. 2.2
page 9
2014-05-19