IPD135N08N3GBTMA1

IPD135N08N3 G OptiMOS(TM)3 Power-Transistor Product Summary Features VDS • Ideal for high frequency switching 80 RDS(on),max • Optimized technology for DC/DC converters V 13.5 ID mW 45 A • Excellent gate charge x R DS(on) product (FOM) • N-channel, normal level • 100% avalanche tested • Pb-free plating; RoHS compliant • Qualified according to JEDEC1) for target applications • Halogen-free according to IEC61249-2-21 Type IPD135N08N3 G Package PG-TO-252-3 Marking 135N08N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C2) 45 T C=100 °C 39 Unit A Pulsed drain current2) I D,pulse T C=25 °C 180 Avalanche energy, single pulse3) E AS I D=45 A, R GS=25 W 50 mJ Gate source voltage V GS ±20 V Power dissipation P tot 79 W Operating and storage temperature T j, T stg -55 ... 175 °C T C=25 °C IEC climatic category; DIN IEC 68-1 55/175/56 1) J-STD20 and JESD22 See figure 3 for more detailed information 3) See figure 13 for more detailed information 2) Rev. 2.2 page 1 2014-05-19 IPD135N08N3 G Parameter Values Symbol Conditions Unit min. typ. max. - - 1.9 minimal footprint - - 62 6 cm2 cooling area4) - - 40 Thermal characteristics Thermal resistance, junction - case R thJC Thermal resistance, R thJA junction - ambient K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 80 - - Gate threshold voltage V GS(th) V DS=V GS, I D=33 µA 2 2.8 3.5 Zero gate voltage drain current I DSS V DS=80 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=80 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=45 A - 11.4 13.5 mW V GS=6 V, I D=22.5 A - 16.0 26 - 2 - W 24 48 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=45 A 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 2.2 page 2 2014-05-19 IPD135N08N3 G Parameter Values Symbol Conditions Unit min. typ. max. - 1300 1730 - 353 469 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance C rss - 15 - Turn-on delay time t d(on) - 12 - Rise time tr - 35 - Turn-off delay time t d(off) - 18 - Fall time tf - 5 - Gate to source charge Q gs - 7 - Gate to drain charge Q gd - 4 - Switching charge Q sw - 8 - Gate charge total Qg - 19 25 Gate plateau voltage V plateau - 5.5 - Output charge Q oss - 25 34 nC - - 45 A - - 180 - 1.0 1.2 V - 50 - ns - 74 - nC V GS=0 V, V DS=40 V, f =1 MHz V DD=40 V, V GS=10 V, I D=45 A, R G,ext=1.6 W pF ns Gate Charge Characteristics5) V DD=40 V, I D=45 A, V GS=0 to 10 V V DD=40 V, V GS=0 V nC V Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr 5) T C=25 °C V GS=0 V, I F=45 A, T j=25 °C V R=40 V, I F=I S, di F/dt =100 A/µs See figure 16 for gate charge parameter definition Rev. 2.2 page 3 2014-05-19 IPD135N08N3 G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 80 50 40 60 ID [A] Ptot [W] 30 40 20 20 10 0 0 0 50 100 150 200 0 50 TC [°C] 100 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 103 101 limited by on-state resistance 1 µs 102 100 ZthJC [K/W] ID [A] 10 µs 100 µs 101 0.5 0.2 0.1 0.05 0.02 10-1 0.01 single pulse 1 ms 10 ms DC 100 10-2 10-1 100 101 102 VDS [V] Rev. 2.2 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2014-05-19 IPD135N08N3 G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 150 30 10 V 8V 7V 5V 100 6.5 V 6V 20 RDS(on) [mW] 6.5 V ID [A] 5.5 V 6V 50 7V 8V 10 V 10 5.5 V 5V 4.5 V 0 0 0 1 2 3 4 5 0 40 80 VDS [V] 120 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 120 80 60 ID [A] gfs [S] 80 40 40 20 175 °C 25 °C 0 0 0 2 4 6 8 VGS [V] Rev. 2.2 0 20 40 60 80 100 ID [A] page 5 2014-05-19 IPD135N08N3 G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=45 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 30 4 25 3 330 µA 33 µA VGS(th) [V] RDS(on) [mW] 20 max 15 typ 2 10 1 5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 Tj [°C] 100 140 180 Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 Ciss 103 Coss 102 25 °C 175 °C, 98% IF [A] C [pF] 175 °C 102 Crss 25 °C, 98% 101 101 100 100 0 20 40 60 80 VDS [V] Rev. 2.2 0 0.5 1 1.5 2 2.5 VSD [V] page 6 2014-05-19 IPD135N08N3 G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=45 A pulsed parameter: T j(start) parameter: V DD 100 12 40 V 10 16 V 8 VGS [V] IAV [A] 25 °C 100 °C 10 150 °C 64 V 6 4 2 1 0 0.1 1 10 100 1000 0 5 tAV [µs] 10 15 20 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 90 V GS Qg 85 VBR(DSS) [V] 80 75 V gs(th) 70 65 Q g(th) Q sw Q gs 60 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [°C] Rev. 2.2 page 7 2014-05-19 IPD135N08N3 G PG-TO-252-3 Rev. 2.2 page 8 2014-05-19 IPD135N08N3 G Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.2 page 9 2014-05-19