IPD50N04S4L-08
OptiMOS®-T2 Power-Transistor
Product Summary
VDS
40
V
RDS(on),max
7.3
mW
ID
50
A
Features
• N-channel - Enhancement mode
PG-TO252-3-313
• AEC qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
Drain
pin 2/Tab
Type
Package
Marking
IPD50N04S4L-08
PG-TO252-3-313
4N04L08
Gate
pin 1
Source
pin 3
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current1)
ID
Conditions
Value
T C=25°C, V GS=10V
50
T C=100°C, V GS=10V2)
49
Unit
A
Pulsed drain current2)
I D,pulse
T C=25°C
200
Avalanche energy, single pulse2)
E AS
I D=25A
55
mJ
Avalanche current, single pulse
I AS
-
50
A
Gate source voltage
V GS
-
+20/-16
V
Power dissipation
P tot
T C=25°C
46
W
Operating and storage temperature
T j, T stg
-
-55 ... +175
°C
IEC climatic category; DIN IEC 68-1
-
-
55/175/56
Rev. 1.01
page 1
2021-12-07
IPD50N04S4L-08
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics2)
Thermal resistance, junction - case
R thJC
-
-
-
3.3
Thermal resistance, junction ambient, leaded
R thJA
-
-
-
62
SMD version, device on PCB
R thJA
minimal footprint
-
-
62
6 cm2 cooling area3)
-
-
40
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0V, I D= 1mA
40
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=17µA
1.2
1.7
2.2
Zero gate voltage drain current
I DSS
V DS=40V, V GS=0V,
T j=25°C
-
0.01
1
T j=85°C2)
-
1
20
V DS=18V, V GS=0V,
V
µA
Gate-source leakage current
I GSS
V GS=20V, V DS=0V
-
-
100
nA
Drain-source on-state resistance
R DS(on)
V GS=4.5V, I D=25A
-
8.8
10.5
mW
V GS=10 V, I D=50 A
-
6.2
7.3
Rev. 1.01
page 2
2021-12-07
IPD50N04S4L-08
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
1800
2340
-
350
455
Dynamic characteristics2)
Input capacitance
C iss
V GS=0 V, V DS=25 V,
f =1 MHz
pF
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
15
35
Turn-on delay time
t d(on)
-
4
-
Rise time
tr
-
8
-
Turn-off delay time
t d(off)
-
11
-
Fall time
tf
-
18
-
Gate to source charge
Q gs
-
5.8
7.5
Gate to drain charge
Q gd
-
2.6
6.0
Gate charge total
Qg
-
23
30
Gate plateau voltage
V plateau
-
3.2
-
V
-
-
50
A
-
-
200
V DD=20V, V GS=10V,
I D=50A, R G=3.5W
ns
Gate Charge Characteristics2)
V DD=32V, I D=50A,
V GS=0 to 10V
nC
Reverse Diode
Diode continous forward current2)
IS
Diode pulse current2)
I S,pulse
Diode forward voltage
V SD
V GS=0V, I F=50A,
T j=25°C
-
0.9
1.3
V
Reverse recovery time2)
t rr
V R=20V, I F=50A,
di F/dt =100A/µs
-
34
-
ns
Reverse recovery charge2)
Q rr
-
27
-
nC
T C=25°C
1)
Current is limited by bondwire; with an R thJC = 3.3K/W the chip is able to carry 56A at 25°C. For detailed information
see Application Note ANPS071E
2)
Defined by design. Not subject to production test.
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.01
page 3
2021-12-07
IPD50N04S4L-08
1 Power dissipation
2 Drain current
P tot = f(T C); V GS ≥ 6 V
I D = f(T C); V GS ≥ 6 V
50
60
50
40
40
ID [A]
Ptot [W]
30
30
20
20
10
10
0
0
0
50
100
150
200
0
50
100
TC [°C]
150
200
TC [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D = f(V DS); T C = 25 °C; D = 0
Z thJC = f(t p)
parameter: t p
parameter: D =t p/T
1000
101
0.5
1 µs
100
100
0.1
ZthJC [K/W]
ID [A]
10 µs
100 µs
0.05
10-1
0.01
single pulse
10
10-2
1 ms
10-3
1
0.1
1
10
100
10-5
10-4
10-3
10-2
10-1
100
tp [s]
VDS [V]
Rev. 1.01
10-6
page 4
2021-12-07
IPD50N04S4L-08
5 Typ. output characteristics
6 Typ. drain-source on-state resistance
I D = f(V DS); T j = 25 °C
R DS(on) = f(I D); T j = 25 °C
parameter: V GS
parameter: V GS
200
180
46
160
41
3V
3.5 V
4V
36
140
10 V
5V
31
100
RDS(on) [mW]
ID [A]
120
4.5 V
80
26
21
4V
60
16
4.5 V
3.5 V
40
11
5V
20
6
3V
10 V
0
0
1
2
3
1
4
0
20
40
VDS [V]
60
80
ID [A]
7 Typ. transfer characteristics
8 Typ. drain-source on-state resistance
I D = f(V GS); V DS = 6V
R DS(on) = f(T j); I D = 50 A; V GS = 10 V
parameter: T j
120
12
-55 °C
25 °C
175 °C
10
ID [A]
RDS(on) [mW]
80
8
40
6
0
1
2
3
4
5
VGS [V]
Rev. 1.01
4
-60
-20
20
60
100
140
180
Tj [°C]
page 5
2021-12-07
IPD50N04S4L-08
9 Typ. gate threshold voltage
10 Typ. capacitances
V GS(th) = f(T j); V GS = V DS
C = f(V DS); V GS = 0 V; f = 1 MHz
parameter: I D
2.5
104
2.25
Ciss
85 µA
1.75
VGS(th) [V]
C [pF]
2
103
Coss
17 µA
1.5
1.25
102
1
0.75
Crss
101
0.5
-60
-20
20
60
100
140
0
180
5
10
15
20
25
30
VDS [V]
Tj [°C]
11 Typical forward diode characteristicis
12 Avalanche characteristics
IF = f(VSD)
I A S= f(t AV)
parameter: T j
parameter: Tj(start)
100
103
25 °C
100 °C
10
102
150 °C
175 °C
IAV [A]
IF [A]
25 °C
175 °C
25 °C
101
1
100
0
0.2
0.4
0.6
0.8
1
1.2
1.4
VSD [V]
Rev. 1.01
0.1
1
10
100
1000
tAV [µs]
page 6
2021-12-07
IPD50N04S4L-08
13 Avalanche energy
14 Drain-source breakdown voltage
E AS = f(T j)
V BR(DSS) = f(T j); I D = 1 mA
parameter: I D
46
120
100
12 A
44
60
VBR(DSS) [V]
EAS [mJ]
80
25 A
42
40
40
50 A
38
20
36
0
25
75
125
-55
175
-15
Tj [°C]
25
65
105
145
Tj [°C]
15 Typ. gate charge
16 Gate charge waveforms
V GS = f(Q gate); I D = 50 A pulsed
parameter: V DD
10
V GS
9
Qg
8
7
32 V
8V
VGS [V]
6
5
V gs(th)
4
3
2
Q g(th)
Q sw
Q gate
1
Q gs
0
0
5
10
15
20
Q gd
25
Qgate [nC]
Rev. 1.01
page 7
2021-12-07
IPD50N04S4L-08
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2021
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.01
page 8
2021-12-07
IPD50N04S4L-08
Revision History
Version
Date
Changes
Revision 1.0
06.04.2010 Final Data Sheet
Revision 1.01
07.12.2021 Editorial change
Rev. 1.01
page 9
2021-12-07