IPD50N08S413ATMA1

IPD50N08S4-13 OptiMOS™-T2 Power-Transistor Product Summary VDS 80 RDS(on),max V 13.2 ID mW 50 A Features PG-TO252-3-313 • N-channel - Enhancement mode • AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green Product (RoHS compliant) • 100% Avalanche tested Type Package Marking IPD50N08S4-13 PG-TO252-3-313 4N0813 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current1) ID Conditions Value T C=25°C, V GS=10V 50 T C=100°C, V GS=10V2) 50 Unit A Pulsed drain current2) I D,pulse T C=25°C 200 Avalanche energy, single pulse2) E AS I D=25A 76 mJ Avalanche current, single pulse I AS - 31 A Gate source voltage V GS - ±20 V Power dissipation P tot T C=25°C 72 W Operating and storage temperature T j, T stg - -55 ... +175 °C Rev. 1.0 page 1 2014-06-30 IPD50N08S4-13 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 2.1 SMD version, device on PCB R thJA minimal footprint - - 62 6 cm2 cooling area3) - - 40 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0V, I D= 1mA 80 - - Gate threshold voltage V GS(th) V DS=V GS, I D=33µA 2.0 3.0 4.0 Zero gate voltage drain current I DSS V DS=80V, V GS=0V, T j=25°C - 0.01 1 T j=125°C2) - 5 100 V DS=80V, V GS=0V, V µA Gate-source leakage current I GSS V GS=20V, V DS=0V - - 100 nA Drain-source on-state resistance R DS(on) V GS=10V, I D=50A - 11.2 13.2 mW Rev. 1.0 page 2 2014-06-30 IPD50N08S4-13 Parameter Symbol Values Conditions Unit min. typ. max. - 1316 1711 - 511 664 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 29 58 Turn-on delay time t d(on) - 5.0 - Rise time tr - 3.6 - Turn-off delay time t d(off) - 6.4 - Fall time tf - 11.8 - Gate to source charge Q gs - 6.9 9.0 Gate to drain charge Q gd - 4.5 9 Gate charge total Qg - 19 30 Gate plateau voltage V plateau - 5.0 - V - - 50 A - - 200 V GS=0V, V DS=25V, f =1MHz V DD=40V, V GS=10V, I D=50A, R G=3.5W pF ns Gate Charge Characteristics2) V DD=64V, I D=50A, V GS=0 to 10V nC Reverse Diode Diode continous forward current2) IS Diode pulse current1) I S,pulse Diode forward voltage V SD V GS=0V, I F=50A, T j=25°C - 0.9 1.3 V Reverse recovery time1) t rr V R=50V, I F=I S, di F/dt =100A/µs - 74 - ns Reverse recovery charge1) Q rr - 49 - nC T C=25°C 1) Current is limited by bondwire; with an R thJC = 2.1K/W the chip is able to carry 85A at 25°C. 2) Specified by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2014-06-30 IPD50N08S4-13 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS = 10 V 80 60 70 50 60 40 ID [A] Ptot [W] 50 40 30 30 20 20 10 10 0 0 0 50 100 150 200 0 50 TC [°C] 100 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 101 1 µs 100 100 0.5 ZthJC [K/W] 10 µs ID [A] 100 µs 1 ms 0.1 0.05 10 10-1 0.01 single pulse 1 10-2 0.1 1 10 100 VDS [V] Rev. 1.0 tp [s] page 4 2014-06-30 IPD50N08S4-13 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = f(I D); T j = 25 °C parameter: V GS parameter: V GS 200 30 5V 180 5.5 V 10 V 160 25 140 7V RDS(on) [mW] ID [A] 120 100 80 20 6V 6V 60 40 5.5 V 20 5V 15 7V 10 V 0 0 2 4 10 6 0 20 VDS [V] 40 ID [A] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 50 A; V GS = 10 V parameter: T j 200 22 -55 °C 180 25 °C 160 18 140 175 °C RDS(on) [mW] ID [A] 120 100 80 14 60 10 40 20 0 2.5 4.5 6 6.5 -60 VGS [V] Rev. 1.0 -20 20 60 100 140 180 Tj [°C] page 5 2014-06-30 IPD50N08S4-13 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 3.5 3.25 Ciss 103 3 C [pF] 330 µA VGS(th) [V] 2.75 33 µA Coss 102 2.5 Crss 2.25 2 1.75 101 1.5 -60 -20 20 60 100 140 0 180 20 40 60 80 VDS [V] Tj [°C] 11 Typical forward diode characteristicis 12 Avalanche characteristics IF = f(VSD) I A S= f(t AV) parameter: T j parameter: Tj(start) 100 103 102 25 °C IF [A] IAV [A] 100 °C 150 °C 10 175 °C 101 25 °C 100 0 0.4 0.8 1.2 1.6 2 VSD [V] Rev. 1.0 1 1 10 100 1000 tAV [µs] page 6 2014-06-30 IPD50N08S4-13 13 Avalanche energy 14 Drain-source breakdown voltage E AS = f(T j); I D = 15 A V BR(DSS) = f(T j); I D = 1 mA 90 400 88 350 86 300 84 7.5 A VBR(DSS) [V] EAS [mJ] 250 200 150 15 A 82 80 78 76 100 74 31 A 50 72 70 0 25 75 125 -55 175 -15 Tj [°C] 25 65 105 145 185 Tj [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = 50 A pulsed parameter: V DD 10 V GS 9 Qg 8 16 V 64 V 7 VGS [V] 6 5 V g s(th) 4 3 2 Q g (th) Q sw Q gate 1 Q gs 0 0 3 6 9 12 15 Q gd 18 Qgate [nC] Rev. 1.0 page 7 2014-06-30 IPD50N08S4-13 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2014 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2014-06-30 IPD50N08S4-13 Revision History Version Date Changes Revision 1.0 Rev. 1.0 30.06.2014 Final data sheet page 9 2014-06-30