Type
IPD50R520CP
CoolMOSTM Power Transistor
Product Summary
Package
• Lowest figure of merit RON x Qg
• Ultra low gate charge
V DS @Tjmax
550
V
R DS(on),max
0.520
Ω
13
nC
Q g,typ
• Extreme dv/dt rated
• High peak current capability
• Pb-free lead plating; RoHS compliant
• Quailfied according to JEDEC1) for target applications
PG-TO252
CoolMOS CP is designed for:
• Hard- & Softswitching SMPS topologies
• DCM PFC for Lamp ballast
• PWM for Lamp Ballast, PDP and LCD TV
Type
Package
Marking
IPD50R520CP
PG-TO252
5R520P
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous drain current
ID
Value
T C=25 °C
7.1
T C=100 °C
4.5
Pulsed drain current2)
I D,pulse
T C=25 °C
15
Avalanche energy, single pulse
E AS
I D=2.5 A, V DD=50 V
166
Avalanche energy, repetitive t AR2),3)
E AR
I D=2.5 A, V DD=50 V
0.25
Avalanche current, repetitive t AR2),3)
I AR
MOSFET dv /dt ruggedness
dv /dt
Gate source voltage
V GS
Power dissipation
P tot
Operating and storage temperature
T j, T stg
Rev. 2.1
Unit
A
mJ
2.5
A
V DS=0...400 V
50
V/ns
static
±20
V
AC (f >1 Hz)
±30
T C=25 °C
66
W
-55 ... 150
°C
page 1
2008-04-10
IPD50R520CP
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
Continuous diode forward current
IS
Diode pulse current 2)
I S,pulse
Reverse diode dv /dt 4)
dv /dt
Parameter
Symbol Conditions
Value
Unit
3.8
T C=25 °C
A
15
15
V/ns
Values
Unit
min.
typ.
max.
-
-
1.9
Thermal characteristics
Thermal resistance, junction - case
R thJC
Thermal resistance, junction ambient
R thJA
leaded
-
-
62
Soldering temperature,
wavesoldering only allowed at leads
T sold
1.6 mm (0.063 in.)
from case for 10 s
-
-
260
°C
V
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=250 µA
500
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=0.25 mA
2.5
3
3.5
Zero gate voltage drain current
I DSS
V DS=500 V, V GS=0 V,
T j=25 °C
-
-
1
V DS=500 V, V GS=0 V,
T j=150 °C
-
10
-
µA
Gate-source leakage current
I GSS
V GS=20 V, V DS=0 V
-
-
100
nA
Drain-source on-state resistance
R DS(on)
V GS=10 V, I D=3.8 A,
T j=25 °C
-
0.47
0.52
Ω
V GS=10 V, I D=3.8 A,
T j=150 °C
-
1.2
-
f =1 MHz, open drain
-
2.2
-
Gate resistance
Rev. 2.1
RG
page 2
Ω
2008-04-10
IPD50R520CP
Parameter
Values
Symbol Conditions
Unit
min.
typ.
max.
-
680
-
-
31
-
-
29
-
Dynamic characteristics
Input capacitance
C iss
Output capacitance
C oss
Effective output capacitance, energy
related6)
C o(er)
Effective output capacitance, time
related7)
C o(tr)
-
63
-
Turn-on delay time
t d(on)
-
35
-
Rise time
tr
-
14
-
Turn-off delay time
t d(off)
-
80
-
Fall time
tf
-
17
-
Gate to source charge
Q gs
-
3
-
Gate to drain charge
Q gd
-
5
-
Gate charge total
Qg
-
13
17
Gate plateau voltage
V plateau
-
5.2
-
V
-
0.9
1.2
V
-
240
-
ns
-
1.6
-
µC
-
13
-
A
V GS=0 V, V DS=100 V,
f =1 MHz
pF
V GS=0 V, V DS=0 V
to 400 V
V DD=400 V,
V GS=10 V, I D=3.8 A,
R G=48.3 Ω
ns
Gate Charge Characteristics
V DD=400 V, I D=3.8 A,
V GS=0 to 10 V
nC
Reverse Diode
Diode forward voltage
V SD
Reverse recovery time
t rr
Reverse recovery charge
Q rr
Peak reverse recovery current
I rrm
V GS=0 V, I F=3.8 A,
T j=25 °C
V R=400 V, I F=I S,
di F/dt =100 A/µs
1)
J-STD20 and JESD22
2)
Pulse width t p limited by T j,max
3)
Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f.
4)
I SD≤I D, di /dt ≤400A/µs, V DClink=400V, V peak
