IPD5N25S3-430
OptiMOS™-T Power-Transistor
Product Summary
V DS
250
V
R DS(on),max
430
mW
ID
5
A
Features
• N-channel - Enhancement mode
PG-TO252-3-313
• AEC qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
Type
Package
Marking
IPD5N25S3-430
PG-TO252-3-
3N25430
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current
ID
Conditions
Value
T C=25°C, V GS=10V
5
T C=100°C, V GS=10V1)
4
Unit
A
Pulsed drain current1)
I D,pulse
T C=25°C
20
Avalanche energy, single pulse1)
Avalanche current, single pulse
E AS
I D=1.3A
13
mJ
I AS
-
1.3
A
Reverse diode dv /dt
Gate source voltage
dv /dt
V GS
-
±20
V
Power dissipation
P tot
T C=25°C
41
W
Operating and storage temperature
T j, T stg
-
-55 ... +175
°C
IEC climatic category; DIN IEC 68-1
-
-
55/175/56
Rev. 1.0
6
page 1
kV/µs
2012-10-18
IPD5N25S3-430
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics1)
Thermal resistance, junction - case
R thJC
-
-
-
3.7
SMD version, device on PCB
R thJA
minimal footprint
-
-
40
6 cm2 cooling area2)
-
-
62
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0V, I D= 1mA
250
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=13µA
2.0
3.0
4.0
Zero gate voltage drain current
I DSS
V DS=250V, V GS=0V,
T j=25°C
-
0.1
1
T j=125°C2)
-
10
100
V DS=250V, V GS=0V,
V
µA
Gate-source leakage current
I GSS
V GS=20V, V DS=0V
-
1
100
nA
Drain-source on-state resistance
R DS(on)
V GS=10V, I D=5A
-
370
430
mW
Rev. 1.0
page 2
2012-10-18
IPD5N25S3-430
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
317
422
-
117
156
Dynamic characteristics1)
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
6
13
Turn-on delay time
t d(on)
-
3
-
Rise time
tr
-
2
-
Turn-off delay time
t d(off)
-
8
-
Fall time
tf
-
5
-
Gate to source charge
Q gs
-
1.5
2
Gate to drain charge
Q gd
-
1.3
2.7
Gate charge total
Qg
-
4.7
6.2
Gate plateau voltage
V plateau
-
4.7
-
V
-
-
5
A
-
-
20
V GS=0V, V DS=25V,
f =1MHz
V DD=125V, V GS=10V,
I D=5A, R G=3.5W
pF
ns
Gate Charge Characteristics1), 3)
V DD=200V, I D=5A,
V GS=0 to 10V
nC
Reverse Diode
Diode continous forward current1)
IS
Diode pulse current1)
I S,pulse
Diode forward voltage
V SD
V GS=0V, I F=5A,
T j=25°C
-
0.9
1.2
V
Reverse recovery time1)
t rr
V R=125V, I F=5A,
di F/dt =100A/µs
-
70
-
ns
Reverse recovery charge1)
Q rr
-
159
-
nC
1)
T C=25°C
Defined by design. Not subject to production test.
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3)
Devices thermal performance determined according to EIA JESD 51-14
"Transient Dual Interface Test Method For The Measurement Of The Thermal Resistance"
Rev. 1.0
page 3
2012-10-18
IPD5N25S3-430
1 Power dissipation
2 Drain current
P tot = f(T C); V GS ≥ 6 V
I D = f(T C); V GS ≥ 6 V
50
6
40
I D [A]
P tot [W]
30
3
20
10
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D = f(V DS); T C = 25 °C; D = 0
Z thJC = f(t p)
parameter: t p
parameter: D =t p/T
101
100
0.5
Z thJC [K/W]
100
I D [A]
1 µs
10
10 µs
100 µs
0.1
0.05
10-1
single pulse
1 ms
10-2
1
1
10
100
1000
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 1.0
0.01
page 4
2012-10-18
IPD5N25S3-430
5 Typ. output characteristics
6 Typ. drain-source on-state resistance
I D = f(V DS); T j = 25 °C
R DS(on) = f(I D); T j = 25 °C
parameter: V GS
parameter: V GS
20
10 V
6.5 V
6V
440
18
16
420
14
5.5 V
400
R DS(on) [mW]
I D [A]
12
10
8
5V
5V
5.5 V
380
6V
6.5 V
360
10 V
6
340
4
320
2
0
300
0
5
10
15
20
25
30
0
1
2
V DS [V]
3
4
5
I D [A]
7 Typ. transfer characteristics
8 Typ. drain-source on-state resistance
I D = f(V GS); V DS = 6V
R DS(on) = f(T j); I D = 5 A; V GS = 10 V
parameter: T j
20
1200
18
1000
16
14
R DS(on) [mW]
800
I D [A]
12
10
8
600
400
6
175 °C
4
200
2
25 °C
-55 °C
0
3
3.5
4
4.5
5
5.5
6
V GS [V]
Rev. 1.0
0
-60
-20
20
60
100
140
180
T j [°C]
page 5
2012-10-18
IPD5N25S3-430
9 Typ. gate threshold voltage
10 Typ. capacitances
V GS(th) = f(T j); V GS = V DS
C = f(V DS); V GS = 0 V; f = 1 MHz
parameter: I D
103
4
Ciss
3
C [pF]
V GS(th) [V]
3.5
130 µA
102
13 µA
Coss
2.5
Crss
2
1.5
101
-60
-20
20
60
100
140
0
180
50
100
150
200
250
V DS [V]
T j [°C]
11 Typical forward diode characteristicis
12 Avalanche characteristics
IF = f(VSD)
I A S= f(t AV)
parameter: T j
parameter: Tj(start)
10
1012
1
I F [A]
I AV [A]
1023
150 °C 100 °C 25 °C
01
10
175 °C
10
10-10
0
0.2
0.4
175 °C
0.6
0.1
25 °C
0.8
25 °C
0.01
1
1.2
1.4
V SD [V]
Rev. 1.0
0.1
1
10
100
1000
10000
t AV [µs]
page 6
2012-10-18
IPD5N25S3-430
13 Avalanche energy
14 Drain-source breakdown voltage
E AS = f(T j); I D = 45 A
V BR(DSS) = f(T j); I D = 1 mA
290
5
280
4
V BR(DSS) [V]
E AS [mJ]
270
3
2
260
250
0.325 A
0.65 A
1
240
1.3 A
230
0
25
75
125
-55
175
-15
T j [°C]
25
65
105
145
T j [°C]
15 Typ. gate charge
16 Gate charge waveforms
V GS = f(Q gate); I D = 5 A pulsed
parameter: V DD
10
V GS
9
Qg
8
50 V
7
200 V
V GS [V]
6
5
V g s(th)
4
3
2
Q g (th)
Q sw
1
Q gs
0
0
1
2
3
4
Q gate
Q gd
5
Q gate [nC]
Rev. 1.0
page 7
2012-10-18
IPD5N25S3-430
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2012
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2012-10-18
IPD5N25S3-430
Revision History
Version
Date
Changes
Revision 0.1
21.10.2010 Initial target data sheet
Revision 0.2
24.07.2012 Preliminary data sheet
Revision 1.0
18.10.2012 Final Data Sheet
Rev. 1.0
page 9
2012-10-18