IPD80P03P4L07ATMA2

IPD80P03P4L-07 OptiMOS -P2 Power-Transistor ® Product Summary VDS -30 V RDS(on) 6.8 mW ID -80 A Features • P-channel - Logic Level - Enhancement mode PG-TO252-3-11 • AEC qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • RoHS compliant • 100% Avalanche tested • Intended for reverse battery protection Type Package Marking IPD80P03P4L-07 PG-TO252-3-11 4P03L07 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current ID Conditions T C=25°C, V GS=-10V 1) T C=100°C, V GS=-10V 2) 2) Value -80 Unit A -65 I D,pulse T C=25°C -320 Avalanche energy, single pulse E AS I D=-40A 135 mJ Avalanche current, single pulse I AS - -80 A Gate source voltage V GS - +5/-16 V Power dissipation P tot T C=25 °C 88 W Operating and storage temperature T j, T stg - -55 ... +175 °C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Pulsed drain current Rev. 2.1 page 1 2022-03-10 IPD80P03P4L-07 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 1.7 SMD version, device on PCB R thJA minimal footprint - - 62 6 cm2 cooling area3) - - 40 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0V, I D= -1mA -30 - - Gate threshold voltage V GS(th) V DS=V GS, I D=-130µA -1.0 -1.5 -2.0 Zero gate voltage drain current I DSS V DS=-24V, V GS=0V, T j=25°C - -0.03 -1 - -10 -100 V DS=-24V, V GS=0V, T j=125°C2) V µA Gate-source leakage current I GSS V GS=-16V, V DS=0V - - -100 nA Drain-source on-state resistance R DS(on) V GS=-4.5V, I D=-40A - 8.7 12 mW V GS=-10V, I D=-80A - 5.6 6.8 Rev. 2.1 page 2 2022-03-10 IPD80P03P4L-07 Parameter Symbol Values Conditions Unit min. typ. max. - 4400 5700 - 1220 1600 Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 48 96 Turn-on delay time t d(on) - 8 - Rise time tr - 4 - Turn-off delay time t d(off) - 15 - Fall time tf - 60 - Gate to source charge Q gs - 16 20 Gate to drain charge Q gd - 8 16 Gate charge total Qg - 63 80 Gate plateau voltage V plateau - -3.7 - V - - -80 A - - -320 - - -1.3 V - 50 - ns - 40 - nC V GS=0V, V DS=-25V, f =1MHz V DD=-15V, V GS=-10V, I D=-80A, R G=3.5W pF ns Gate Charge Characteristics2) V DD=-24V, I D=-80A, V GS=0 to -10V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD Reverse recovery time2) t rr Reverse recovery charge2) Q rr T C=25°C V GS=0V, I F=-80A, T j=25°C V R=-15V, I F=-40A, di F/dt =-100A/µs 1) Current is limited by bondwire; with an R thJC = 1.7K/W the chip is able to carry 92A at 25°C. 2) Defined by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 2.1 page 3 2022-03-10 IPD80P03P4L-07 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≤ -6V I D = f(T C); V GS ≤ -6V 100 80 80 60 60 -ID [A] Ptot [W] 100 40 40 20 20 0 0 0 50 100 150 200 0 50 100 TC [°C] 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 101 1 µs 10 µs 100 100 0.5 ZthJC [K/W] 100 µs -ID [A] 1 ms 0.1 10-1 0.05 0.01 10 single pulse 10-2 1 10-3 0.1 1 10 100 10-6 -VDS [V] Rev. 2.1 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2022-03-10 IPD80P03P4L-07 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = (I D); T j = 25 °C parameter: V GS parameter: V GS 20 320 -4V 10V -5V -4.5V 17 5V RDS(on) [mW] 240 -ID [A] 4.5V 160 14 11 4V 80 8 3.5V 3V -10V 5 0 0 2 4 0 6 80 160 240 320 -ID [A] -VDS [V] 7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance I D = f(V GS); V DS = -6V R DS(on) = f(T j); I D = -80 A; V GS = -10 V parameter: T j 320 9 -55 °C 25 °C 8 175 °C RDS(on) [mW] -ID [A] 240 160 7 6 80 5 4 0 1 2 3 4 5 6 -60 20 60 100 140 180 Tj [°C] -VGS [V] Rev. 2.1 -20 page 5 2022-03-10 IPD80P03P4L-07 9 Typ. gate threshold voltage 10 Typ. capacitances V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: -I D 105 2 1300µA 104 1.5 130µA C [pF] -VGS(th) [V] Ciss 1 103 Coss 102 0.5 Crss 101 0 -60 -20 20 60 100 140 0 180 5 10 15 20 25 30 -VDS [V] Tj [°C] 11 Typical forward diode characteristicis 12 Avalanche characteristics IF = f(VSD) I AS = f(t AV) parameter: T j parameter: Tj(start) 100 103 25°C 100°C 102 175 °C 25 °C 0.6 0.8 -IAV [A] -IF [A] 150°C 10 101 1 100 0 0.2 0.4 1 1.2 1.4 1 -VSD [V] Rev. 2.1 10 100 1000 tAV [µs] page 6 2022-03-10 IPD80P03P4L-07 13 Avalanche energy 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D = -1 mA parameter: I D 33 300 20 A 250 32 -VBR(DSS) [V] EAS [mJ] 200 150 40 A 31 30 100 29 80 A 50 28 0 25 75 125 -60 175 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 15 Typ. gate charge 16 Gate charge waveforms V GS = f(Q gate); I D = -80 A pulsed parameter: V DD 12 V GS 10 Qg -24V -6V -VGS [V] 8 6 4 Q gate 2 Q gs Q gd 0 0 10 20 30 40 50 60 70 Qgate [nC] Rev. 2.1 page 7 2022-03-10 IPD80P03P4L-07 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2022 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.1 page 8 2022-03-10 IPD80P03P4L-07 Revision History Version Date Changes Revision 1.0 2018-02-15 Final datasheet Revision 2.0 2018-07-30 Typo corrected Revision 2.1 2022-03-10 Corrected Crss Rev. 2.1 page 9 2022-03-10