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IPG20N04S412AATMA1

IPG20N04S412AATMA1

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    PowerVDFN8

  • 描述:

    MOSFET 2N-CH 8TDSON

  • 数据手册
  • 价格&库存
IPG20N04S412AATMA1 数据手册
IPG20N04S4-12A OptiMOS™-T2 Power-Transistor Product Summary VDS 40 RDS(on),max4) V 12.2 ID mW 20 A Features • Dual N-channel Normal Level - Enhancement mode PG-TDSON-8-10 • AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green Product (RoHS compliant) 1 • 100% Avalanche tested • Feasible for automatic optical inspection (AOI) Type Package Marking IPG20N04S4-12A PG-TDSON-8-10 4N0412 8 7 6 5 1 2 3 4 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current one channel active ID Conditions T C=25 °C, V GS=10 V1) T C=100 °C, Value 20 V GS=10 V2) 20 Unit A Pulsed drain current2) one channel active I D,pulse - 80 Avalanche energy, single pulse2, 4) E AS I D=10A 80 mJ Avalanche current, single pulse4) I AS - 15 A Gate source voltage V GS - ±20 V Power dissipation one channel active P tot T C=25 °C 41 W Operating and storage temperature T j, T stg - -55 ... +175 °C Rev. 1.1 page 1 2022-01-20 IPG20N04S4-12A Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 3.7 SMD version, device on PCB R thJA minimal footprint - 100 - 6 cm2 cooling area3) - 60 - K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D= 1 mA 40 - - Gate threshold voltage V GS(th) V DS=V GS, I D= 15µA 2.0 3.0 4.0 Zero gate voltage drain current4) I DSS V DS=40 V, V GS=0 V, T j=25 °C - 0.01 1 T j=85 °C2) - 1 100 V DS=18 V, V GS=0 V, V µA Gate-source leakage current4) I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance4) R DS(on) V GS=10 V, I D=17A - 11.1 12.2 mW Rev. 1.1 page 2 2022-01-20 IPG20N04S4-12A Parameter Symbol Values Conditions Unit min. typ. max. - 1130 1470 - 300 390 Dynamic characteristics2) Input capacitance4) C iss V GS=0 V, V DS=25 V, f =1 MHz pF Output capacitance4) C oss Reverse transfer capacitance4) Crss - 9 21 Turn-on delay time t d(on) - 9 - Rise time tr - 2 - Turn-off delay time t d(off) - 10 - Fall time tf - 8 - Gate to source charge Q gs - 6 8 Gate to drain charge Q gd - 2 4.6 Gate charge total Qg - 14 18 Gate plateau voltage V plateau - 5.5 - V IS - - 20 A - - 80 V DD=20 V, V GS=10 V, I D=20 A, R G=11 W ns Gate Charge Characteristics2, 4) V DD=32 V, I D=20 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) one channel active T C=25 °C Diode pulse current2) one channel active I S,pulse Diode forward voltage V SD V GS=0 V, I F=17 A, T j=25 °C - 0.9 1.3 V Reverse recovery time2) t rr V R=20 V, I F=I S, di F/dt =100 A/µs - 32 - ns Reverse recovery charge2, 4) Q rr - 25 - nC 1) Current is limited by bondwire; with an R thJC =3.7 K/W the chip is able to carry 44A at 25°C. 2) Specified by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 4) Rev. 1.1 Per channel page 3 2022-01-20 IPG20N04S4-12A 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 6 V; one channel active I D = f(T C); V GS ≥ 6 V; one channel active 45 25 40 20 35 30 ID [A] Ptot [W] 15 25 20 10 15 10 5 5 0 0 0 50 100 150 200 0 50 100 TC [°C] 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25°C; D =0; one channel active Z thJC = f(t p) parameter: t p parameter: D =t p/T 100 101 1 µs 10 µs 0.5 100 µs 100 ZthJC [K/W] ID [A] 10 1 ms 1 0.1 0.05 10-1 0.01 single pulse 0.1 10-2 0.1 1 10 100 VDS [V] Rev. 1.1 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2022-01-20 IPG20N04S4-12A 5 Typ. output characteristics4) 6 Typ. drain-source on-state resistance4) I D = f(V DS); T j = 25 °C R DS(on) = f(I D); T j = 25 °C parameter: V GS parameter: V GS 80 50 7V 10 V 5V 60 5.5 V 6.5 V 6V 7V 40 RDS(on) [mW] ID [A] 6.5 V 40 6V 5.5V 20 30 20 5V 10 V 0 10 0 2 4 6 8 0 20 40 VDS [V] 60 80 ID [A] 7 Typ. transfer characteristics4) 8 Typ. drain-source on-state resistance4) I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 17 A; V GS = 10 V parameter: T j 80 20 25 °C -55 °C 175 °C 18 60 RDS(on) [mW] ID [A] 16 40 14 12 20 10 0 3 4 5 6 7 8 VGS [V] Rev. 1.1 8 -60 -20 20 60 100 140 180 Tj [°C] page 5 2022-01-20 IPG20N04S4-12A 9 Typ. gate threshold voltage 10 Typ. Capacitances4) V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 4 3.5 Ciss 103 VGS(th) [V] Coss C [pF] 150µA 3 15µA 102 2.5 2 Crss 101 1.5 100 1 -60 -20 20 60 100 140 0 180 5 10 15 11 Typical forward diode characteristicis4) 12 Avalanche characteristics4) IF = f(VSD) I A S= f(t AV) parameter: T j parameter: Tj(start) 30 100 102 25 °C 10 100 °C IAV [A] 150 °C IF [A] 25 VDS [V] Tj [°C] 101 175 °C 25 °C 0.6 0.8 1 0.1 100 0 0.2 0.4 1 1.2 1.4 VSD [V] Rev. 1.1 20 1 10 100 1000 tAV [µs] page 6 2022-01-20 IPG20N04S4-12A 13 Avalanche energy4) 14 Drain-source breakdown voltage E AS = f(T j), I D = 10A V BR(DSS) = f(T j); I D = 1 mA 44 100 43 80 42 EAS [mJ] VBR(DSS) [V] 60 40 41 40 39 20 38 37 0 25 50 75 100 125 150 -60 175 -20 Tj [°C] 20 60 100 140 180 Tj [°C] 15 Typ. gate charge4) 16 Gate charge waveforms V GS = f(Q gate); I D = 20 A pulsed parameter: V DD 12 V GS 10 Qg 8V 32 V VGS [V] 8 6 V gs(th) 4 2 Q g(th) Q sw Q gs 0 0 3 6 9 12 Q gate Q gd 15 Qgate [nC] Rev. 1.1 page 7 2022-01-20 IPG20N04S4-12A Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2012 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.1 page 8 2022-01-20 IPG20N04S4-12A Revision History Version Date Changes Revision 1.0 18.09.2012 Data Sheet revision 1.0 Revision 1.1 20.01.2022 diagrams 7 and 15 modified Rev. 1.1 page 9 2022-01-20
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IPG20N04S412AATMA1

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