IPG20N06S2L50AATMA1

IPG20N06S2L-50A OptiMOS® Power-Transistor Product Summary VDS 55 V RDS(on),max4) 50 mΩ ID 20 A Features • Dual N-channel Logic Level - Enhancement mode PG-TDSON-8-10 • AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C operating temperature • Green Product (RoHS compliant) • 100% Avalanche tested • Feasible for automatic optical inspection (AOI) Type Package Marking IPG20N06S2L-50A PG-TDSON-8-10 2N06L50 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current one channel active2) ID Conditions Value T C=25 °C, V GS=10 V1) 20 T C=100 °C, V GS=10 V 16 Unit A Pulsed drain current2) one channel active I D,pulse - 80 Avalanche energy, single pulse2, 4) E AS I D=10A 60 mJ Avalanche current, single pulse4) I AS - 15 A Gate source voltage V GS - ±20 V Power dissipation one channel active P tot T C=25 °C 51 W Operating and storage temperature T j, T stg - -55 ... +175 °C IEC climatic category; DIN IEC 68-1 - - 55/175/56 Rev. 1.0 page 1 2013-02-28 IPG20N06S2L-50A Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - - 2.9 SMD version, device on PCB R thJA minimal footprint - 100 - 6 cm2 cooling area3) - 60 - K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D= 1 mA 55 - - Gate threshold voltage V GS(th) V DS=V GS, I D=19 µA 1.2 1.6 2.0 Zero gate voltage drain current4) I DSS V DS=55 V, V GS=0 V, T j=25 °C - 0.01 1 - 1 100 V DS=55 V, V GS=0 V, T j=125 °C2) V µA Gate-source leakage current4) I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance4) R DS(on) V GS=4.5 V, I D=10A - 50 60 mΩ V GS=10 V, I D=15A - 39 50 Rev. 1.0 page 2 2013-02-28 IPG20N06S2L-50A Parameter Symbol Values Conditions Unit min. typ. max. - 430 560 - 120 160 Dynamic characteristics2) Input capacitance4) C iss Output capacitance4) C oss Reverse transfer capacitance4) Crss - 45 68 Turn-on delay time t d(on) - 2 - Rise time tr - 3 - Turn-off delay time t d(off) - 15 - Fall time tf - 10 - Gate to source charge Q gs - 1.5 2 Gate to drain charge Q gd - 4.6 6.9 Gate charge total Qg - 13 17 Gate plateau voltage V plateau - 3.7 - V IS - - 20 A - - 80 V GS=0 V, V DS=25 V, f =1 MHz V DD=27.5 V, V GS=10 V, I D=20 A, R G=11 Ω pF ns Gate Charge Characteristics2, 4) V DD=44 V, I D=20 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) one channel active T C=25 °C 2) Diode pulse current one channel active I S,pulse Diode forward voltage V SD V GS=0 V, I F=15 A, T j=25 °C - 1.0 1.3 V Reverse recovery time2) t rr V R=27.5 V, I F=I S, di F/dt =100 A/µs - 25 - ns Reverse recovery charge2, 4) Q rr - 24 - nC 1) Current is limited by bondwire; with an R thJC =2.9 K/W the chip is able to carry 23A at 25°C. 2) Specified by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 4) Per channel Rev. 1.0 page 3 2013-02-28 IPG20N06S2L-50A 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 6 V; one channel active I D = f(T C); V GS ≥ 6 V; one channel active 25 60 50 20 40 ID [A] Ptot [W] 15 30 10 20 5 10 0 0 0 50 100 150 0 200 50 100 TC [°C] 150 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25°C; D =0; one channel active Z thJC = f(t p) parameter: t p parameter: D =t p/T 100 101 1 µs 10 µs 0.5 ZthJC [K/W] ID [A] 100 100 µs 10 0.1 0.05 10-1 0.01 1 ms single pulse 1 10-2 1 10 100 VDS [V] Rev. 1.0 10-6 10-5 10-4 10-3 10-2 10-1 100 tp [s] page 4 2013-02-28 IPG20N06S2L-50A 5 Typ. output characteristics4) 6 Typ. drain-source on-state resistance4) I D = f(V DS); T j = 25 °C R DS(on) = f(I D); T j = 25 °C parameter: V GS parameter: V GS 120 80 3V 10 V 3.5 V 4V 5V 4.5 V 100 5V RDS(on) [mΩ] 60 ID [A] 4.5 V 40 80 60 4V 20 10 V 40 3.5 V 3V 0 20 0 1 2 3 4 0 5 20 40 VDS [V] 60 80 ID [A] 7 Typ. transfer characteristics4) 8 Typ. drain-source on-state resistance4) I D = f(V GS); V DS = 6V R DS(on) = f(T j); I D = 15 A; V GS = 10 V parameter: T j 80 80 -55 °C 25 °C 70 60 175 °C RDS(on) [mΩ] ID [A] 60 40 50 40 20 30 0 1 2 3 4 5 6 VGS [V] Rev. 1.0 20 -60 -20 20 60 100 140 180 Tj [°C] page 5 2013-02-28 IPG20N06S2L-50A 9 Typ. gate threshold voltage 10 Typ. Capacitances4) V GS(th) = f(T j); V GS = V DS C = f(V DS); V GS = 0 V; f = 1 MHz parameter: I D 104 2.5 C [pF] 2 190µA VGS(th) [V] 1.5 103 Ciss 19µA 1 Coss 102 Crss 0.5 101 0 -60 -20 20 60 100 140 0 180 5 10 15 20 25 30 VDS [V] Tj [°C] 11 Typical forward diode characteristicis4) 12 Avalanche characteristics4) IF = f(VSD) I A S= f(t AV) parameter: T j parameter: Tj(start) 100 102 10 25 °C 100 °C IAV [A] IF [A] 150 °C 101 175 °C 25 °C 0.6 0.8 1 0.1 100 0 0.2 0.4 1 1.2 1.4 VSD [V] Rev. 1.0 1 10 100 1000 tAV [µs] page 6 2013-02-28 IPG20N06S2L-50A 13 Avalanche energy4) 14 Drain-source breakdown voltage E AS = f(T j) V BR(DSS) = f(T j); I D = 1 mA parameter: I D 65 150 125 62 5A VBR(DSS) [V] EAS [mJ] 100 75 10 A 59 56 50 15 A 53 25 50 0 25 50 75 100 125 150 -60 175 -20 Tj [°C] 20 60 100 140 180 Tj [°C] 15 Typ. gate charge4) 16 Gate charge waveforms V GS = f(Q gate); I D = 20 A pulsed parameter: V DD 12 V GS 11 V 44 V Qg 10 VGS [V] 8 6 V g s(th) 4 2 Q g (th) Q sw Q gs 0 0 3 6 9 12 Q gate Q gd 15 Qgate [nC] Rev. 1.0 page 7 2013-02-28 IPG20N06S2L-50A Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2012 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2013-02-28 IPG20N06S2L-50A Revision History Version Date Changes Revision 1.0 14.11.2012 Final Data Sheet Rev. 1.0 page 9 2013-02-28