IPG20N10S4L-35
OptiMOS™-T2 Power-Transistor
Product Summary
V DS
100
V
R DS(on),max4)
35
mW
ID
20
A
Features
• Dual N-channel Logic Level - Enhancement mode
PG-TDSON-8-4
• AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green Product (RoHS compliant)
• 100% Avalanche tested
Type
Package
Marking
IPG20N10S4L-35
PG-TDSON-8-4
4N10L35
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current
one channel active
ID
Conditions
Value
T C=25 °C, V GS=10 V1)
20
T C=100 °C,
V GS=10 V2)
17
Unit
A
Pulsed drain current2)
one channel active
I D,pulse
-
80
Avalanche energy, single pulse2, 4)
E AS
I D=10A
60
mJ
Avalanche current, single pulse4)
I AS
-
15
A
Gate source voltage
V GS
-
±16
V
Power dissipation
one channel active
P tot
T C=25 °C
43
W
Operating and storage temperature
T j, T stg
-
-55 ... +175
°C
Rev. 1.1
page 1
2012-05-15
IPG20N10S4L-35
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics2)
Thermal resistance, junction - case
R thJC
-
-
-
3.5
SMD version, device on PCB
R thJA
minimal footprint
-
100
-
6 cm2 cooling area3)
-
60
-
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D= 1 mA
100
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D= 16µA
1.1
1.6
2.1
Zero gate voltage drain current4)
I DSS
V DS=100 V, V GS=0 V,
T j=25 °C
-
0.01
1
T j=125 °C2)
-
1
100
V DS=100 V, V GS=0 V,
V
µA
Gate-source leakage current4)
I GSS
V GS=16 V, V DS=0 V
-
-
100
nA
Drain-source on-state resistance4)
R DS(on)
V GS=4.5 V, I D=10 A
-
38
45
mW
V GS=10 V, I D=17 A
-
29
35
Rev. 1.1
page 2
2012-05-15
IPG20N10S4L-35
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
850
1105
-
285
370
Dynamic characteristics2)
Input capacitance4)
C iss
Output capacitance4)
C oss
Reverse transfer capacitance4)
Crss
-
30
60
Turn-on delay time
t d(on)
-
3
-
Rise time
tr
-
2
-
Turn-off delay time
t d(off)
-
18
-
Fall time
tf
-
13
-
Gate to source charge
Q gs
-
2.9
3.8
Gate to drain charge
Q gd
-
3.2
6.4
Gate charge total
Qg
-
13.4
17.4
Gate plateau voltage
V plateau
-
3.5
-
V
IS
-
-
20
A
-
-
80
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=50 V, V GS=10 V,
I D=20 A, R G=11 W
pF
ns
Gate Charge Characteristics2, 4)
V DD=80 V, I D=20 A,
V GS=0 to 10 V
nC
Reverse Diode
Diode continous forward current2)
one channel active
T C=25 °C
2)
Diode pulse current
one channel active
I S,pulse
Diode forward voltage
V SD
V GS=0 V, I F=17 A,
T j=25 °C
-
1.0
1.3
V
Reverse recovery time2)
t rr
V R=50 V, I F=I S,
di F/dt =100 A/µs
-
50
-
ns
Reverse recovery charge2, 4)
Q rr
-
75
-
nC
1)
Current is limited by bondwire; with an R thJC = 3.5K/W the chip is able to carry 24A at 25°C.
2)
Specified by design. Not subject to production test.
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
4)
Per channel
Rev. 1.1
page 3
2012-05-15
IPG20N10S4L-35
1 Power dissipation
2 Drain current
P tot=f(T C); V GS≥6 V; one channel active
I D=f(T C); V GS≥6 V; one channel active
45
25
40
20
35
30
P tot [W]
15
I D [A]
25
20
10
15
10
5
5
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D=f(V DS); T C=25°C; D =0; one channel active
Z thJC=f(t p)
parameter: t p
parameter: D =t p/T
101
100
1 µs
10 µs
0.5
100
Z thJC [K/W]
10
I D [A]
100 µs
0.1
0.05
10-1
1
0.01
1 ms
single pulse
10-2
0.1
0.1
1
10
100
10-5
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 1.1
10-6
page 4
2012-05-15
IPG20N10S4L-35
5 Typ. output characteristics5)
6 Typ. drain-source on-state resistance5)
I D=f(V DS); T j=25°C
R DS(on)=f(I D); T j=25°C
parameter: V GS
parameter: V GS
80
90
4V
3.5 V
10 V
4.5 V
5V
80
60
70
R DS(on) [mW]
I D [A]
4.5 V
40
4V
60
50
5V
40
20
3.5 V
30
0
10 V
20
0
1
2
3
4
5
0
20
40
V DS [V]
60
80
I D [A]
7 Typ. transfer characteristics5)
8 Typ. drain-source on-state resistance5)
I D=f(V GS); V DS=6V
R DS(on)=f(T j); I D=17A; V GS=10V
parameter: T j
80
65
55
R DS(on) [mW]
I D [A]
60
40
45
35
20
25
175 °C
25 °C
-55 °C
0
1
2
3
4
5
V GS [V]
Rev. 1.1
15
-60
-20
20
60
100
140
180
T j [°C]
page 5
2012-05-15
IPG20N10S4L-35
9 Typ. gate threshold voltage
10 Typ. Capacitances5)
V GS(th)=f(T j); V GS=V DS
C =f(V DS); V GS=0V; f =1MHz
parameter: I D
104
2.5
C [pF]
2
V GS(th) [V]
160µA
1.5
103
Ciss
16µA
Coss
1
102
0.5
Crss
101
0
-60
-20
20
60
100
140
0
180
5
10
15
20
25
30
V DS [V]
T j [°C]
11 Typical forward diode characteristicis5)
12 Avalanche characteristics5)
I F=f(VSD)
I A S= f(t AV)
parameter: T j
parameter: Tj(start)
102
100
10
I AV [A]
I F [A]
150 °C
101
175 °C
25 °C
0.6
0.8
25 °C
1
100
0.1
0
0.2
0.4
1
1.2
1.4
V SD [V]
Rev. 1.1
100 °C
1
10
100
1000
t AV [µs]
page 6
2012-05-15
IPG20N10S4L-35
13 Avalanche energy5)
14 Drain-source breakdown voltage
E AS=f(T j), I D=10A
V BR(DSS)=f(T j); I D=1mA
115
60
50
110
V BR(DSS) [V]
E AS [mJ]
40
30
105
100
20
95
10
90
0
25
50
75
100
125
150
-60
175
-20
T j [°C]
20
60
100
140
180
T j [°C]
15 Typ. gate charge5)
16 Gate charge waveforms
V GS=f(Q gate); I D=20A pulsed
parameter: V DD
12
V GS
Qg
10
20V
V GS [V]
8
80 V
6
V g s(th)
4
2
Q g (th)
Q sw
Q gs
0
0
3
6
9
12
Q gate
Q gd
15
Q gate [nC]
Rev. 1.1
page 7
2012-05-15
IPG20N10S4L-35
Published by
Infineon Technologies AG
81726 Munich, Germany
© Infineon Technologies AG 2011
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.1
page 8
2012-05-15
IPG20N10S4L-35
Revision History
Version
Date
Changes
Revision 1.0
29.11.2011
Final Data Sheet
Revision 1.1
15.05.2012
Update of product marking
Rev. 1.1
page 9
2012-05-15