IPP040N06N

Type IPP040N06N OptiMOSTM Power-Transistor Features Product Summary • Optimized for high performance SMPS, e.g. sync. rec. • 100% avalanche tested • Superior thermal resistance • N-channel 1) • Qualified according to JEDEC for target applications VDS 60 V RDS(on),max 4.0 mW ID 80 A QOSS 44 nC QG(0V..10V) 38 nC • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 PG-TO220-3 Type Package Marking IPP040N06N PG-TO220-3 040N06N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 °C 80 V GS=10 V, T C=100 °C 80 V GS=10 V, T C=25 °C, R thJA =50K/W 20 Unit A Pulsed drain current2) I D,pulse T C=25 °C 320 Avalanche energy, single pulse3) E AS I D=80 A, R GS=25 W 70 mJ Gate source voltage V GS ±20 V 1) J-STD20 and JESD22 2) See figure 3 for more detailed information 3) See figure 13 for more detailed information 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev.2.2 page 1 2012-12-20 IPP040N06N Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Operating and storage temperature Value T C=25 °C 107 T A=25 °C, R thJA=50 K/W 3.0 T j, T stg W -55 ... 175 IEC climatic category; DIN IEC 68-1 Parameter Unit °C 55/175/56 Values Symbol Conditions Unit min. typ. max. - - 1.4 minimal footprint - - 62 6 cm² cooling area4) - - 40 Thermal characteristics Thermal resistance, junction - case R thJC Device on PCB R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 60 - - Gate threshold voltage V GS(th) V DS=V GS, I D=50 µA 2.1 2.8 3.3 Zero gate voltage drain current I DSS V DS=60 V, V GS=0 V, T j=25 °C - 0.5 1 V DS=60 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=80 A - 3.6 4.0 mW V GS=6 V, I D=20 A - 4.7 6.0 - 1.3 1.95 W 60 120 - S Gate resistance RG Transconductance g fs Rev.2.2 |V DS|>2|I D|R DS(on)max, I D=80 A page 2 2012-12-20 IPP040N06N Parameter Values Symbol Conditions Unit min. typ. max. - 2700 3375 - 670 838 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=30 V, f =1 MHz pF Output capacitance C oss Reverse transfer capacitance Crss - 28 56 Turn-on delay time t d(on) - 19 - Rise time tr - 16 - Turn-off delay time t d(off) - 30 - Fall time tf - 9 - Gate to source charge Q gs - 13 - Gate charge at threshold Q g(th) - 8 - Gate to drain charge Q gd - 7 9 Switching charge Q sw - 13 - Gate charge total Qg - 38 44 Gate plateau voltage V plateau - 4.9 - V Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V - 33 - nC Output charge Q oss V DD=30 V, V GS=0 V - 44 - - - 80 - - 320 - 1.0 1.2 V - 34 54 ns - 34 - nC V DD=30 V, V GS=10 V, I D=80 A, R G,ext=3 W ns Gate Charge Characteristics5) V DD=30 V, I D=80 A, V GS=0 to 10 V nC Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr 5) A T C=25 °C V GS=0 V, I F=80 A, T j=25 °C V R=30 V, I F=80 A, di F/dt =100 A/µs See figure 16 for gate charge parameter definition Rev.2.2 page 3 2012-12-20 IPP040N06N 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 120 100 100 80 80 ID [A] Ptot [W] 60 60 40 40 20 20 0 0 0 25 50 75 100 125 150 175 0 25 50 75 TC [°C] 100 125 150 175 200 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 10 103 limited by on-state resistance 1 µs 10 µs 102 1 0.5 ZthJC [K/W] ID [A] 100 µs 1 ms 101 10 ms DC 0.2 0.1 0.05 10-1 single pulse 100 10-2 10-1 10-1 100 101 102 10-5 10-4 10-3 10-2 10-1 1 tp [s] VDS [V] Rev.2.2 0.02 0.01 page 4 2012-12-20 IPP040N06N 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 320 8 5V 10 V 280 5.5 V 6V 7 7V 240 6 6V RDS(on) [mW] ID [A] 200 160 5.5 V 120 80 5 7V 4 10 V 3 2 5V 40 1 0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 80 VDS [V] 160 240 320 60 80 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 320 150 280 240 100 gfs [S] ID [A] 200 160 120 50 80 40 175 °C 25 °C 0 0 0 2 4 6 8 VGS [V] Rev.2.2 0 20 40 ID [A] page 5 2012-12-20 IPP040N06N 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=80 A; V GS=10 V V GS(th)=f(T j); V GS=V DS 8 5 7.5 7 6.5 4 6 5 max 3 4.5 4 VGS(th) [V] RDS(on) [mW] 5.5 typ 3.5 3 500 mA 50 µA 2 2.5 2 1 1.5 1 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 Tj [°C] 60 100 140 180 Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 10000 Ciss 103 102 1000 IF [A] C [pF] Coss 25 °C 102 101 100 175 °C Crss 101 100 10 0 20 40 60 VDS [V] Rev.2.2 0 0.5 1 1.5 2 VSD [V] page 6 2012-12-20 IPP040N06N 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=80 A pulsed parameter: T j(start) parameter: V DD 12 100 30 V 10 25 °C 12 V 8 100 °C 48 V VGS [V] IAV [A] 125 °C 10 6 4 2 1 1 10 100 0 1000 0 10 tAV [µs] 20 30 40 50 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 70 V GS Qg VBR(DSS) [V] 66 62 V gs(th) 58 54 Q g(th) Q sw Q gs 50 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [°C] Rev.2.2 page 7 2012-12-20 IPP040N06N Package Outline Rev.2.2 PG-TO220-3 page 8 2012-12-20 IPP040N06N Published by Infineon Technologies AG 81726 Munich, Germany © 2011 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev.2.2 page 9 2012-12-20