IPP045N10N3G

IPP045N10N3G MOSFET OptiMOSª3Power-Transistor,100V TO-220-3 tab Features •N-channel,normallevel •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •175°Coperatingtemperature •Pb-freeleadplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplication •Idealforhigh-frequencyswitchingandsynchronousrectification •Halogen-freeaccordingtoIEC61249-2-21 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 4.5 mΩ ID 137 A Drain Pin 2, Tab Gate Pin 1 Source Pin 3 Type/OrderingCode Package Marking RelatedLinks IPP045N10N3 G PG-TO 220-3 045N10N - 1) J-STD20 and JESD22 Final Data Sheet 1 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Final Data Sheet 2 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 137 105 A TC=25°C1) TC=100°C - 548 A TC=25°C - - 340 mJ ID=100A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 214 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current1) ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 0.7 K/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 K/W - Thermal resistance, junction - ambient, RthJA 6 cm2 cooling area2) - - 50 K/W - Unit Note/TestCondition 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Min. Typ. Max. V(BR)DSS 100 - - V VGS=0V,ID=1mA Gate threshold voltage VGS(th) 2 2.7 3.5 V VDS=VGS,ID=150µA Zero gate voltage drain current IDSS - 0.1 10 1 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 3.9 4.7 4.5 7.7 mΩ VGS=10V,ID=100A VGS=6V,ID=50A Gate resistance RG - 1.4 - Ω - Transconductance gfs 73 145 - S |VDS|>2|ID|RDS(on)max,ID=100A 1) See Diagram 3 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) Final Data Sheet 3 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G Table5Dynamiccharacteristics Parameter Symbol Input capacitance Values Unit Note/TestCondition 8410 pF VGS=0V,VDS=50V,f=1MHz 1210 1610 pF VGS=0V,VDS=50V,f=1MHz - 41 - pF VGS=0V,VDS=50V,f=1MHz td(on) - 27 - ns VDD=50V,VGS=10V,ID=50A, RG=1.6Ω Rise time tr - 59 - ns VDD=50V,VGS=10V,ID=50A, RG=1.6Ω Turn-off delay time td(off) - 48 - ns VDD=50V,VGS=10V,ID=50A, RG=1.6Ω Fall time tf - 14 - ns VDD=50V,VGS=10V,ID=50A, RG=1.6Ω Unit Note/TestCondition Min. Typ. Max. Ciss - 6320 Output capacitance Coss - Reverse transfer capacitance Crss Turn-on delay time Table6Gatechargecharacteristics1) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 30 39 nC VDD=50V,ID=100A,VGS=0to10V Gate to drain charge Qgd - 16 - nC VDD=50V,ID=100A,VGS=0to10V Switching charge Qsw - 27 - nC VDD=50V,ID=100A,VGS=0to10V Gate charge total Qg - 88 117 nC VDD=50V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.7 - V VDD=50V,ID=100A,VGS=0to10V Output charge Qoss - 122 162 nC VDD=50V,VGS=0V Unit Note/TestCondition Table7Reversediode Parameter Symbol Diode continous forward current Values Min. Typ. Max. IS - - 137 A TC=25°C Diode pulse current IS,pulse - - 548 A TC=25°C Diode forward voltage VSD - 1.0 1.2 V VGS=0V,IF=100A,Tj=25°C Reverse recovery time trr - 68 - ns VR=50V,IF=IS,diF/dt=100A/µs Reverse recovery charge Qrr - 135 - nC VR=50V,IF=IS,diF/dt=100A/µs 1) See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 250 140 120 200 100 150 ID[A] Ptot[W] 80 60 100 40 50 20 0 0 50 100 150 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 100 10 1 µs 0.5 10 µs 102 100 µs 0.2 10-1 0.1 0.05 ZthJC[K/W] ID[A] 1 ms 101 10 ms 0.02 0.01 DC 10-2 100 single pulse 10-1 10-1 100 101 102 103 10-3 10-6 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 5 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 400 9 10 V 7.5 V 6V 4.5 V 320 5V 240 RDS(on)[mΩ] 6 ID[A] 5.5 V 160 5V 80 0 6V 7.5 V 10 V 3 4.5 V 0 1 2 3 4 0 5 0 50 VDS[V] 100 150 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 200 200 160 150 gfs[S] ID[A] 120 100 80 25 °C 50 40 175 °C 0 0 2 4 6 8 0 0 VGS[V] 100 150 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 50 gfs=f(ID);Tj=25°C 6 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 10 4.0 3.5 8 3.0 1500 µA 2.5 RDS(on)[mΩ] 6 150 µA VGS(th)[V] 98 % typ 4 2.0 1.5 1.0 2 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 RDS(on)=f(Tj);ID=100A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 10 180 Tj[°C] 103 Ciss 25 °C 25 °C, max 175 °C 175 °C, max Coss 102 IF[A] C[pF] 103 102 101 101 Crss 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 7 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 8 50 V 102 6 VGS[V] IAS[A] 25 °C 100 °C 20 V 80 V 40 60 4 150 °C 1 10 2 100 100 101 102 103 0 0 20 tAV[µs] 80 100 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=100Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 90 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 8 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G 5PackageOutlines Figure1OutlinePG-TO220-3,dimensionsinmm/inches Final Data Sheet 9 Rev.2.9,2017-07-28 OptiMOSª3Power-Transistor,100V IPP045N10N3G RevisionHistory IPP045N10N3 G Revision:2017-07-28,Rev.2.9 Previous Revision Revision Date Subjects (major changes since last revision) 2.9 2017-07-28 Update product current TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 10 Rev.2.9,2017-07-28