Data Sheet No.PD60156-K
IPS511G/IPS512G
FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
Features
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•
•
•
•
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Product Summary
Over temperature protection (with auto-restart)
Short-circuit protection (current limit)
Active clamp
E.S.D protection
Status feedback
Open load detection
Logic ground isolated from power ground
Rds(on)
150mΩ (max)
V clamp
50V
I Limit
5A
V open load
3V
Description
The IPS511G/IPS512G are fully protected five terminal
high side switches with built in short-circuit, over-temperature, ESD protection, inductive load capability
and diagnostic feedback. The output current is controlled when it reaches Ilim value. The current limitation
is activated until the thermal protection acts. The
over-temperature protection turns off the high side
switch if the junction temperature exceeds Tshutdown.
It will automatically restart after the junction has
cooled 7oC below Tshutdown. A diagnostic pin is
provided for status feedback of short-circuit, overtemperature and open load detection. The double
level shifter circuitry allows large offsets between the
logic ground and the load ground.
Truth Table
Typical Connection
Available Package
Op. Conditions
Normal
Normal
Open load
Open load
Over current
Over current
Over-temperature
Over-temperature
In
Out
H
H
L
L
H
H
L
H
H L (limiting)
L
L
H L (cycling)
L
L
Dg
H
L
H
H
L
L
L
L
+ VCC
+ 5v
15K
Status
feedback
Output pull-up resistor
Vcc
Dg
Logic
Rdg
Rin
Logic
signal
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control
Out
In
Gnd
Load
Logic Gnd
Load Gnd
8 Lead SOIC
(Single)
IPS511G
16 Lead SOIC
(Dual)
IPS512G
1
IPS511G/IPS512G
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are referenced to GROUND lead. (Tj = 25oC unless otherwise specified).
Symbol Parameter
Min.
Max.
Vcc-50
Vcc+0.3
Maximum logic ground to load ground offset Vcc-50
Vcc+0.3
Units
Vout
Voffset
Maximum output voltage
Vin
Iin, max
Maximum Input voltage
-5
10
Vdg
Idg, max
Maximum diagnostic output voltage
-0.3
5.5
V
Maximum diagnostic output current
-1
10
mA
Isd cont.
Diode max. continuous current (1)
-0.3
Maximum IN current
(IPS511G)
—
1.4
—
0.8
Isd pulsed Diode max. pulsed current (1)
—
10
ESD1
—
4000
ESD2
Electrostatic discharge voltage (Machine Model)
—
500
Pd
Maximum power dissipation
(rth=125oC/W) IPS511G
—
1
—
1.5
(rth=85oC/W,
both legs on) IPS512G
V
5.5
(per leg/both legs ON - IPS512G)
Electrostatic discharge voltage (Human Body)
Test Conditions
mA
A
C=100pF, R=1500Ω,
V
C=200pF, R=0Ω, L=10µH
W
o
Tj max.
Max. storage & operating junction temp.
-40
+150
Vvv max
Maximum Vcc voltage
—
50
Min.
Typ.
—
—
&
a
a
—
85
—
—
100
—
—
#
—
C
V
Thermal Characteristics
Symbol Parameter
Rth1
Rth2
Rth1
Thermal resistance with standard footprint
Thermal resistance with 1" square footprint
Thermal resistance with standard footprint
(2 mos on)
(2 mosfets on)
Rth2 (1) Thermal resistance with standard footprint
(1 mos on)
(1 mosfet on)
Rth2
Thermal resistance with 1" square footprint
(2 mos on)
(2 mosfets on)
Max. Units Test Conditions
8 Lead SOIC
o
C/W
16 Lead SOIC
(1) Limited by junction temperature (pulsed current limited also by internal wiring)
2
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IPS511G/IPS512G
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter
Min.
Max.
Vcc
VIH
VIL
Iout
5.5
4
-0.3
35
5.5
0.9
—
1.4
—
4
10
1.0
6
20
Continuous Vcc voltage
High level input voltage
Low level input voltage
Continuous output current
Tamb=85 oC
(TAmbient = 85oC, Tj = 125oC, rth = 100oC/W) IPS511G
Iout
Continuous output current per leg
Tamb=85 oC
(TAmbient = 85oC, Tj = 125oC Rth = 85oC/W both legs on) IPS512G
Rin
Recommended resistor in series with IN pin
Rdg
Recommended resistor in series with DG pin
Units
V
A
kΩ
Static Electrical Characteristics
(Tj = 25oC, Vcc = 14V unless otherwise specified.)
Symbol Parameter
Min.
Typ.
ON state resistance Tj = 25oC
—
130
150
ON state resistance @ Vcc = 6V
—
130
150
ON state resistance Tj = 150oC
—
220
—
Vcc oper.
V clamp 1
V clamp 2
Vf
Icc off
Icc on
Icc ac
Vdgl
Iol
Iol
Idg
Operating voltage range
Vcc to OUT clamp voltage 1
Vcc to OUT clamp voltage 2
Body diode forward voltage
Supply current when OFF
Supply current when ON
Ripple current when ON (AC RMS)
Low level diagnostic output voltage
Output leakage current
Output leakage current
5.5
50
—
—
—
—
—
—
—
0
—
56
58
0.9
16
0.7
35
—
65
1.2
50
2
—
0.4
120
25
leakage
Diagnostic output leakage current
IN high threshold voltage
IN low threshold voltage
On state IN positive current
Input hysteresis
—
—
—
1
—
0.1
2.3
2
70
0.25
Rds(on)
Max. Units Test Conditions
Vin = 5V, Iout = 2.5A
@Tj=25o C
Rds(on)
(V cc=6V)
Rds(on)
mΩ
Vin = 5V, Iout = 1A
Vin = 5V, Iout = 2.5A
@Tj=150oC
Vih
Vil
Iin, on
In, hyst.
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20
0.15
60
—
10
2.5
—
200
0.5
V
µA
mA
µA
V
µA
Id = 10mA (see Fig.1 & 2)
Id = Isd (see Fig.1 & 2)
Id = 2.5A, Vin = 0V
Vin = 0V, Vout = 0V
Vin = 5V
Vin = 5V
Idg = 1.6 mA
Vout = 6V
Vout = 0V
Vdg = 5.5V
V
µA
V
Vin = 5V
3
IPS511G/IPS512G
Switching Electrical Characteristics
Vcc = 14V, Resistive Load = 5.6Ω, Tj = 25oC, (unless otherwise specified).
Symbol Parameter
Min.
Tdon
Tr1
Tr2
Turn-on delay time
Rise time to Vout = Vcc - 5V
Rise time from the end of TR1 to
Vout = 90% of Vcc
dV/dt (on) Turn ON dV/dt
E on
Turn ON energy
Tdoff
Turn-off delay time
Tf
Fall time to Vout = 10% of Vcc
dV/dt (off) Turn OFF dV/dt
Eoff
Turn OFF energy
Tdiag
Vout to Vdiag propagation delay
Typ. Max. Units Test Conditions
—
—
7
10
—
—
—
—
—
—
—
—
45
1.3
400
15
10
2
80
5
Min.
Typ.
3
—
—
2
2
5
165
158
3
3
50
50
95
4
—
50
50
6
—
15
µs
V/µs
µJ
µs
See figure 3
See figure 4
V/µs
µJ
µs
Protection Characteristics
Symbol Parameter
Ilim
Internal current limit
Tsd+
Over-temp. positive going threshold
TsdOver-temp. negative going threshold
Vsc
Short-circuit detection voltage (3)
Vopen load Open load detection threshold
Max. Units Test Conditions
7
—
—
4
4
A
oC
oC
V
V
Vout = 0V
See fig. 2
See fig. 2
See fig. 2
(3) Referenced to Vcc
Lead Assignments
Vcc Vcc Vcc Vcc
In1 Gnd1 Vcc Vcc Vcc Vcc Out2 Dg2
1
GND IN
1
DG OUT
Dg1 Out1 Vcc Vcc Vcc Vcc Gnd2 In2
8 Lead SOIC
16 Lead SOIC
IPS512G
IPS511G
Part Number
4
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IPS511G/IPS512G
Functional Block Diagram
All values are typical
VCC
Under voltage
lock out
50V
Over
temperature
165°C
158°C
Tj
Charge
pump
62 V
2.7 V
IN
Level
shift
2.2 V
7 V
200 KΩ
driver
-
DG
Current
limit
+
5A
7 V
40Ω
3V
+
-
+
Open load
Short-circuit
GND
T clamp
-
3V
VOUT
Vin
5V
0V
Vin
Iout
limiting
T shutdown
cycling
Ilim.
Iout
( + Vcc )
T
0V
Out
V clamp
Tsd+
Tsd(160 ° )
( see Appl . Notes to evaluate power dissipation )
Figure 1 - Active clamp waveforms
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Figure 2 - Protection timing diagram
5
IPS511G/IPS512G
Vin
Vcc
90%
Vin
Vcc - 5V
Vout
90%
dV/dt on
10%
dV/dt off
Td on
Vout
Tr 1
Tr 2
E1(t)
10%
Iout1
Eon1
Td off
Iout2
Resistive load
Tf
E2 (t)
Inductive load
Eon2
Figure 4 - Switching times definition (turn-off)
Figure 3 - Switching times definition (turn-on)
Turn on energy with a resistive or an
inductive load
V in
Dg Vcc
IN
Vcc
Vcc -Vsc
Out
+
Gnd
L
Vin
14 V
V o ut
Vout
Vol
R
V d ia g
5v
0v
Iout
Diag off blanking
Diag on blanking
Rem :
V load is negative during demagnetization
Figure 5 - Active clamp test circuit
6
T diag
Figure 6 - Diagnostic delay definitions
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IPS511G/IPS512G
150
2 00 %
100
1 50 %
50
1 00 %
0
0
5
10
15
20
25
30
5 0%
35
-5 0
0
50
100
150
Figure 8 - Normalized Rds(on) Vs Tj (oC)
Figure 7 - Rds(on) (mΩ) Vs Vcc (V)
10
150
100
1
50
0.1
0
0
1
2
3
4
Figure 9 - Rds(on) (mΩ) Vs Iout (A)
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5
Figure 10 - Max. Iout (A) Vs Load Inductance (uH)
7
IPS511G/IPS512G
5
5
4
4
1inch² footprint
Rthja= 60°C/W
3
3
Standard footprint
one leg on
2
2
Standard footprint
Rth=100°C/W
1
1
0
Standard footprint
both legs on
0
25
50
75
100
125
150
25
Figure 11a - Max load current (A) Vs Tamb (oC)
IPS511G
50
75
100
125
150
Figure 11b - Max load current (A) Vs Tamb (oC)
IPS512G
6
10 0
5
10
4
3
1
2
0,1
1
Figure 12 - Transient Thermal Impedance (oC/W)
Vs Time (S) - IPS511G/IPS512G
8
1E+03
1E+02
1E+01
1E+00
1E-01
1E-02
1E-03
1E-04
1E-05
0,01
0
-50
0
50
100
150
Figure 13 - Ilim (A) Vs Tj (oC)
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IPS511G/IPS512G
Resistive load
600
10000
1000
I=Imax vs Induct.(see fig.10)
Eon
400
Eoff
100
I=1.5A
10
200
1
Figure 14 - Eon, Eoff (µJ) vs I (A)
1E+06
1E+05
0.1
3
1E+04
2
1E+03
1
1E+02
0
1E+01
0
Figure 15 - Eon (µJ) Vs Load Inductance (µH)
(see Fig. 3)
1.00E-03
150
125
Diag on blanking
100
1.00E-04
75
50
1.00E-05
25
Diag off blanking
0
1.00E-06
0
1
2
Figure 16 - Diag Blanking time (µS) Vs Iout (A)
(resistive load - see Fig. 6)
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3
0
5
10
15
20
25
30
35
Figure 17 - Icc (mA) Vs Vcc (V)
9
IPS511G/IPS512G
Case Outline - IPS511G
8 Lead SOIC
10
(MS-012AA) 01-0021 09
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IPS511G/IPS512G
Case Outline
16 Lead SOIC (narrow body)
01-3064 00
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd., Whyteleafe, Surrey CR3 0BL, United Kingdom
Tel: ++ 44 (0) 20 8645 8000
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan 171-0021 Tel: 8133 983 0086
IR HONG KONG: Unit 308, #F, New East Ocean Centre, No. 9 Science Museum Road, Tsimshatsui East, Kowloon
Hong Kong Tel: (852) 2803-7380
Data and specifications subject to change without notice. 5/9/2000
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11
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