IPT020N10N5ATMA1

IPT020N10N5 MOSFET OptiMOSTM5Power-Transistor,100V HSOF Features Tab •Idealforhighfrequencyswitchingandsync.rec. •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 12 34 56 78 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Drain Tab Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 2.0 mΩ ID 260 A Qoss 155 nC QG(0V..10V) 122 nC Type/OrderingCode Package IPT020N10N5 PG-HSOF-8 Final Data Sheet Gate Pin 1 Source Pin 2-8 Marking 020N10N5 1 RelatedLinks - Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 260 184 31 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TA=25°C, RTHJA=40°C/W1) - 1039 A TA=25°C - - 406 - ID=150A,RGS=25Ω VGS -20 - 20 - - Power dissipation Ptot - - 273 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Continuous drain current Pulsed drain current2) 3) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.33 0.55 °C/W - Device on PCB, minimal footprint RthJA - - 62 °C/W - Device on PCB, 6 cm² cooling area1) RthJA - - 40 °C/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3.0 3.8 V VDS=VGS,ID=202µA - 0.1 10 5 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 1.6 2.0 2.0 2.7 mΩ VGS=10V,ID=150A VGS=6V,ID=75A Gate resistance1) RG - 1.2 1.8 Ω - Transconductance gfs 120 240 - S |VDS|≥2|ID|RDS(on)max,ID=100A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 8700 11000 pF VGS=0V,VDS=50V,f=1MHz Coss - 1300 1700 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 58 100 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 20 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.8Ω Rise time tr - 13 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.8Ω Turn-off delay time td(off) - 49 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.8Ω Fall time tf - 17 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.8Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 39 - nC VDD=50V,ID=100A,VGS=0to10V Qg(th) - 26 - nC VDD=50V,ID=100A,VGS=0to10V Gate to drain charge Qgd - 25 37 nC VDD=50V,ID=100A,VGS=0to10V Switching charge Qsw - 38 - nC VDD=50V,ID=100A,VGS=0to10V Gate charge total Qg - 122 152 nC VDD=50V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.5 - V VDD=50V,ID=100A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 106 - nC VDS=0.1V,VGS=0to10V Qoss - 155 207 nC VDS=50V,VGS=0V 1) 1) 2) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 198 A TC=25°C - 1039 A TC=25°C - 0.86 1.2 V VGS=0V,IF=100A,Tj=25°C trr - 56 112 ns VR=50V,IF=100A,diF/dt=100A/µs Qrr - 96 192 nC VR=50V,IF=100A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 4Electricalcharacteristicsdiagrams Diagram2:Draincurrent 280 280 240 240 200 200 160 160 ID[A] Ptot[W] Diagram1:Powerdissipation 120 120 80 80 40 40 0 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 4 100 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 103 1 µs 10 µs 102 10 ms 100 µs 101 ZthJC[K/W] ID[A] DC 1 ms 10-1 100 10-1 10-2 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 1200 5 10 V 8V 7V 1000 4 4.5 V 5V 600 RDS(on)[mΩ] ID[A] 800 6V 3 6V 2 7V 8V 400 10 V 1 200 0 5V 4.5 V 0 1 2 3 4 0 5 0 100 200 300 VDS[V] 400 500 ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 1200 5 25 °C 175 °C 1000 4 175 °C RDS(on)[mΩ] ID[A] 800 600 3 2 400 25 °C 1 200 0 600 ID[A] 0 1 2 3 4 5 6 7 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=150A;parameter:Tj 7 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 Diagram9:Normalizeddrain-sourceonresistance Diagram10:Typ.gatethresholdvoltage 2.4 4.0 3.5 2.0 1.6 2.5 VGS(th)[V] RDS(on)(normalizedto25°C) 3.0 1.2 2.0 2020 µA 1.5 202 µA 0.8 1.0 0.4 0.5 0.0 -80 -40 0 40 80 120 160 0.0 -80 200 -40 0 40 Tj[°C] 80 120 160 200 Tj[°C] RDS(on)=f(Tj),ID=150A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 104 10 25 °C 25 °C, max 175 °C 175 °C, max 104 Ciss 103 Coss IF[A] C[pF] 103 102 102 Crss 101 0 20 40 60 80 100 101 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 20 V 50 V 80 V 8 102 6 VGS[V] IAV[A] 25 °C 4 1 10 100 °C 2 150 °C 100 100 101 102 103 tAV[µs] 0 0 25 50 75 100 125 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=100Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 108 106 VBR(DSS)[V] 104 102 100 98 96 -80 -40 0 40 80 120 160 200 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 5PackageOutlines 1) partially covered with Mold Flash DIM A b b1 b2 c D D2 E E1 E4 E5 e H H1 H2 H3 H4 N K1 L L1 L2 L4 MILLIMETERS MIN MAX 2.20 2.40 0.70 0.90 9.70 9.90 0.42 0.50 0.40 0.60 10.28 10.58 3.30 9.70 10.10 7.50 8.50 9.46 1.20 (BSC) 11.48 6.55 11.88 6.75 INCHES MIN 0.087 0.028 0.382 0.017 0.016 0.405 0.295 0.335 0.372 0.047 (BSC) 0.452 0.258 2 0 2 4mm EUROPEAN PROJECTION 0.083 ISSUE DATE 20-02-2014 0.051 REVISION 02 0.028 0.024 1.30 0 SCALE 0.468 0.266 0.063 0.70 0.60 1.00 0.398 0.281 0.141 0.128 8 0.165 2.10 DOCUMENT NO. Z8B00169619 0.130 0.382 7.15 3.59 3.26 8 4.18 1.60 MAX 0.094 0.035 0.390 0.020 0.024 0.416 0.039 Figure1OutlinePG-HSOF-8,dimensionsinmm/inches Final Data Sheet 10 Rev.2.0,2019-03-26 OptiMOSTM5Power-Transistor,100V IPT020N10N5 RevisionHistory IPT020N10N5 Revision:2019-03-26,Rev.2.0 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2019-03-26 Release of final version Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2018InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). 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Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.0,2019-03-26