IPTC011N08NM5
MOSFET
OptiMOSTM5Power-Transistor,80V
PG-HDSOP-16
16
Features
16
9
9
•N-channel
•Verylowon-resistanceRDS(on)
•Superiorthermalresistance
•100%avalanchetested
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
1
8
8
1
Productvalidation
FullyqualifiedaccordingtoJEDECforIndustrialApplications
Drain
Pin 9-16, Tab
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
80
V
RDS(on),max
1.1
mΩ
ID
408
A
Qoss
207
nC
QG
178
nC
Gate
Pin 8
Source
Pin 1-7
Type/OrderingCode
Package
IPTC011N08NM5
PG-HDSOP-16
Final Data Sheet
1
Marking
RelatedLinks
11N08NM5
-
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Final Data Sheet
2
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Values
Unit
Note/TestCondition
408
295
237
42
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=6V,TC=100°C
VGS=10V,TA=25°C,RthJA=40°C/W2)
-
1632
A
TA=25°C
-
-
817
mJ
ID=150A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
375
3.8
W
TC=25°C
TA=25°C,RthJA=40°C/W2)
Operating and storage temperature
Tj,Tstg
-55
-
175
°C
IEC climatic category; DIN IEC 68-1:
55/175/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
ID,pulse
-
Avalanche energy, single pulse
EAS
Gate source voltage
1)
Continuous drain current
Pulsed drain current3)
4)
2Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case
Values
Min.
Typ.
Max.
RthJC
-
0.2
0.4
°C/W -
Thermal resistance, junction - ambient,
RthJA
6 cm² cooling area2)
-
-
40
°C/W -
Thermal resistance, junction - ambient,
RthJA
minimal footprint
-
-
62
°C/W -
1)
Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3)
See Diagram 3 for more detailed information
4)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3.0
3.8
V
VDS=VGS,ID=280µA
-
0.1
10
1.0
100
µA
VDS=80V,VGS=0V,Tj=25°C
VDS=80V,VGS=0V,Tj=125°C
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
1.0
1.3
1.1
1.7
mΩ
VGS=10V,ID=150A
VGS=6V,ID=75A
Gate resistance1)
RG
-
1.6
2.4
Ω
-
Transconductance
gfs
120
270
-
S
|VDS|≥2|ID|RDS(on)max,ID=100A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
80
-
Gate threshold voltage
VGS(th)
2.2
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Input capacitance1)
Values
Min.
Typ.
Ciss
-
13000 17000 pF
VGS=0V,VDS=40V,f=1MHz
Coss
-
2000
2600
pF
VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance
Crss
-
86
150
pF
VGS=0V,VDS=40V,f=1MHz
Turn-on delay time
td(on)
-
35
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Rise time
tr
-
31
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
82
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Fall time
tf
-
30
-
ns
VDD=40V,VGS=10V,ID=100A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Output capacitance1)
1)
Max.
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Gate charge at threshold
Values
Min.
Typ.
Max.
Qgs
-
55
-
nC
VDD=40V,ID=100A,VGS=0to10V
Qg(th)
-
37
-
nC
VDD=40V,ID=100A,VGS=0to10V
Gate to drain charge
Qgd
-
37
56
nC
VDD=40V,ID=100A,VGS=0to10V
Switching charge
Qsw
-
55
-
nC
VDD=40V,ID=100A,VGS=0to10V
Gate charge total
Qg
-
178
223
nC
VDD=40V,ID=100A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.4
-
V
VDD=40V,ID=100A,VGS=0to10V
Output charge1)
Qoss
-
207
275
nC
VDS=40V,VGS=0V
1)
1)
1)
2)
Defined by design. Not subject to production test.
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
320
A
TC=25°C
-
1632
A
TC=25°C
-
0.88
1.0
V
VGS=0V,IF=150A,Tj=25°C
trr
-
106
212
ns
VR=40V,IF=100A,diF/dt=100A/µs
Qrr
-
318
636
nC
VR=40V,IF=100A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
400
500
350
400
300
300
ID[A]
Ptot[W]
250
200
200
150
100
100
50
0
0
25
50
75
100
125
150
175
0
200
0
25
50
75
TC[°C]
100
125
150
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
4
200
101
10
1 µs
103
10 µs
102
100
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
100 µs
ZthJC[K/W]
ID[A]
175
TC[°C]
DC
101
1 ms
10-1
10 ms
100
10-2
10-1
10-2
10-1
100
101
102
10-3
10-6
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
1750
3.0
10 V
8V
7V
1500
2.5
4.5 V
1250
2.0
6V
ID[A]
6V
750
RDS(on)[mΩ]
5V
1000
1.5
7V
8V
1.0
500
10 V
0.5
5V
250
4.5 V
0
0
1
2
3
4
0.0
5
0
200
400
VDS[V]
600
800
1000
ID[A]
ID=f(VDS),Tj=25°C;parameter:VGS
RDS(on)=f(ID),Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.drain-sourceonresistance
1600
3.0
2.5
1200
RDS(on)[mΩ]
ID[A]
2.0
800
175 °C
1.5
1.0
25 °C
400
0.5
175 °C
25 °C
0
0
1
2
3
4
5
6
7
VGS[V]
0
3
6
9
12
15
VGS[V]
ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
0.0
RDS(on)=f(VGS),ID=150A;parameter:Tj
7
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
Diagram9:Normalizeddrain-sourceonresistance
Diagram10:Typ.gatethresholdvoltage
2.0
4.0
3.5
3.0
2800 µA
2.5
1.2
VGS(th)[V]
RDS(on)(normalizedto25°C)
1.6
0.8
2.0
280 µA
1.5
1.0
0.4
0.5
0.0
-75
-50
-25
0
25
50
75
0.0
-75
100 125 150 175 200
-50
-25
0
Tj[°C]
25
50
75
100 125 150 175 200
Tj[°C]
RDS(on)=f(Tj),ID=150A,VGS=10V
VGS(th)=f(Tj),VGS=VDS;parameter:ID
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
5
104
10
25 °C
25 °C, max
175 °C
175 °C, max
104
Ciss
Coss
IF[A]
C[pF]
103
103
102
102
Crss
101
0
10
20
30
40
50
60
70
80
101
0.00
0.25
0.50
VDS[V]
1.00
1.25
1.50
1.75
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
0.75
IF=f(VSD);parameter:Tj
8
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
3
10
10
16 V
40 V
64 V
8
102
6
VGS[V]
IAV[A]
25 °C
100 °C
4
150 °C
1
10
2
100
100
101
102
103
tAV[µs]
0
0
25
50
75
100
125
150
175
200
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj,start
VGS=f(Qgate),ID=100Apulsed,Tj=25°C;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Diagram Gate charge waveforms
88
86
VBR(DSS)[V]
84
82
80
78
76
-75
-50
-25
0
25
50
75
100 125 150 175 200
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
5PackageOutlines
PACKAGE - GROUP
NUMBER:
REVISION: 01
DIMENSIONS
A
A1
b
c
D
D1
E
E1
E2
e
e1
L
P
PG-HDSOP-16-U01
DATE: 18.12.2020
MILLIMETERS
MIN.
MAX.
2.25
2.35
0.01
0.16
0.60
0.80
0.40
0.60
9.70
10.10
8.20
8.40
14.80
15.20
10.00
10.30
5.57
5.77
1.20
8.40
1.40
1.60
2.90
3.10
Figure1OutlinePG-HDSOP-16,dimensionsinmm
Final Data Sheet
10
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
0.8
16×
0.8
16×
3.375
16×
0.6
1.75
7
7.187
1.75
7.187
3.375
16×
1.2
14×
Pin1
Solder mask
clearance
1.2
14×
0.6
10.2
copper
solder mask
stencil apertures
Based on stencil thickness 0.20 mm
All dimensions are in units mm
Figure2OutlineFootprint(PG-HDSOP-16),dimensionsinmm
Final Data Sheet
11
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
12
0.3
24
15.65
4
2.85
10.3
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1 [
]
Figure3OutlineTape(PG-HDSOP-16),dimensionsinmm
Final Data Sheet
12
Rev.2.0,2022-05-24
OptiMOSTM5Power-Transistor,80V
IPTC011N08NM5
RevisionHistory
IPTC011N08NM5
Revision:2022-05-24,Rev.2.0
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2022-05-24
Release of final version
Trademarks
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Final Data Sheet
13
Rev.2.0,2022-05-24