IPTC054N15NM5ATMA1

IPTC054N15NM5 MOSFET OptiMOSTM5Power-Transistor,150V PG-HDSOP-16 16 Features 16 9 9 •N-channel,normallevel •Verylowon-resistanceRDS(on) •Superiorthermalresistance •100%avalanchetested •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 1 8 8 1 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Drain Pin 9-16, Tab Table1KeyPerformanceParameters Parameter Value Unit VDS 150 V RDS(on),max 5.4 mΩ ID 143 A Qoss 163 nC QG 58 nC Gate Pin 8 Source Pin 1-7 Type/OrderingCode Package IPTC054N15NM5 PG-HDSOP-16 Final Data Sheet 1 Marking RelatedLinks 054N15N5 - Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Final Data Sheet 2 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 143 101 96 17.5 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=8V,TC=100°C VGS=10V,TA=25°C,RthJA=40°C/W2) - 572 A TA=25°C - - 211 mJ ID=100A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 250 3.8 W TC=25°C TA=25°C,RthJA=40°C/W2) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 1) Continuous drain current Pulsed drain current3) 4) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 0.6 °C/W - Thermal resistance, junction - ambient, RthJA 6 cm² cooling area2) - - 40 °C/W - Thermal resistance, junction - ambient, RthJA minimum footprint - - 62 °C/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3.8 4.6 V VDS=VGS,ID=191µA - 0.1 10 1.0 100 µA VDS=120V,VGS=0V,Tj=25°C VDS=120V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 4.4 4.9 5.4 6.0 mΩ VGS=10V,ID=50A VGS=8V,ID=25A Gate resistance1) RG - 0.9 1.2 Ω - Transconductance gfs - 95 - S |VDS|≥2|ID|RDS(on)max,ID=50A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 150 - Gate threshold voltage VGS(th) 3.0 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 4400 5700 pF VGS=0V,VDS=75V,f=1MHz Coss - 1100 1600 pF VGS=0V,VDS=75V,f=1MHz Reverse transfer capacitance Crss - 25 44 pF VGS=0V,VDS=75V,f=1MHz Turn-on delay time td(on) - 16 - ns VDD=75V,VGS=10V,ID=50A, RG,ext=1.6Ω Rise time tr - 5.0 - ns VDD=75V,VGS=10V,ID=50A, RG,ext=1.6Ω Turn-off delay time td(off) - 21 - ns VDD=75V,VGS=10V,ID=50A, RG,ext=1.6Ω Fall time tf - 5.0 - ns VDD=75V,VGS=10V,ID=50A, RG,ext=1.6Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 24 - nC VDD=75V,ID=50A,VGS=0to10V Qg(th) - 16.6 - nC VDD=75V,ID=50A,VGS=0to10V Gate to drain charge Qgd - 12 18 nC VDD=75V,ID=50A,VGS=0to10V Switching charge Qsw - 19 - nC VDD=75V,ID=50A,VGS=0to10V Gate charge total Qg - 58 73 nC VDD=75V,ID=50A,VGS=0to10V Gate plateau voltage Vplateau - 5.5 - V VDD=75V,ID=50A,VGS=0to10V Output charge1) Qoss - 163 217 nC VDS=75V,VGS=0V 1) 1) 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 143 A TC=25°C - 572 A TC=25°C - 0.83 1.0 V VGS=0V,IF=50A,Tj=25°C trr - 48 96 ns VR=75V,IF=50A,diF/dt=100A/µs Qrr - 61 121 nC VR=75V,IF=50A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 280 150 240 125 200 160 ID[A] Ptot[W] 100 75 120 50 80 25 40 0 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 1 µs 10 µs 102 1 ms 100 100 µs ZthJC[K/W] ID[A] 101 10 ms 100 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 10-1 10-2 DC -1 10 10-2 100 101 102 103 10-3 10-6 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 600 14 10 V 8V 6V 12 500 7V 10 RDS(on)[mΩ] ID[A] 400 7V 300 8 8V 6 200 4 10 V 6V 100 2 5V 0 4.5 V 0 1 2 3 4 0 5 0 50 100 150 VDS[V] 200 250 300 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 280 14 240 12 200 10 160 8 ID[A] RDS(on)[mΩ] 175 °C 120 80 6 4 25 °C 40 2 175 °C 0 0 1 2 3 4 25 °C 5 6 7 VGS[V] 5 7 9 11 13 15 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0 RDS(on)=f(VGS),ID=50A;parameter:Tj 7 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 Diagram9:Normalizeddrain-sourceonresistance Diagram10:Typ.gatethresholdvoltage 2.4 5 4 1910 µA 1.6 3 VGS(th)[V] RDS(on)(normalizedto25°C) 2.0 1.2 191 µA 2 0.8 1 0.4 0.0 -75 -50 -25 0 25 50 75 0 -75 100 125 150 175 200 -50 -25 0 Tj[°C] 25 50 75 100 125 150 175 200 Tj[°C] RDS(on)=f(Tj),ID=50A,VGS=10V VGS(th)=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss 103 102 IF[A] C[pF] Coss 102 101 Crss 101 0 25 50 75 100 125 150 100 0.00 0.25 0.50 VDS[V] 1.00 1.25 1.50 1.75 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.75 IF=f(VSD);parameter:Tj 8 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 30 V 75 V 120 V 8 102 25 °C 101 VGS[V] IAV[A] 6 100 °C 4 150 °C 100 2 10-1 10-1 100 101 102 103 tAV[µs] 0 0 10 20 30 40 50 60 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=50Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 160 158 156 VBR(DSS)[V] 154 152 150 148 146 144 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 5PackageOutlines PACKAGE - GROUP NUMBER: REVISION: 01 DIMENSIONS A A1 b c D D1 E E1 E2 e e1 L P PG-HDSOP-16-U01 DATE: 18.12.2020 MILLIMETERS MIN. MAX. 2.25 2.35 0.01 0.16 0.60 0.80 0.40 0.60 9.70 10.10 8.20 8.40 14.80 15.20 10.00 10.30 5.57 5.77 1.20 8.40 1.40 1.60 2.90 3.10 Figure1OutlinePG-HDSOP-16,dimensionsinmm Final Data Sheet 10 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 0.8 16× 0.8 16× 3.375 16× 0.6 1.75 7 7.187 1.75 7.187 3.375 16× 1.2 14× Pin1 Solder mask clearance 1.2 14× 0.6 10.2 copper solder mask stencil apertures Based on stencil thickness 0.20 mm All dimensions are in units mm Figure2OutlineFootprint(PG-HDSOP-16),dimensionsinmm Final Data Sheet 11 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 12 0.3 24 15.65 4 2.85 10.3 All dimensions are in units mm The drawing is in compliance with ISO 128-30, Projection Method 1 [ ] Figure3OutlineTape(PG-HDSOP-16),dimensionsinmm Final Data Sheet 12 Rev.2.1,2023-03-08 OptiMOSTM5Power-Transistor,150V IPTC054N15NM5 RevisionHistory IPTC054N15NM5 Revision:2023-03-08,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2022-05-05 Release of final version 2.1 2023-03-08 Update Coss max Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 13 Rev.2.1,2023-03-08