IQE065N10NM5CGATMA1

IQE065N10NM5 MOSFET OptiMOSTM5Power-Transistor,100V PG-TSON-8-4 Features 5 •OptimizedforhighperformanceSMPS,e.g.sync.rec. •100%avalanchetested •Superiorthermalresistance •N-channel •Pb-freeleadplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 Pin 1 2 4 3 4 3 2 6 7 8 1 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Drain Pin 5-8 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 6.5 mΩ ID 85 A Qoss 40 nC QG(0V..10V) 34 nC Gate Pin 4 Source Pin 1-3 Type/OrderingCode Package Marking RelatedLinks IQE065N10NM5 PG-TSON-8-4 06510N5 - Final Data Sheet 1 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Final Data Sheet 2 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current1) Values Unit Note/TestCondition 85 60 14 A VGS=10V,TC=25°C VGS=10V,TC=100°C VGS=10V,TA=25°C,RthJA=60°C/W2) - 341 A TA=25°C - - 147 mJ ID=20A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 100 2.5 W TC=25°C TA=25°C,RthJA=60°C/W3) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current3) ID,pulse - Avalanche energy, single pulse4) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Device on PCB, 6 cm² cooling area2) Values Min. Typ. Max. RthJC - 0.8 1.5 °C/W - RthJA - - 60 °C/W - 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information 4) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3.0 3.8 V VDS=VGS,ID=48µA - 0.1 10 1.0 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 10 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 5.7 7.2 6.5 11 mΩ VGS=10V,ID=20A VGS=6V,ID=10A Gate resistance RG - 0.6 - Ω - Transconductance gfs - 55 - S |VDS|≥2|ID|RDS(on)max,ID=20A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Input capacitance1) Values Min. Typ. Max. Ciss - 2300 3000 pF VGS=0V,VDS=50V,f=1MHz Coss - 340 440 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 18 32 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 8.9 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Rise time tr - 3.8 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Turn-off delay time td(off) - 21.1 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Fall time tf - 7.5 - ns VDD=50V,VGS=10V,ID=20A, RG,ext=3Ω Unit Note/TestCondition Output capacitance1) 1) Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Gate charge at threshold Values Min. Typ. Max. Qgs - 10.1 - nC VDD=50V,ID=20A,VGS=0to10V Qg(th) - 6.8 - nC VDD=50V,ID=20A,VGS=0to10V Gate to drain charge Qgd - 7.4 11 nC VDD=50V,ID=20A,VGS=0to10V Switching charge Qsw - 10.7 - nC VDD=50V,ID=20A,VGS=0to10V Gate charge total Qg - 34 42 nC VDD=50V,ID=20A,VGS=0to10V Gate plateau voltage Vplateau - 4.4 - V VDD=50V,ID=20A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 29 - nC VDS=0.1V,VGS=0to10V Qoss - 40 54 nC VDS=50V,VGS=0V 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 Table7Reversediode Parameter Symbol Diode continuous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 74 A TC=25°C - 341 A TC=25°C - 0.83 1.1 V VGS=0V,IF=20A,Tj=25°C trr - 36 72 ns VR=50V,IF=20A,diF/dt=100A/µs Qrr - 40 80 nC VR=50V,IF=20A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 120 100 100 80 80 ID[A] Ptot[W] 60 60 40 40 20 20 0 0 25 50 75 100 125 150 175 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 single pulse 0.01 0.02 0.05 0.1 0.2 0.5 1 µs 102 10 µs 10 ms 100 µs 101 100 ID[A] ZthJC[K/W] 1 ms 100 DC 10-1 10-1 10-2 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 350 20.0 17.5 300 10 V 5V 4.5 V 7V 8V 15.0 250 ID[A] 6V 150 RDS(on)[mΩ] 12.5 200 10.0 6V 7.5 7V 8V 100 5.0 50 5V 10 V 2.5 4.5 V 0 0 1 2 3 4 0.0 5 0 25 50 75 VDS[V] 100 125 150 175 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 350 20.0 17.5 300 15.0 250 175 °C 12.5 ID[A] RDS(on)[mΩ] 200 150 10.0 7.5 25 °C 100 5.0 175 °C 50 2.5 25 °C 0 0 1 2 3 4 5 6 7 VGS[V] 0 2 4 6 8 10 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0.0 RDS(on)=f(VGS),ID=20A;parameter:Tj 7 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 Diagram9:Normalizeddrain-sourceonresistance Diagram10:Typ.gatethresholdvoltage 2.4 4.0 3.5 3.0 1.6 2.5 VGS(th)[V] RDS(on)(normalizedto25°C) 2.0 1.2 2.0 480 µA 1.5 48 µA 0.8 1.0 0.4 0.5 0.0 -80 -40 0 40 80 120 160 0.0 -80 200 -40 0 40 Tj[°C] 80 120 160 200 Tj[°C] RDS(on)=f(Tj),ID=20A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss IF[A] 102 C[pF] 103 Coss 102 101 101 Crss 0 20 40 60 80 100 100 0.00 0.25 VDS[V] 0.75 1.00 1.25 1.50 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.50 IF=f(VSD);parameter:Tj 8 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 20 V 50 V 80 V 8 25 °C 101 6 VGS[V] IAV[A] 100 °C 150 °C 4 0 10 2 10-1 100 101 102 103 tAV[µs] 0 0 5 10 15 20 25 30 35 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=20Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 108 106 VBR(DSS)[V] 104 102 100 98 96 94 -80 -40 0 40 80 120 160 200 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 5PackageOutlines DIMENSION A A1 b c D D1 E e L L1 L2 L3 L4 L5 L6 MILLIMETERS MIN. MAX. 1.10 0.05 0.20 0.40 0.20 3.30 2.31 2.51 3.30 0.65 0.35 0.55 0.10 0.30 0.40 0.60 1.35 1.55 0.26 0.46 0.84 1.04 0.77 0.97 DOCUMENT NO. Z8B00198723 REVISION 01 SCALE 10:1 0 2mm 1 EUROPEAN PROJECTION ISSUE DATE 06.11.2019 Figure1OutlinePG-TSON-8-4,dimensionsinmm Final Data Sheet 10 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 1.23 0.975 0.35 7x 1.15 0.615 0.22 2x 0.4 1.59 2x 1.06 2x 0.35 Pin 1 0.372 0.65 6x 1.65 1.01 0.45 2x 0.35 2x 0.05 0.53 0.43 0.35 4x 1.1 4x 0.54 3x 0.65 6x 1.01 1.605 1.14 0.675 Pin 1 1.235 1.675 1.015 0.655 0.8 0.45 0.595 1.225 1.1 0.3 9x 0.08 0.975 copper solder mask stencil apertures All dimensions are in units mm Figure2OutlineBoardpad(PG-TSON-8-4) Final Data Sheet 11 Rev.2.1,2021-12-01 OptiMOSTM5Power-Transistor,100V IQE065N10NM5 RevisionHistory IQE065N10NM5 Revision:2021-12-01,Rev.2.1 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2021-04-27 Release of final version 2.1 2021-12-01 Update "Marking" and Gate resistance Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 12 Rev.2.1,2021-12-01