IR11688STRPBF

SMPS IC SmartrectifierTM IR11688S DUAL SYNCHRONOUS RECTIFICATION CONTROL IC Product Summary Features • • • • • • • • • • • • • • • Secondary-side high speed synchronous rectification controller for resonant half bridge converters Direct sensing of MOSFET drain voltage up to 200V Operates up to 400kHz switching frequency Programmable Minimum On Time Anti-bounce logic and UVLO protection Linear turn-off phase to compensate for premature switch off due to parasitic inductance 4A peak turn off drive current Micropower start-up & ultra-low quiescent current 50ns turn-off propagation delay Wide Vcc operating range 4.75V to 18V Cycle by Cycle MOT Protection Auto low power mode standby mode Improved noise immunity Compatible with Energy Star low standby power Lead-free Topology LLC Half-bridge VD 200V VOUT Vcc Io+ & I o- +1A & -4A Package Options 8-Pin SOIC Typical Applications • Desktop SMPS, Server SMPS, AC-DC adapters, LCD & PDP TV, Telecom SMPS Ordering Information Standard Pack Base Part Number IR11688S 1 Package Type SOIC8N Complete Part Number Form Quantity Tape and Reel 2500 IR11688STRPBF 2016-1-18 IR11688S Typical Connection Diagram Gate2 8 VCC 2 GND 7 MOT 3 VD1 4 2 IR11688 Gate1 1 VS 6 Cout LOAD VD2 5 2016-1-18 IR11688S Table of Contents Page Ordering Information 1 Description 4 Absolute Maximum Ratings 5 Electrical Characteristics 6 Functional Block Diagram 8 Input/Output Pin Equivalent Circuit Diagram 9 Pin Definitions 10 Pin Assignments 10 Application Information and Additional Details 12 Package Details 23 Tape and Reel Details 24 Part Marking Information 25 Qualification Information 26 3 2016-1-18 IR11688S Description The IR11688 is a dual smart secondary-side controller IC optimized to drive two N-Channel power MOSFETs configured for synchronous rectification in resonant converter applications. Each channel can drive one or multiple parallel MOSFETs to emulate the behavior of Schottky diode rectifiers, bypassing the body diodes for the majority of each conduction period to minimize power dissipation and remaining off during the blocking period. The drain to source voltage of each rectifier MOSFET is sensed to determine the source to drain current and turn each gate on rapidly at the start of each conduction cycle and off in close proximity to the zero current transitions for each branch of the output rectifier circuit. Ruggedness and noise immunity are accomplished using an advanced blanking scheme and double-pulse suppression that allows reliable operation in fixed and variable frequency applications. The programmable minimum on time (MOT) function provides flexibility to work over a wide range of switching frequencies. The cycle-by-cycle MOT protection circuit is able to automatically detect a light or no load condition so that the gate drives may be disabled to avoid unwanted reverse currents flowing through the MOSFETs. The IR11688 has a wide Vcc supply voltage range from 4.75V to 18V, enabling its supply to be derived from the output and eliminating the need for an auxiliary supply circuit in systems with output voltage as low as 5V. The IR11688 also has very low quiescent current when the gate drives are not switching to offer minimal power consumption in standby mode. 4 2016-1-18 IR11688S Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any pin. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Parameters Supply Voltage Cont. Drain Sense Voltage Pulse Drain Sense Voltage Source Sense Voltage Gate Voltage MOT Voltage Operating Junction Temperature Storage Temperature Thermal Resistance Package Power Dissipation Symbol VCC VD1,2 VD1,2 VS VGATE1,2 VMOT TJ TS RθJA PD Min. -0.3 -1 -3 -1 -0.3 -0.3 -40 -55 Max. 20 200 200 5 Vcc+0.3 3.5 150 150 128 970 Units V V V V V V °C °C °C/W mW Remarks SOIC-8 SOIC-8, TAMB=25°C Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol VCC VD Definition TJ Max. 18 200 125 Units Supply voltage Drain Sense Voltage Junction Temperature Min. 4.75 ① -3 -40 Fsw Switching Frequency --- 400 kHz Min. 20 Max. 150 Units kΩ V °C ① VD -3V negative spike width ≤100ns Recommended Component Values Symbol RMOT 5 Component MOT pin resistor value 2016-1-18 IR11688S Electrical Characteristics VCC=12V, TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to GND (pin7). Supply Section Parameters Supply Voltage Operating Range VCC Turn On Threshold VCC Turn Off Threshold (Under Voltage Lock Out) VCC Turn On/Off Hysteresis Typ. Max. Units 4.75 4.35 4.55 18 4.75 V V VCC UVLO 4.15 4.35 4.55 V VCC HYST --- 0.2 --- V ICC --- 13 15 mA Start-up Current Quiescent waiting time IQCC ICC START TWAIT ----340 320 40 570 500 80 800 µA µA µS Comparator Section Parameters Turn-off Threshold Regulation Threshold Turn-on Threshold Hysteresis Input Bias Current Input Bias Current Turn-on Blanking time Symbol VTH1 VTHR VTH2 VHYST IIBIAS1 IIBIAS2 TBon Min. -7 -50 -263 ---7.5 ----- Typ. -4 -40 -230 230 -5 7 150 Max. 0 -30 -197 ----10 --- Units mV mV mV mV µA µA ns One-Shot Section Parameters Blanking pulse duration Reset Threshold Reset Delay Hysteresis Symbol tBLANK VTH3 tBRST VHYST3 Min. 8 1.06 ----- Typ. 15 1.18 400 40 Max. 24 1.31 ----- Units µs V ns mV GBD Min. 375 0.75 Typ. 500 1 Max. 625 1.25 Units Remarks RMOT =24kΩ, VCC=5V ns RMOT =50kΩ, VCC=5V µs Operating Current Symbol Min. VCC VCC ON Quiescent Current Minimum On Time Section Parameters Symbol Minimum on time 6 TOnmin Remarks CLOAD =1nF, fSW = 400kHz, RMOT=50kΩ No switching at VD pins and after TWAIT is exceeded, VD=2V, RMOT=50kΩ VCC=VCC ON - 0.1V Remarks VS=0V 10mV hysteresis (-50mV/-40mV) GBD VD = -50mV VD = 200V GBD Remarks 2016-1-18 IR11688S Electrical Characteristics VCC=12V, TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to GND (pin7). Gate Driver Section Parameters Gate Low Voltage Symbol VGLO Gate High Voltage VGTH tr tf Min. ----------- Typ. 0.15 11.9 4.9 20 10 Max. 0.25 ----38 22 Turn on Propagation Delay tDon --- 200 250 Turn off Propagation Delay Pull up Resistance Pull down Resistance Output Peak Current (source) Output Peak Current (sink) tDoff rup rdown ------- 42 6 1.5 60 ----- IO source IO sink ----- 1 4 ----- Rise Time Fall Time Units Remarks V IGATE = 100mA GBD V GBD ns CLOAD = 1nF ns CLOAD = 1nF VDS to VGATE – VDS goes down ns from 6V to -1V VDS to VGATE –VDS goes up from ns -1V to 6V GBD Ω IGATE = -100mA Ω A A GBD GBD GBD – parameter is guaranteed by design and is not tested. 7 2016-1-18 IR11688S Functional Block Diagram VCC UVLO & Internal Bias VTHR VTH3 VCC 150ns RESET Min ON Time (With Cycle by Cycle MOT Check Circuit) VD1 VS GATE1 Min OFF Time MOT PGEN MOT 150ns Shoot-through Protection Logic Min ON Time (With Cycle by Cycle MOT Check Circuit) VD2 GATE2 Min OFF Time VCC GND RESET VTH3 8 VTHR 2016-1-18 IR11688S I/O Pin Equivalent Circuit Diagram VCC VD1 VD2 ESD Diode RESD ESD Diode GATE1 GATE2 200V Diode GND 9 ESD Diode GND 2016-1-18 IR11688S Pin Definitions PIN# 1 2 3 4 5 6 7 8 Symbol GATE1 VCC MOT VD1 VD2 VS GND GATE2 Description Gate Drive Output 1 Supply Voltage Minimum On Time Programmable pin Sync FET 1 Drain Voltage Sense Sync FET 2 Drain Voltage Sense Sync FET Source Voltage Sense Analog and Power Ground Gate Drive Output 2 Pin Assignments Gate2 8 VCC 2 GND 7 MOT 3 VD1 4 10 IR11688 Gate1 1 VS 6 VD2 5 2016-1-18 IR11688S Detailed Pin Description VCC: Power Supply This is the supply voltage pin of the IC, monitored by the under voltage lockout circuit. It is possible to turn off the IC entering UVLO mode by pulling this pin below the minimum turn off threshold voltage for micro power consumption. To prevent noise interfering with operation, a ceramic decoupling capacitor should be connected from Vcc to GND and located as close to the IC as possible. A low value series resistor may also be added to the Vcc supply circuit for filtering if required. Vcc is internally clamped at around 20V. GND: Ground This is power ground connection to the IC. Internal circuit blocks and gate drivers are referenced to this point. MOT: Minimum On Time The MOT programming pin controls the amount of minimum on time. Once VTH2 is crossed at either VD input, the corresponding gate drive output will transition high to turn on the SR MOSFET. Spurious ringing and oscillations can falsely trigger the input comparator to prematurely switch the output off. During the MOT period the input comparator is disabled maintaining conduction through the MOSFET on for this preset minimum period. The MOT is typically programmed between 500ns and 2us by means of an external resistor referenced to GND. VD1 and VD2: Drain Voltage Sense The VD pins are the voltage sensing inputs for the SR MOSFET drains. These are high voltage inputs therefore particular care must be taken in properly routing the connections. Additional RC filters can be placed at these inputs to improve noise immunity, however only a small resistor (≤1kΩ) and capacitor value (in the pF range) may be used to avoid introducing excessive delay to the control input. VS: Source Voltage Sense This is the signal ground for the sources of the two SR power MOSFETs to provide an accurate differential voltage measurement. Kelvin connect this pin to the source of MOSFET2 (channel 2 MOSFET) is recommended if the two MOSFETs are far apart to each other. GATE1 and GATE2: Gate Drive Outputs Each gate driver output has +1A/-4A peak drive capability. Although these pins can be directly connected to the SR MOSFET gates the use of gate resistors is recommended, especially when using several MOSFETs in parallel. Care must be taken to keep the gate loop as short and as tight as possible in order to achieve optimal switching performance. 11 2016-1-18 IR11688S Application Information and Additional Details State Diagram POWER ON Gate Inactive UVLO/SLEEP MODE VCC < VCCon Gate Inactive ICC max = 200uA VCC > VCCon, VDS>VTH3 two edges VCC < VCCuvlo or No VD edge > Twait NORMAL Gate Active Gate PW ≥ MOT Cycle by Cycle MOT Check Enabled VDS>VTH1 @ MOT VDS