IR2103(S)PBF
Half-Bridge Driver
Features
Product Summary
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
3.3V, 5V and 15V logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
Internal set deadtime
High side output in phase with HIN input
Low side output out of phase with LIN input
VOFFSET (max)
600V
IO+/-
130mA / 270mA
VOUT
10V – 20V
ton/off (typ.)
680 & 150 ns
Deadtime (typ.)
520 ns
Package Options
Description
The IR2103(S) are high voltage, high speed power MOSFET and
IGBT drivers with dependent high and low side referenced output
channels. Proprietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. The floating channel
can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.
8 Lead SOIC
8 Lead PDIP
Ordering Information
Standard Pack
Base Part Number
Package Type
Form
Quantity
IR2103SPBF
SO8N
Tube
95
IR2103SPBF
SO8N
Tape and Reel
2500
IR2103PBF
PDIP8
Tube
50
1
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© 2013 International Rectifier
Orderable Part Number
IR2103SPBF
IR2103STRPBF
IR2103PBF
April 18, 2013
IR2103(S)PBF
Table of Contents
Page
Description
1
Ordering Information
1
Typical Connection Diagram
3
Absolute Maximum Ratings
4
Recommended Operating Conditions
4
Dynamic Electrical Characteristics
5
Static Electrical Characteristics
5
Functional Block Diagrams
6
Lead Definitions
7
Lead Assignments
7
Application Information and Additional Details
8
Package Details: PDIP8, SO8N
15
Tape and Reel Details: SO8N
16
Part Marking Information
17
Qualification Information
18
2
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Typical Connection Diagram
3
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
VB
VS
Definition
High side floating absolute voltage
High side floating supply offset voltage
Min.
-0.3
VB - 25
Max.
625
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
VLO
Low side output voltage
-0.3
25
VCC + 0.3
VIN
Logic input voltage (HIN & ¯¯¯)
LIN
-0.3
VCC + 0.3
—
—
—
—
50
1
0.625
125
—
—
-55
—
200
150
150
300
dVS/dt
PD
RthJA
Allowable offset supply voltage transient
8 lead PDIP
Package power dissipation
@ TA ≤ +25°C
8 lead SOIC
Thermal resistance, junction to
ambient
8 lead PDIP
8 lead SOIC
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
TJ
TS
TL
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within
the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
Min.
Max.
VS + 10
†
VS + 20
600
VB
20
VB
VS
VHO
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
VS
VCC
Low side and logic fixed supply voltage
VLO
Low side output voltage
10
0
VIN
TA
†
Definition
Logic input voltage (HIN & LIN)
Ambient temperature
0
-40
Units
V
VCC
VCC
125
°C
Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for
more details).
4
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
ton
Turn-on propagation delay
—
680
820
VS = 0V
toff
Turn-off propagation delay
—
150
220
VS = 600V
Turn-on rise time
Turn-off fall time
Deadtime, LS turn-off to HS turn-on
& HS turn-on to LS turn-off
Delay matching, HS & LS turn on/off
—
—
100
50
170
60
400
520
650
—
—
60
tr
tf
DT
MT
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH, and IIN parameters are
referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective
output leads: HO or LO.
Symbol
VIH
VIL
VOH
VOL
ILK
IQBS
IQCC
IIN+
IINVCCUV+
VCCUVIO+
IO-
5
Definition
Logic ―1‖ (HIN) & Logic ―0‖ ( ¯¯¯)
LIN
input voltage
Logic ―0‖ (HIN) & Logic ―1‖ ( ¯¯¯)
LIN
input voltage
High level output voltage VBIAS - VO
Low level output voltage, VO
Offset supply leakage current
Quiescent VBS supply current
Quiescent VCC supply current
Logic ―1‖ input bias current
Logic ―0‖ input bias current
VCC supply undervoltage positive
going threshold
VCC supply undervoltage negative
going threshold
Output high short circuit pulsed
current
Output low short circuit pulsed
current
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© 2013 International Rectifier
Min.
Typ.
Max.
3
—
—
—
—
0.8
—
—
—
—
—
—
—
—
—
30
150
3
—
100
100
50
55
270
10
1
8
8.9
9.8
7.4
8.2
9
130
210
—
270
360
—
Units
Test Conditions
VCC = 10V to 20V
V
VCC = 10V to 20V
mV
μA
IO = 0A
IO = 0A
VB = VS = 600V
VIN = 0V or 5V
VIN = 0V or 5V
HIN = 5V, ¯¯¯
LIN =0V
HIN = 0V, ¯¯¯
LIN =5V
V
mA
VO = 0V, VIN = VIH
PW ≤ 10 μs
VO = 15V , VIN = VIL
PW ≤ 10 μs
April 18, 2013
IR2103(S)PBF
Functional Block Diagram
6
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Lead Definitions
Symbol Description
HIN
¯¯¯
LIN
Logic input for high side gate driver output (HO), in phase
Logic input for low side gate driver output (LO), out of phase
High side floating supply
VB
HO
High side gate drive output
VS
High side floating supply return
VCC
LO
Low side and logic fixed supply
COM
Low side return
Low side gate drive output
Lead Assignments
7
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1
VCC
VB
8
2
HIN
HO
7
3
LIN
VS
6
4
COM
LO
5
© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Application Information and Additional Details
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
Figure 3. Deadtime Waveform Definitions
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 4A. Turn-On Time vs. Temperature
Figure 4B. Turn-On Time vs. Supply Voltage
Figure 4C. Turn-On Time vs. Input Voltage
Figure 5A. Turn-Off Time vs. Temperature
Figure 5B. Turn-Off Time vs. Supply Voltage
Figure 5C. Turn-Off Time vs. Input Voltage
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 6A. Turn-On Rise Time vs. Temperature
Figure 6B. Turn-On Rise Time vs. Voltage
Figure 7A. Turn Off Fall Time vs. Temperature
Figure 7B. Turn Off Fall Time vs. Voltage
Figure 8A. Deadtime vs. Temperature
Figure 8B. Deadtime vs. Voltage
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 9A. Logic “1” ( HIN
¯¯¯) & Logic “0” ( ¯¯¯)
LIN Input
Voltage vs. Temperature
Figure 9B. Logic “1” ( HIN
¯¯¯) & Logic “0” ( ¯¯¯)
LIN Input
Voltage vs. Voltage
Figure 10A. Logic “0” ( HIN
¯¯¯)) & Logic “1” ( ¯¯¯)
LIN Input
Voltage vs. Temperature
Figure 10B. Logic “0” (HIN) & Logic “1” (LIN) Input
Voltage vs. Voltage
Figure 11A. High Level Output vs. Temperature
Figure 11B. High Level Output vs. Voltage
11
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 12A. Low Level Output vs. Temperature
Figure 12B. Low Level Output vs. Voltage
Figure 13A. Offset Supply Current vs. Temperature
Figure 13B. Offset Supply Current vs. Voltage
Figure 14A. VBS Supply Current vs. Temperature
Figure 14B. VBS Supply Current vs. Voltage
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 15A. VCC Supply Current vs. Temperature
Figure 15B. VCC Supply Current vs. Voltage
Figure 16A. Logic “1” Input Current vs. Temperature
Figure 16B. Logic “1” Input Current vs. Voltage
Figure 17A. Logic “0” Input Current vs. Temperature
Figure 17B. Logic “0” Input Current vs. Voltage
13
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 18A. VCC Undervoltage Threshold (+) vs.
Temperature
Figure 18B. VCC Undervoltage Threshold (-) vs.
Temperature
Figure 19A. Output Source Current vs. Temperature
Figure 19B. Output Source Current vs. Voltage
Figure 20A. Output Sink Current vs. Temperature
Figure 20A. Output Sink Current vs. Voltage
14
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Package Details: PDIP8, SO8N
15
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Tape and Reel Details: SO8N
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 8SOICN
Metric
Imperial
Code
Min
Max
Min
Max
A
7.90
8.10
0.311
0.318
B
3.90
4.10
0.153
0.161
C
11.70
12.30
0.46
0.484
D
5.45
5.55
0.214
0.218
E
6.30
6.50
0.248
0.255
F
5.10
5.30
0.200
0.208
G
1.50
n/a
0.059
n/a
H
1.50
1.60
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 8SOICN
Metric
Code
Min
Max
A
329.60
330.25
B
20.95
21.45
C
12.80
13.20
D
1.95
2.45
E
98.00
102.00
F
n/a
18.40
G
14.50
17.10
H
12.40
14.40
16
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Imperial
Min
Max
12.976
13.001
0.824
0.844
0.503
0.519
0.767
0.096
3.858
4.015
n/a
0.724
0.570
0.673
0.488
0.566
© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Part Marking Information
IRxxxxx
Part number
YWW ?
Date code
Pin 1
Identifier
? XXXX
?
MARKING CODE
P
Lead Free Released
Non-Lead Free Released
17
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IR logo
© 2013 International Rectifier
Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
April 18, 2013
IR2103(S)PBF
Qualification Information
†
††
Industrial
(per JEDEC JESD 47)
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
†††
MSL2
SOIC8N
(per IPC/JEDEC J-STD 020)
Qualification Level
Moisture Sensitivity Level
PDIP8
RoHS Compliant
Not applicable
(non-surface mount package style)
Yes
†
††
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
18
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April 18, 2013
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