IR2156

IR2156(S)PbF BALLAST CONTROL IC Features Programmable dead time DC bus under-voltage reset Shutdown pin with hysteresis Internal 15.6V zener clamp diode on Vcc Micropower startup (150 µA) Latch immunity and ESD protection Ballast control and half bridge driver in one IC Programmable preheat frequency Programmable preheat time Internal ignition ramp Programmable over-current threshold Programmable run frequency Packages Description The IR2156 incorporates a high voltage halfbridge gate driver with a programmable oscillator and state diagram to form a complete ballast control IC. The IR2156 features include programmable preheat and run frequencies, programmable preheat time, programmable dead-time, and programmable overcurrent protection. Comprehensive protection features such as protection from failure of a lamp to strike, filament failures, as well as an automatic restart function, have been included in the design. IR2156SPBF SOICN14 IR2156 Application Diagram 1 IR2156PBF PDIP14 IR2156(S)PbF Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. VB High side floating supply voltage -0.3 625 VS High side floating supply offset voltage VB - 25 VB + 0.3 VHO High side floating output voltage VS - 0.3 VB + 0.3 VLO Low side output voltage -0.3 VCC + 0.3 Maximum allowable output current (HO, LO) due to external power transistor miller effect -500 500 VDC pin voltage -0.3 VCC+0.3 IOMAX VDC VCT CT pin voltage -0.3 VCC+0.3 VCPH CPH pin voltage -0.3 VCC+0.3 ICPH CPH pin current -5 5 IRPH RPH pin current -5 5 VRPH RPH pin voltage Units V mA V mA -0.3 VCC+0.3 V IRT RT pin current -5 5 mA VRT RT pin voltage -0.3 VCC+0.3 VCS Current sense pin voltage -0.3 5.5 ICS Current sense pin current -5 5 ISD Shutdown pin current -5 5 Supply current (Note 1) -20 20 Allowable offset voltage slew rate -50 50 (14-Pin DIP) --- 1.80 (14-Pin SOIC) --- 1.40 ICC dV/dt PD RθJA Package power dissipation @ TA ≤ +25ºC PD = (TJMAX-TA)/RθJA Thermal resistance, junction to ambient (14-Pin DIP) --- 70 (14-Pin SOIC) --- 82 TJ Junction temperature -55 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) --- 300 V mA V/ns W ºC/W ºC Note 1: This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. 2 IR2156(S)PbF Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol VBS VS Definition High side floating supply voltage Max. VBSUV+ VCLAMP Units -1 600 Supply voltage VCCUV+ VCLAMP ICC Supply current Note 2 10 mA CT CT lead capacitance 220 --- pF ISD Shutdown lead current -1 1 ICS Current sense pin current -1 1 TJ Junction temperature -25 125 VCC Steady state high side floating supply offset voltage Min. V mA ºC Note 2: Enough current should be supplied into the VCC pin to keep the internal 15.6V zener clamp diode on this pin regulating at its voltage, VCLAMP. Electrical Characteristics VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC=Open, RT=40KΩ, RPH=100KΩ, CT=470 pF, VCPH=0.0V, VSD=0.0V, VCS=0.0V, CLO=CHO=1000 pF, TA=25C unless otherwise specified. Symbol Definition Min Typ Max Units 10.5 11.5 12.5 8.5 9.5 10.5 VUVHYS VCC supply undervoltage lockout hysteresis 1.5 2.0 3.0 IQCCUV UVLO mode quiescent current 50 120 200 Test Conditions Supply Characteristics VCC supply undervoltage positive going threshold V supply undervoltage negative going VCCUV- CC threshold VCCUV+ IQCCFLT Fault-mode quiescent current --- 200 470 Quiescent VCC supply current --- 1.0 1.5 ICC40k VCC supply current, f = 40kHz 1.3 1.5 1.7 14.5 15.6 16.5 IQCC VCC rising from 0V V VCC=11V µA mA VCLAMP VCC zener clamp voltage VCC falling from 14V SD = 5.1V, or CS = 1.3V CT connected to COM, VCC = 14V, RT = 15kΩ VCPH=12V, VVDC=12V V ICC = 5mA Floating Supply Characteristics IQBS0 Quiescent VBS supply current -5 0 5 IQBS1 Quiescent VBS supply current --- 30 50 ILK Offset supply leakage current --- --- 50 3 µA µA VHO = VS (CT=0V) VHO = VB (CT=14V) VB = VS = 600V IR2156(S)PbF Electrical Characteristics VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC=Open, RT=40KΩ, RPH=100KΩ, CT=470 pF, VCPH=0.0V, VSD=0.0V, VCS=0.0V, CLO=CHO=1000 pF, TA=25C unless otherwise specified. Symbol Definition Min Typ Max Units fOSCRUN Oscillator frequency during RUN mode 36.0 40.0 44.0 fOSCPH Oscillator frequency during PH mode 49.0 55.0 60.0 Test Conditions Oscillator, Ballast Control, I/O Characteristics kHz Oscillator duty cycle --- 50 --- VCT+ d Upper CT ramp voltage threshold --- 8.3 --- VCT- Lower CT ramp voltage threshold --- 4.8 --- Fault-mode CT pin voltage --- 0 --- VCTFLT VVDC=14V, VCPH=Open VVDC=14V, VCPH=COM % V VCC=14V SD>5.1V or CS>1.3V tDLO LO output deadtime --- 2.0 --- tDHO HO output deadtime --- 2.0 --- RDT Internal deadtime resistor --- 3 --- kΩ 3.6 4.3 5.2 µA CT=10V, VDC=5V, VCPH=0V --- 0 --- mV SD>5.1V or CS>1.3V --- 0.1 --- µA CT=10V --- 0 --- mV SD>5.1V or CS>1.3V Open circuit RT pin leakage current --- 0.1 --- µA CT=10V Fault-mode RT pin voltage --- 0 --- mV SD>5.1V or CS>1.3V --- 5.1 --- V µsec Preheat Characteristics ICPH CPH pin charging current VCPHFLT Fault-mode CPH pin voltage RPH Characteristics IRPHLK Open circuit RPH pin leakage current VRPHFLT Fault-mode RPH pin voltage RT Characteristics IRTLK VRTFLT Protection Circuitry Characteristics VSDTH+ Rising shutdown pin threshold voltage VSDHYS SD pin Reset threshold voltage --- 450 --- mV VCSTH+ Over-current sense threshold voltage 1.1 1.25 1.44 V tCS Over-current sense propogation delay --- 160 --- VCSPW RVDC Delay from CS to LO nsec Over-current sense minimum pulse width --- 135 --- DC bus sensing resistor 7.5 10.0 14.0 kΩ 10.3 10.9 11.4 V VCPH-VDC CPH to VDC offset voltage 4 VCS pulse amplitude = VCSTH + 100mV VCPH>12V, VDC=7V, CT=0 VCPH open, VDC=0V IR2156(S)PbF Electrical Characteristics VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC=Open, RT=39KΩ, RPH=100KΩ, CT=470 pF, VCPH=0.0V, VSD=0.0V, VCS=0.0V, CLO=CHO=1000 pF, TA=25C unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions Gate Driver Output Characteristics VOL Low-level output voltage --- COM VOH High-level output voltage --- VCC --- Turn-on rise time --- 110 150 Turn-off fall time --- 55 100 tr tf 5 --- V nsec IO = 0 IO = 0 IR2156(S)PbF Block Diagram Vcc S1 R RT VB S2 Driver Logic 40K R RDT 2.5K VTH HighSide Driver Comp 1 HO CT Soft Start R T Q R Q VS S3 S4 S6 R RPH LowSide Driver R ICPH Schmitt 1 CPH LO Fault Logic 5.1V 5.1V S RVDC Q R1 VDC 10K R2 Q CS 1.3V Comp 3 SD 5.1V UnderVoltage Detect Comp 2 COM Pin Assignments & Definitions Pin Assignments 1 14 VB VCC 2 13 HO VDC 3 RT 4 IR2156 NC 12 VS 11 LO RPH 5 10 CS CT 6 9 SD CPH 7 8 COM Pin # Symbol 1 2 3 4 5 6 NC VCC VDC RT Logic & Low-Side Gate Driver Supply IC Start-up and DC Bus Sensing Input RPH CT Preheat Frequency Timing Resistor Oscillator Timing Capacitor 7 8 9 10 11 12 13 14 6 Description No Connect Minimum Frequency Timing Resistor CPH Preheat Timing Capacitor COM SD IC Power & Signal Ground Shutdown Input CS LO VS Current Sensing Input HO VB High-Side Gate Driver Output High-Side Gate Driver Floating Supply Low-Side Gate Driver Output High-Side Floating Return IR2156(S)PbF State Diagram Power Turned On UVLO Mode 1 /2-Bridge Off IQCC ≅ 120µA CPH = 0V CT = 0V (Oscillator Off) CS > 1.3V (Lamp Removal) or SD > 5.1V or VCC < 9.5V (UV-) (Power Turned Off) VCC > 11.5V (UV+) and SD < 5.1V FAULT Mode Fault Latch Set 1 /2-Bridge Off IQCC ≅ 180µA CPH = 0V VCC = 15.6V CT = 0V (Oscillator Off) PREHEAT Mode 1 /2-Bridge oscillating @ fPH RPH // RT CPH Charging @ ICPH = 5 µA CS Enabled @ CPH > 7.5V RVDC to COM = 12.6kΩ @ CPH > 7.5V CPH > 10V (End of PREHEAT Mode) CS > 1.3V (Failure to Strike Lamp) Ignition Ramp Mode RPH Open fPH ramps to fRUN CPH charging CPH > 13V CS > 1.3V (Lamp Fault) RUN Mode RPH = Open 1/2-Bridge Oscillating @ fRUN 7 VCC < 9.5V (VCC Fault or Power Down) or SD > 5.1V (Lamp Fault or Lamp Removal) IR2156(S)PbF TIMING DIAGRAMS NORMAL OPERATION VCC 15.6V UVLO+ UVLO- VDC VCC 7.5V CPH frun FREQ fph HO LO CS Over-Current Threshold 1.25V PH IGN UVLO RUN UVLO RT RT RT RPH RPH RPH CT CT CT HO HO HO LO LO LO CS CS CS 8 IR2156(S)PbF TIMING DIAGRAMS FAULT CONDITION VCC 15.6V UVLO+ UVLO- VDC VCC 7.5V CPH frun FREQ fph SD HO LO CS 1.3V PH IGN SD > 5.1V IGN PH FAULT UVLO RUN RT RT RT RPH RPH RPH CT CT CT HO HO HO LO LO LO CS CS CS 9 UVLO IR2156(S)PbF Characterization Data 10 IR2156(S)PbF Characterization Data 11 IR2156(S)PbF Characterization Data 12 IR2156(S)PbF Characterization Data 13 IR2156(S)PbF Characterization Data 14 IR2156(S)PbF Characterization Data 15 IR2156(S)PbF Characterization Data 16 IR2156(S)PbF current is available over all ballast operating conditions. An external bootstrap diode (DBOOT) and the supply capacitor (CBOOT) comprise the supply voltage for the high side driver circuitry. To guarantee that the high-side supply is charged up before the first pulse on pin HO, the first pulse from the output drivers comes from the LO pin. During undervoltage lock-out mode, the highand low-side driver outputs HO and LO are both low, pin CT is connected internally to COM to disable the oscillator, and pin CPH is connected internally to COM for resetting the preheat time. Functional Description Under-voltage Lock-out Mode (UVLO) The under-voltage lock-out mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. To identify the different modes of the IC, refer to the State Diagram shown on page 2 of this document. The IR2156 undervoltage lock-out is designed to maintain an ultra low supply current of less than 200uA, and to guarantee the IC is fully functional before the high and low side output drivers are activated. Figure 1 shows an efficient supply voltage using the start-up current of the IRS2156 together with a charge pump from the ballast output stage (RSUPPLY , CVCC, DCP1 and DCP2). Preheat Mode (PH) The preheat mode is defined as the state the IC is in when the lamp filaments are being heated to their correct emission temperature. This is necessary for maximizing lamp life and reducing the required ignition voltage. The IR2156 enters preheat mode when VCC exceeds the VCCUV+ positive-going threshold. HO and LO begin to oscillate at the preheat frequency with 50% duty cycle and with a dead-time which is set by the value of the external timing capacitor, CT, and internal deadtime resistor, RDT. Pin CPH is disconnected from COM and an internal 4uA current source (Figure 3) charges the external preheat timing capacitor on CPH linearly. The over-current protection on pin CS is disabled during preheat. VBUS(+) RSUPPLY RLIM DBOOT VB 14 CBOOT HO VCC CVCC M1 13 IRS2156 2 VS Half-Bridge Output 12 LO 11 M2 CSNUB VBUS (+) COM 8 RCS DCP1 DCP2 HO RT S4 HalfBridge Driver RPH VBUS(-) 5 RPH Figure 1, Start-up and supply circuitry. 13 OSC. 4 RT VS 12 M1 Half Bridge Output I LOAD CT 6 LO 11 The start-up capacitor (CVCC) is charged by current through supply resistor (RSUPPLY) minus the start-up current drawn by the IC. This resistor is chosen to provide 2X the maximum start-up current to guarantee ballast start-up at low line input voltage. Once the capacitor voltage on VCC reaches the start-up threshold VCCUV+, and the SD pin is below VSDTH-, the IC turns on and HO and LO begin to oscillate. The capacitor begins to discharge due to the increase in IC operating current (Figure 2). M2 CT 5uA CPH RCS 7 CPH COM 8 Load Return VBUS (-) VC1 CVCC DISCHARGE Figure 3, Preheat circuitry INTERNAL VCC ZENER CLAMP VOLTAGE The preheat frequency is determined by the parallel combination of resistors RT and RPH, together with timing capacitor CT. CT charges and discharges between 1/3 and 3/5 of VCC (see Timing Diagram, page 9). CT is charged exponentially through the parallel combination of RT and RPH connected internally to VCC through MOSFET S1. The charge time of CT from 1/3 to 3/5 VCC is the on-time of the respective output gate driver, HO or LO. Once CT exceeds 3/5 VCC, MOSFET S1 is turned off, disconnecting RT and RPH from VCC. CT is then discharged exponentially through an internal resistor, RDT, through MOSFET S3 to COM. The discharge time of CT from 3/5 to 1/3 VCC is the dead-time (both off) of the output gate drivers, HO and LO. The selected value of CT together with RDT therefore program the desired dead-time (see Design Equations, page 12, Equations 1 and 2). Once CT discharges below 1/3 VCC, MOSFET S3 is turned off, disconnecting RDT from COM, and MOSFET S1 is turned on, connecting RT and RPH again to VCC. The frequency remains at the preheat frequency until the voltage on pin CPH exceeds 13V and the IC enters Ignition Mode. During the preheat mode, both the over-current protection and the Vccuv+ VCCHYS Vccuv- DISCHARGE TIME CHARGE PUMP OUTPUT RSUPPLY & CVCC TIME CONSTANT t Figure 2, Supply capacitor (CVCC) voltage. During the discharge cycle, the rectified current from the charge pump charges the capacitor above the IC turn-off threshold. The charge pump and the internal 15.6V zener clamp of the IC take over as the supply voltage. The start-up capacitor and snubber capacitor must be selected such that enough supply 17 IR2156(S)PbF DC bus under-voltage reset are enabled when pin CPH exceeds 7.5V. DC Bus Under-voltage Reset Ignition Mode (IGN) Should the DC bus decrease too low during a brown-out line condition or over-load condition, the resonant output stage to the lamp can shift near or below resonance. This can produce hard-switching at the half-bridge which can damage the halfbridge switches. To protect against this, pin VDC measures the DC bus voltage and pulls down on pin CPH linearly as the voltage on pin VDC decreases 10.9V below VCC. This causes the pchannel MOSFET S4 (Figure 4) to close as the DC bus decreases and the frequency to shift higher to a safe operating point above resonance. The DC bus level at which the frequency shifting occurs is set by the external RBUS resistor and internal RVDC resistor. By pulling down on pin CPH, the ignition ramp is also reset. Therefore, should the lamp extinguish due to very low DC bus levels, the lamp will be automatically ignited as the DC bus increases again. The internal RVDC resistor is connected between pin VDC and COM when CPH exceeds 7.5V (during preheat mode). The ignition mode is defined as the state the IC is in when a high voltage is being established across the lamp necessary for igniting the lamp. The IR2156 enters ignition mode when the voltage on pin CPH exceeds 13V. VBUS (+) VCC 2 S1 RT HO RT 13 OSC. 4 S4 RPH HalfBridge Driver 5 RPH CT M1 Half Bridge Output VS 12 I LOAD Fault Logic 6 LO 11 CT Fault Mode (FAULT) M2 S3 CS 1.25V Should the voltage at the current sensing pin, CS, exceed 1.3V at any time after the preheat mode, the IC enters fault mode and both gate driver outputs, HO and LO, are latched in the ‘low’ state. CPH is discharged to COM for resetting the preheat time, and CT is discharged to COM for disabling the oscillator. To exit fault mode, VCC must be recycled back below the UVLO negative-going turn-off threshold, or, the shutdown pin, SD, must be pulled above VSDTH+. Either of these will force the IC to enter UVLO mode (see State Diagram, page 2). Once VCC is above VCCUV+ and SD is below 4.5V, the IC will begin oscillating again in the preheat mode. 10 5uA R1 Comp4 CPH CCS 7 CPH 8 RCS COM Load Return VBUS (-) Figure 4, Ignition circuitry. Pin CPH is connected internally to the gate of a p-channel MOSFET (S4) (see Figure 4) that connects pin RPH with pin RT. As pin CPH exceeds 13V, the gate-to-source voltage of MOSFET S4 begins to fall below the turn-on threshold of S4. As pin CPH continues to ramp towards VCC, switch S4 turns off slowly. This results in resistor RPH being disconnected smoothly from resistor RT, which causes the operating frequency to ramp smoothly from the preheat frequency, through the ignition frequency, to the final run frequency. The over-current threshold on pin CS will protect the ballast against a non-strike or open-filament lamp fault condition. The voltage on pin CS is defined by the lower halfbridge MOSFET current flowing through the external current sensing resistor RCS. The resistor RCS therefore programs the maximum allowable peak ignition current (and therefore peak ignition voltage) of the ballast output stage. The peak ignition current must not exceed the maximum allowable current ratings of the output stage MOSFETs. Should this voltage exceed the internal threshold of 1.3V, the IC will enter FAULT mode and both gate driver outputs HO and LO will be latched low. Run Mode (RUN) Once the lamp has successfully ignited, the ballast enters run mode. The run mode is defined as the state the IC is in when the lamp arc is established and the lamp is being driven to a given power level. The run mode oscillating frequency is determined by the timing resistor RT and timing capacitor CT (see Design Equations, page 12, Equations 3 and 4). Should hard-switching occur at the half-bridge at any time due to an open-filament or lamp removal, the voltage across the current sensing resistor, RCS, will exceed the internal threshold of 1.3 volts and the IC will enter FAULT mode. Both gate driver outputs, HO and LO, will be latched low. 18 IR2156(S)PbF connected in parallel internally for the duration of the preheat time. The preheat frequency is therefore given as: Design Equations f PH = Note: The results from the following design equations can differ slightly from experimental measurements due to IC tolerances, component tolerances, and oscillator over- and under-shoot due to internal comparator response time. For additional design support for different lamp types and AC line input configurations, including component calculations, schematics, bill of materials and inductor specifications, please download IR’s Ballast Design Assistant (BDA) software at www.irf.com. Step 1: Program Dead-time The dead-time between the gate driver outputs HO and LO is programmed with timing capacitor CT and an internal dead-time resistor RDT. The dead-time is the discharge time of capacitor CT from 3/5VCC to 1/3VCC and is given as: [Seconds] (1) [Farads] (2)  0.51⋅ RT ⋅ R PH  2 ⋅ CT ⋅  + 2000 R + R T PH   [Hertz] (5) [Ohms] (6) Or, RPH tDT = CT ⋅ 2000 1   1  − 3333 ⋅ RT 1.12 ⋅ CT ⋅ f PH  =    1 RT −  − 3333  1.12 ⋅ CT ⋅ f PH  Step 4: Program Preheat Time The preheat time is defined by the time it takes for the capacitor on pin CPH to charge up to 13 volts. An internal current source of 5uA flows out of pin CPH. The preheat time is therefore given as: Or, CT = t DT 2000 tPH = CPH ⋅ 3.02e6 [Seconds] (7) CPH = tPH ⋅ 0.33e − 6 [Farads] (8) Or, Step 2: Program Run Frequency The final run frequency is programmed with timing resistor RT and timing capacitor CT. The charge time of capacitor CT from 1/3VCC to 3/5VCC determines the on-time of HO and LO gate driver outputs. The run frequency is therefore given as: f RUN = 1 2 ⋅ CT (0.6 ⋅ RT + 2000) [Hertz] (3) [Ohms] (4) Step 5: Program Maximum Ignition Current The maximum ignition current is programmed with the external resistor RCS and an internal threshold of 1.25 volts (VCSTH+). This threshold determines the over-current limit of the ballast, which can be exceeded when the frequency ramps down towards resonance during ignition and the lamp does not ignite. The maximum ignition current is given as: Or, RT = 1 1.12 ⋅ CT ⋅ f RUN − 3333 I IGN = 1.25 RCS [Amps Peak] RCS = 1.25 I IGN [Ohms] (9) Or, Step 3: Program Preheat Frequency The preheat frequency is programmed with timing resistors RT and RPH, and timing capacitor CT. The timing resistors are 19 (10) IR2156(S)PbF Case Outline 20 IR2156(S)PbF Qualification: Lead-free MSL3, industrial http://www.irf.com Data and specifications subject to change without notice. Sales Offices, Agents and Distributors in Major Cities Throughout the World. © 2012 International Rectifier Printed in U.S.A 21