IR35203MTRPBF

6+1 Dual Output Digital Multi-Phase Controller FEATURES IR35203 DESCRIPTION  Ultra Low Quiescent Power Dual output 6+1 phase PWM Controller  Intel VR12 Rev 1.7, VR12.5 Rev 1.5, IMVP8 Rev 1.2, and Memory VR modes ®  Switching frequency from 194KHz to 2MHz per phase in 56 steps  IR Efficiency Shaping Features including Dynamic Phase Control and Automatic Power State Switching  Programmable 1-phase or 2-phase operation for Light Loads and Active Diode Emulation for very Light Loads  IR Adaptive Transient Algorithm (ATA) on both loops minimizes output bulk capacitors and system cost  Auto-Phase Detection with PID Coefficient autoscaling  Fault Protection: OVP, UVP, OCP, OTP, CAT_FLT  I2C/SMBus/PMBus system interface for reporting of Temperature, Voltage, Current & Power telemetry for both loops  Multiple Time Programming (MTP) with integrated charge pump for easy non-volatile programming  Compatible with 3.3V tri-state drivers  +3.3V supply voltage; -40 C to 85 C ambient o o operation; -40 C to 125 C junction o o  Pb-Free, RoHS, 6x6mm 48-pin, 0.4mm pitch QFN APPLICATIONS  Intel® VR12, VR12.5 and IMVP8 (overclocking only) based systems  Servers and High End Desktop CPU VRs  High Performance Graphics Processors, Memory VR The IR35203 is a dual-loop digital multi-phase buck controller designed for CPU voltage ® regulation, and is fully compliant with Intel VR12 2 Rev 1.7, VR12.5 Rev 1.5, IMVP8 Rev 1.2 specifications. The IR35203 includes IR’s Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. IR’s Dynamic Phase Control adds/drops phases based upon load current. The IR35203 can be configured to enter 1 or 2-phase PS1 operation and active diode emulation mode automatically or by command. IR’s unique Adaptive Transient Algorithm (ATA), based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors. IR35203 has 127 possible address values for both the PMBus and I2C bus interfaces. The device configuration can be easily defined using the IR PowIRCenter GUI, and is stored in the on-chip Non-Volatile Memory (NVM). This reduces external components and minimizes the package size. The IR35203 provides extensive OVP, UVP, OCP, OTP & CAT_FLT fault protection, and includes thermistor based temperature sensing or per phase temperature reporting when using the IR powIRstage. The controller is designed to work with either Rdson current sense PowIRstages or with DCR current sense. The IR35203 also includes numerous VR design simplifying and differentiating features, like register diagnostics, which enable fast time-to-market. ORDERING INFORMATION Base Part Number Package Type IR35203 Standard Pack Orderable Part Number Form Quantity 48-pin, QFN 6 mm x 6 mm Tape and Reel 3000 IR35203MxxyyTRP1 IR35203 48-pin, QFN 6 mm x 6 mm Tape and Reel 3000 IR35203MTRPBF IR35203 48-pin, QFN 6 mm x 6 mm Tray 4900 IR35203MTYPBF Notes: 1. 2. Customer Specific Configuration File, where xx = Customer ID and yy = Configuration File (Codes assigned by IR Marketing). IR35203 is not intended for application where ultra low power PS4 shutdown functionality is required. 1 www.irf.com | © 2016 International Rectifier February 8, 2016 | V1.5 IR35203 6+1 Dual Output Digital Multi-Phase Controller ORDERING INFORMATION IR35203M          P/PBF – Lead Free TR – Tape & Reel / TY - Tray yy – Configuration File ID xx – Customer ID Package Type (QFN) 48 47 46 45 44 43 42 41 40 39 38 37 ISEN6 1 36 ISEN1_L2 RCSP 2 35 RCSP_L2 RCSM 3 34 RCSM_L2 VRDY2 4 33 VCC VSEN 5 32 VSEN_L2 VRTN 6 31 VRTN_L2 IR35203 6+1 48 Pin 6x6 QFN Top View 7 I_IN 30 PWM1_L2 TSEN1 8 29 PWM6 CFILT 9 28 PWM5 VRDY1 10 27 PWM4 EN_L2/ CAT_FLT 11 26 PWM3 VINSEN 12 25 PWM2 49 GND 13 14 15 16 17 18 19 20 21 22 23 24 Figure 1: IR35203 Pin Diagram 2 www.irf.com | © 2016 International Rectifier February 8, 2016 | V1.5