IR35204MTRPBF

3+1 Dual Output Digital Multi-Phase Controller FEATURES IR35204 DESCRIPTION  Ultra Low Quiescent Power Dual output 3+1 phase PWM Controller  Intel VR12 Rev 1.7, VR12.5 Rev 1.5, IMVP8 Rev 1.2, AMD SVID2, and Memory VR modes  Switching frequency from 194KHz to 2MHz per phase in 56 steps  IR Efficiency Shaping Features including Dynamic Phase Control and Automatic Power State Switching  Programmable 1-phase or 2-phase operation for Light Loads and Active Diode Emulation for very Light Loads  IR Adaptive Transient Algorithm (ATA) on both loops minimizes output bulk capacitors and system cost  Auto-Phase Detection with PID Coefficient autoscaling  Fault Protection: OVP, UVP, OCP, OTP, CAT_FLT  I2C/SMBus/PMBus system interface for reporting of Temperature, Voltage, Current & Power telemetry for both loops  Multiple Time Programming (MTP) with integrated charge pump for easy non-volatile programming  Compatible with 3.3V tri-state drivers  +3.3V supply voltage; -40 C to 85 C ambient o o operation; -40 C to 125 C junction  Pb-Free, RoHS, 5x5mm 40-pin, 0.4mm pitch QFN ® o The IR35204 is a dual-loop digital multi-phase buck controller designed for CPU voltage ® regulation, and is fully compliant with Intel , VR12 2 Rev 1.7, VR12.5 Rev 1.5, IMVP8 Rev 1.2, and AMD SVI2 REV 1.06 specifications. The IR35204 includes IR’s Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. IR’s Dynamic Phase Control adds/drops phases based upon load current. The IR35204 can be configured to enter 1 or 2-phase PS1 operation and active diode emulation mode automatically or by command. IR’s unique Adaptive Transient Algorithm (ATA), based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors. o APPLICATIONS  Intel® VR12, VR12.5 and IMVP8 (overclocking only), AMD SVI2 based systems  Servers and High End Desktop CPU VRs  High Performance Graphics Processors, Memory VR IR35204 has 127 possible address values for both the PMBus and I2C bus interfaces. The device configuration can be easily defined using the IR PowIRCenter GUI, and is stored in the on-chip Non-Volatile Memory (NVM). This reduces external components and minimizes the package size. The IR35204 provides extensive OVP, UVP, OCP, OTP & CAT_FLT fault protection, and includes thermistor based temperature sensing or per phase temperature reporting when using the IR powIRstage. The controller is designed to work with either Rdson current sense PowIRstages or with DCR current sense. The IR35204 also includes numerous VR design simplifying and differentiating features, like register diagnostics, which enable fast time-to-market. ORDERING INFORMATION Base Part Number Package Type IR35204 Standard Pack Orderable Part Number Form Quantity 40-pin, QFN 5 mm x 5 mm Tape and Reel 3000 IR35204MxxyyTRP1 IR35204 40-pin, QFN 5 mm x 5 mm Tape and Reel 3000 IR35204MTRPBF IR35204 40-pin, QFN 5 mm x 5 mm Tray 4900 IR35204MTYPBF Notes: 1. 2. Customer Specific Configuration File, where xx = Customer ID and yy = Configuration File (Codes assigned by IR Marketing). IR35204 is not intended for application where ultra low power PS4 shutdown functionality is required. 1 www.irf.com | © 2016 International Rectifier February 8, 2016 | V1.6 IR35204 3+1 Dual Output Digital Multi-Phase Controller ORDERING INFORMATION IR35204M          P/PBF – Lead Free TR – Tape & Reel / TY - Tray yy – Configuration File ID xx – Customer ID RCSP IRTN 1 ISEN 1 IRTN2 ISEN 2 IRTN3 ISEN3 IRTN1_L2 ISEN1_L2 RCSP_L2 Package Type (QFN) 40 39 38 37 36 35 34 33 32 31 RCSM 1 30 RCSM_L2 VRDY2 2 29 VSEN 3 28 VSEN_L2 VRTN 4 27 VRTN_L2 6 CFILT 7 VRDY1 8 EN_L2/CAT_FLT/PWROK 9 25 PWM3 24 PWM2 23 PWM1 22 TSEN2/VAUXSEN 41 10 GN D 13 14 15 16 17 18 19 20 ADDR_PROT SM_AL ERT# SM_DIO SM_CLK 12 SV_ADDR/ VDDIO SV_AL ERT#/ SVT 11 EN 21 VRHOT_ICRIT# VINSEN 26 PWM1_L2 SV_DIO TSEN1 IR35204 40 Pin 5x5 QFN To p View 5 SV_CLK I_IN VCC PIN_AL ERT# Figure 1: IR35204 Pin Diagram 2 www.irf.com | © 2016 International Rectifier February 8, 2016 | V1.6