PD-97514
IR3859MPbF
SupIRBuck
HIGHLY EFFICIENT
TM
INTEGRATED 9A, SYNCHRONOUS BUCK REGULATOR
Features
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Applications
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Description
Greater than 95% Maximum Efficiency
Wide Input Voltage Range 1.5V to 21V
Wide Output Voltage Range 0.7V to 0.9*Vin
Continuous 9A Load Capability
Integrated Bootstrap-diode
High Bandwidth E/A for excellent transient
performance
Programmable Switching Frequency up to 1.5MHz
Programmable Over Current Protection
Over Voltage Protection
Dedicated input for output voltage monitoring
Programmable PGood output
Hiccup Current Limit
Precision Reference Voltage (0.7V, +/-1%)
Programmable Soft-Start
Enable Input with Voltage Monitoring Capability
Enhanced Pre-Bias Start-up
Seq input for Tracking applications
External Synchronization
-40oC to 125oC operating junction temperature
Thermal Protection
4mm x 5mm Power QFN Package
Halogen Free, Lead Free and RoHS compliant
Server Applications
Storage Applications
Embedded Telecom Systems
The IR3859 SupIRBuckTM is an easy-to-use, fully
integrated
and
highly
efficient
DC/DC
synchronous Buck regulator. The MOSFETs copackaged with the on-chip PWM controller make
IR3859 a space-efficient solution, providing
accurate power delivery for low output voltage
applications.
IR3859 is a versatile regulator which offers
programmability of start up time, switching
frequency and current limit while operating in
wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.5MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
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Distributed Point of Load Power Architectures
Netcom Applications
Computing Peripheral Voltage Regulators
General DC-DC Converters
Fig. 1. Typical application diagram
Rev 5.0
1
PD-97514
IR3859MPbF
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND unless otherwise specified)
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Vin ……………………………………………………. -0.3V to 25V
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Vcc ……………….….…………….……..……….…… -0.3V to 8V (Note2)
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Boot
……………………………………..……….…. -0.3V to 33V
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SW
…………………………………………..……… -0.3V to 25V(DC), -4V to 25V(AC, 100ns)
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Boot to SW
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OCSet
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Input / output Pins
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PGND to GND ……………...………………………….. -0.3V to +0.3V
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Storage Temperature Range ................................... -55°C To 150°C
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Junction Temperature Range ................................... -40°C To 150°C (Note2)
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ESD Classification …………………………… ……… JEDEC Class 1C
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Moisture sensitivity level………………...………………JEDEC Level 3@260 °C (Note5)
……..…………………………….…..….. -0.3V to Vcc+0.3V (Note1)
………………………………………….……. -0.3V to 30V (Max 30mA)
……………………………….. ... -0.3V to Vcc+0.3V (Note1)
Note1: Must not exceed 8V
Note2: Vcc must not exceed 7.5V for Junction Temperature between -10oC and -40oC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications are not implied.
PACKAGE INFORMATION
4mm x 5mm POWER QFN
θ JA( Sync _ FET ) = 45 o C / W *
13
12
VIN
SW
11
θ JA( Ctrl _ FET ) = 45 o C / W *
PGnd
θ J -PCB = 2 o C / W
Exposed pads on underside
are connected to copper
pads of a 4-layer (2 oz.) PCB
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Boot
14
Enable
15
Seq
16
1
ORDERING INFORMATION
Rev 5.0
10
17
Gnd
2
3
4
5
Fb Vsns COMP Gnd Rt
6
Vcc
9
Sync
8
PGood
7
SS OCSet
PACKAGE
DESIGNATOR
PACKAGE
DESCRIPTION
PIN COUNT
PARTS PER
REEL
M
IR3859MTRPbF
17
4000
M
IR3859MTR1PbF
17
750
2
PD-97514
IR3859MPbF
Block Diagram
Fig. 2. Simplified block diagram of the IR3859
Rev 5.0
3
PD-97514
IR3859MPbF
Pin Description
Pin
Name
Description
1
Fb
2
Vsns
3
Comp
4;17
Gnd
5
Rt
6
SS/SD
7
OCSet
8
PGood
Power Good status pin. Output is open drain. Connect a pull up resistor
from this pin to Vcc.
9
Sync
Sync pin, connect external system clock to synchronize multiple POLs
with the same frequency
10
V CC
11
PGnd
This pin powers the internal IC and the drivers. A minimum of 1uF high
frequency capacitor must be connected from this pin to the power ground
(PGnd).
Power Ground. This pin serves as a separated ground for the MOSFET
drivers and should be connected to the system’s power ground plane.
12
SW
Switch node. This pin is connected to the output inductor.
13
VIN
Input voltage connection pin.
14
Boot
15
Enable
16
Seq
Rev 5.0
Inverting input to the error amplifier. This pin is connected directly to the
output of the regulator via resistor divider to set the output voltage and
provide feedback to the error amplifier.
Sense pin for PGood
Output of error amplifier. An external resistor and capacitor network is
typically connected from this pin to Fb pin to provide loop compensation.
Signal ground for internal reference and control circuitry.
Set the switching frequency. Connect an external resistor from this pin to
Gnd to set the switching frequency. See Table 1 for Fs vs. Rt.
Soft start / shutdown. This pin provides user programmable soft-start
function. Connect an external capacitor from this pin to Gnd to set the
start up time of the output voltage. The converter can be shutdown by
pulling this pin below 0.3V.
Current limit set point. A resistor from this pin to SW pin will set the
current limit threshold.
Supply voltage for high side driver. A 0.1uF capacitor must be connected
from this pin to SW.
Enable pin to turn on and off the device. Use two external resistors to set
the turn on threshold (see Enable section). Connect this pin to Vcc if it is
not used.
Sequence pin. Use two external resistors to set Simultaneous Power up
sequencing. If this pin is not used connect to Vcc.
4
PD-97514
IR3859MPbF
Recommended Operating Conditions
Symbol
Vin
Vcc
Boot to SW
Vo
Io
Fs
Tj
Definition
Input Voltage
Supply Voltage
Supply Voltage
Output Voltage
Output Current
Switching Frequency
Junction Temperature
Min
Max
1.5
4.5
4.5
0.7
0
225
-40
21*
5.5
5.5
0.9*Vin
9
1650
125
Units
V
A
kHz
o
C
* Note: SW node should not exceed 25V
Electrical Specifications
Unless otherwise specified, these specification apply over 4.5V< Vcc
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