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IRAUDAMP7D

IRAUDAMP7D

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    -

  • 描述:

    IRS2092 - 2-Channel (Stereo) Output Class D Audio Amplifier Evaluation Board

  • 数据手册
  • 价格&库存
IRAUDAMP7D 数据手册
IRAUDAMP7D 25W-500W Scalable Output Power Class D Audio Power Amplifier Reference Design Using the IRS2092 Protected Digital Audio Driver By Jun Honda, Manuel Rodríguez, Wenduo Liu CAUTION: International Rectifier suggests the following guidelines for safe operation and handling of IRAUDAMP7D Demo Board:  Always wear safety glasses whenever operating Demo Board  Avoid personal contact with exposed metal surfaces when operating Demo Board  Turn off Demo Board when placing or removing measurement probes www.irf.com IRAUDAMP7D REV 2.9 Page 1 of 41 Item Table of Contents Page 1 Introduction of scalable design ………………………………………………….. 3 2 Power table values for each power model……………………………………… 4 3 Specifications……………………………………………………………………… 4-5 4 Connection setup…………………………………………………………………. 6 5 Test procedure…………………………………………………………………..… 7 6 Performance and test graphs………………………………………………….… 8-13 7 Clipping characteristics…………………………………………………………… 14 8 Efficiency…………………………………………………………………………… 14-16 9 Thermal considerations……………………………………………...…………… 16 10 PSRR, half bridge, full bridge……………………………………………………. 16 11 Short circuit response…………………………………………………………….. 17-18 12 IRAUDAMP7D Overview……………………………………………………….… 18-19 13 Functions Descriptions…………………………………………………………… 20-22 14 Selectable dead Time…………………………………..………………………… 22 15 Protection Features……………………………………………..………………… 22-25 16 Click and pop noise control………………………………………….…………… 25 17 Bus pumping…………………………………………………….………………… 26 18 Bridged configuration……………………………………….……..……………… 27 19 Input signal and Gain……………………………………….……………………. 28 20 Gain settings………………………………………………………………………. 29 21 Schematics………………………………………………………………………… 30-32 22 Bill of Materials………………………………………………………………..…… 33-36 23 IRAUDAMP7D models differential table………………………………………... 36 24 Hardware…………………………………………………………………………… 37-38 25 PCB specifications………………………………………………………………… 39 26 Assembly Drawings………………………………………………………….…… 40 27 Revision changes descriptions………………………………………………….. 41 www.irf.com IRAUDAMP7D REV 2.9 Page 2 of 41 Introduction The IRAUDAMP7D reference design is a two-channel Class D audio power amplifier that features output power scalability. The IRAUDAMP7D offers selectable half-bridge (stereo) and full-bridge (bridged) modes. This reference design demonstrates how to use the IRS2092 Class D audio driver IC, along with IR’s digital audio dual MOSFETs, such as IRFI4024H-117P, IRFI4019H-117P, IRFI4212H-117P and IRFI4020H-117P, on a single layer PCB. The design shows how to implement peripheral circuits on an optimum PCB layout using a single sided board. The resulting design requires a small heatsink for normal operation (one-eighth of continuous rated power). The reference design provides all the required housekeeping power supplies and protections. Unless otherwise noted, this user’s manual is based on 150V model, IRAUDAMP7D-150,. Other output power versions can be configured by replacing components given in the component selection of Table 5 on page 36 Applications        AV receivers Home theater systems Mini component stereos Powered speakers Sub-woofers Musical Instrument amplifiers Automotive after market amplifiers Features Output Power: Residual Noise: Distortion: Efficiency: Multiple Protection Features: PWM topology: www.irf.com Scalable output power from 25W- 500W (see Table 1) 200 V, IHF-A weighted, AES-17 filter 0.05 % THD+N @ 60W, 4 Ω 90 % @ 500W, 8 Ω, Class D stage Over-current protection (OCP), high side and low side MOSFET Over-voltage protection (OVP), Under-voltage protection (UVP), high side and low side MOSFET DC-protection (DCP), Over-temperature protection (OTP) Self-oscillating PWM, half-bridge or full-bridge topologies selectable IRAUDAMP7D REV 2.9 Page 3 of 41 Table 1 IRAUDAMP7D Specification Table Series Item IR Power FET1A, MOSFET FET1B 8Ω Half Bridge 4Ω Full Bridge 8Ω Nominal +B, -B Supply Voltage Min/Max +B, -B Supply Voltage Voltage Gv Gain AMP7D-55 Model Name AMP7D-100 AMP7D-150 AMP7D-200 IRFI4024H-117P IRFI4212H-117P IRFI4019H-117P IRFI4020H-117P 25W x 2 50W x 2 100W x 1 60W x 2 120W x 2 240W x 1 125W x 2 250W x 2 500W x 1 250W x 2 Not Supported Not Supported ±25V ±35V ±50V ±70V ±20V ~ ±28V ±28V ~ ±45V ±45V ~ ±60V ±60V ~ ±80V 20 30 36 40 Notes:  All the power ratings are at clipping power (THD+N = 1 %). To estimate power ratings at THD+N=10%, multiply them by 1.33  See Table 5 on page 36 for the complete listing of components table. Specifications General Test Conditions for IRAUDAMP7D-150 (unless otherwise noted) Power Supply Voltages ± 50V Load Impedance 4Ω Self-Oscillating Frequency 400kHz Voltage Gain 36 Notes / Conditions Electrical Data Typical Notes / Conditions IRS2092, Protected digital audio driver IRFI4024H-117P, IRFI4019H-117P, IRFI4212H-117P, IRFI4020H117P Digital audio MOSFETs PWM Modulator Self-oscillating, second order sigma-delta modulation, analog input Power Supply Range ± 45V to ± 60V Or see table 1 above Output Power CH1-2: (1 % THD+N) 300W 1kHz Output Power CH1-2: (10 % THD+N) 400W 1kHz Rated Load Impedance 8-4Ω Resistive load Standby Supply Current +50 mA/-80 mA No input signal Total Idle Power Consumption 7W No input signal Channel Efficiency 90 % Single-channel driven, 120W IR Devices Used . www.irf.com IRAUDAMP7D REV 2.9 Page 4 of 41 Audio Performance THD+N, 1W THD+N, 10W THD+N, 60W THD+N, 100W Before Demodulator 0.09 % 0.03 % 0.03 % 0.08 % Class D Output 0.1 % 0.04 % 0.05 % 0.10 % Dynamic Range 100 dB 100 dB Residual Noise 200 V 200 V Damping Factor 2000 95 dB 85 dB 75 dB 170 90 dB 80 dB 65 dB ±3 dB Channel Separation Frequency Response : 20 Hz20kHz 20 Hz-35kHz Notes / Conditions 1kHz, Single-channel driven A-weighted, AES-17 filter, Single-channel operation 22 Hz – 20kHz, AES17 filter Self-oscillating frequency 400kHz 1kHz, relative to 4 Ω load 100Hz 1kHz 10kHz 1W, 4 Ω – 8 Ω Load Thermal Performance (TA=25 C) Condition Idling 2 ch x 15W (1/8 rated power) 2 ch x 120W (Rated power) Typical TC =30 C TPCB=37 C TC =54 C TPCB=67 C TC =80 C TPCB=106 C Notes / Conditions No signal input OTP shutdown after 150 s Physical Specifications Dimensions Weight 6”(L) x 4”(W) x 1.25”(H) 150 mm (L) x 100 mm (W) x 35 mm(H) 0.330kgm Test Setup www.irf.com IRAUDAMP7D REV 2.9 Page 5 of 41 +B, 5A DC supply -B, 5A DC supply 4 Ohm 4 Ohm SPK1A G CNN1 SPK1B LED1 LED1 LED2 S1 LED2 S300 RCA1A RCA1B Audio Signal Fig 1 Typical Test Setup Connector Description CH1 IN CH2 IN SUPPLY CH1 OUT CH2 OUT RCA1A RCA1B CNN1 SPK1A SPK1B Analog input for CH1 Analog input for CH2 Positive and negative supply (+B / -B) Output for CH1 Output for CH2 Switches Descriptions S1 S300 Shutdown PWM Half bridge / Full bridge select Indicator Description LED1A, B LED2A,B www.irf.com PWM (presence of low side gate signal) Protection IRAUDAMP7D REV 2.9 Page 6 of 41 Test Procedures Test Setup: 1. On the unit under test (UUT), set switch S1 to OFF and S300 to Stereo positions. 2. Connect 4 -200 W dummy loads to output connectors, SPKR1A and SPKR1B, as shown on Fig 1. 3. Set up a dual power supply ±50V with 5A current limit 4. Turn OFF the dual power supply before connecting to UUT. 5. Connect the dual power supply to CNN1, as shown in Fig 1. Power up: 6. Turn ON the dual power supply. The ±B supplies must be applied and removed at the same time. 7. The red LEDs (Protections) turn ON immediately and stay on as long as S1 is in OFF position. Blue LEDs stay OFF. 8. Quiescent current for the positive and negative supplies must be less than 50mA, while S1 is in OFF position. Under this condition, IRS2092 is in shutdown mode. 9. Slide S1 to ON position; after one second delay, the two blue LEDs turn ON and the red LEDs turns off. The two blue LEDs indicate that PWM oscillation is present. This transition delay time is controlled by CSD pin of IRS2092, capacitor CP3 10. Under the normal operating condition with no input signal applied, quiescent current for the positive supply must be less than 50 mA; the negative supply current must be less than 100 mA. Switching Frequency Test: 11. With an oscilloscope, monitor switching waveform at test points VS1 of VS2 and L1B of CH2. Self oscillating frequency must be 400kHz  25kHz. Note: The self-oscillating switching frequency is pre-calibrated to 400kHz by the value of R11. To change switching frequency, change the resistances of R11A and R11B for CH1 and CH2 respectively. Audio Functionality Tests: 12. Set the signal generator to 1kHz, 20 mVRMS output. 13. Connect audio signal generators to RCA1A and RCA1B. 14. Sweep the audio signal voltage from 15 mVRMS to 1 VRMS. 15. Monitor the output signals at SPK1A/B with an oscilloscope. Waveform must be a non distorted sinusoidal signal. 16. Observe 1 VRMS input generates output voltage of 36 VRMS. The ratio, R8/(R7+R2), determines the voltage gain of IRAUDAMP7D. 17. Set switch S300 to Bridged position. 18. Observe that voltage gain doubles. www.irf.com IRAUDAMP7D REV 2.9 Page 7 of 41 Test Setup using Audio Precision (Ap): 19. Use unbalance-floating signal generator outputs. 20. Use balanced inputs taken across output terminals, SPKR1A and SPKR1B. 21. Connect Ap frame ground to GND in terminal CNN1. 22. Place AES-17 filter for all the testing except frequency response. 23. Use signal voltage sweep range from 15 mVRMS to 1 VRMS. 24. Run Ap test programs for all subsequent tests as shown in Fig 2- Fig 13 below. Test Results 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 100 W Blue = CH1, Red = CH2 ±B Supply = ±25V, 4 Ω Resistive Load Fig 2 IRAUDAMP7D-55, THD+N versus Power, Stereo, 4 Ω . www.irf.com IRAUDAMP7D REV 2.9 Page 8 of 41 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 100 200 W Blue = CH1, Pink = CH2 ±B Supply = ±35V, 4 Ω Resistive Load Fig 3 IRAUDAMP7D-100, THD+N versus Power, Stereo, 4 Ω . 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 100 200 500 W ±B Supply = ±35V, 8 Ω Resistive Load, Bridged Fig 4 IRAUDAMP7D-100, THD+N versus Power, Bridged, 8 Ω www.irf.com IRAUDAMP7D REV 2.9 Page 9 of 41 . 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 100 200 500 W Blue = CH1, Pink = CH2 ±B Supply = ±50V, 4 Ω Resistive Load Fig 5 IRAUDAMP7D-150, THD+N versus Power, Stereo, 4 Ω . 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 100 200 800 W ±B Supply = ±50V, 8 Ω Resistive Load Fig 6 IRAUDAMP7D-150, THD+N versus Power, Bridged 8 Ω . www.irf.com IRAUDAMP7D REV 2.9 Page 10 of 41 10 5 2 1 0.5 0.2 % 0.1 0.05 0.02 0.01 0.005 0.002 0.001 100m 200m 500m 1 2 5 10 20 50 100 200 500 W Blue = CH1, Red = CH2 ±B Supply = ±70V, 8 Ω Resistive Load Fig 7 IRAUDAMP7D-200, THD+N versus Power, Stereo 8 Ω . +4 +3 +2 +1 -0 -1 d B r A -2 -3 -4 -5 -6 -7 -8 -9 -10 20 50 100 200 500 1k 2k 5k 10k 20k 50k 100k 200k Hz Red Blue CH1 - 4 Ω, 2 V Output referenced CH1 - 8 Ω, 2 V Output referenced Fig 8 Frequency Response (All Models) . www.irf.com IRAUDAMP7D REV 2.9 Page 11 of 41 100 50 10 1 0.5 % 0.1 0.05 0.02 0.01 0.001 0.0001 20 50 100 200 500 1k 2k 5k 10k 20k Hz Blue Pink CH1, 10W Output CH1, 50W Output Fig 9 IRAUDAMP7D-150, THD+N versus Frequency, 4Ω . +0 -10 -20 -30 -40 d B V -50 -60 -70 -80 -90 -100 -110 20 50 100 200 500 1k 2k 5k 10k 20k Hz 1V Output Fig 10 IRAUDAMP7D-150, 1 kHz – 1 V Output Spectrum, Stereo . www.irf.com IRAUDAMP7D REV 2.9 Page 12 of 41 +0 -10 -20 -30 -40 d B V -50 -60 -70 -80 -90 -100 -110 20 50 100 200 500 1k 2k 5k 10k 20k Hz 1V Output Fig 11 IRAUDAMP7D-150, 1 kHz - 1V Output Spectrum, Bridged . +20 +0 -20 -40 d B V -60 -80 -100 -120 -140 10 20 50 100 200 500 1k 2k 5k 10k 20k Hz Red Blue CH1 - ACD, No signal, Self Oscillator @ 400kHz CH2 - ACD, No signal, Self Oscillator @ 400kHz Fig 12 IRAUDAMP7D-150 Noise Floor . www.irf.com IRAUDAMP7D REV 2.9 Page 13 of 41 . Red Trace: Total Distortion + Noise Voltage Gold Trace: Output Voltage 60 W / 4 , 1 kHz, THD+N = 0.02 % 250 W / 4 , 1 kHz, THD+N = 10 % Measured Output and Distortion Waveforms Fig 13 Clipping Characteristics . Efficiency Figs 14-19 show efficiency characteristics of the IRAUDAMP7D. The high efficiency is achieved by following major factors: 1) Low conduction loss due to the dual FETs offering low RDS(ON) 2) Low switching loss due to the dual FETs offering low input capacitance for fast rise and fall times 3) Secure dead-time provided by the IRS2092, avoiding cross-conduction 100% 90% Efficiency (%) 80% 70% 60% 25V-4ohms 50% 40% 30% 20% 10% 0% 0 10 20 30 40 Output power (W) 50 60 ±B Supply = ±25 V Fig 14 Efficiency versus Output Power, IRAUDAMP7D-55, 4 Ω, Stereo www.irf.com IRAUDAMP7D REV 2.9 Page 14 of 41 . 100% 90% Efficiency (%) 80% 70% 60% 35V-4ohms 50% 40% 30% 20% 10% 0% 0 20 40 60 80 100 120 140 160 Output power (W) ±B Supply = ±35 V Fig 15 Efficiency versus Output Power, IRAUDAMP7D-100, 4 Ω, Stereo . 100% 90% Efficiency (%) 80% 70% 60% 50% 35V-8ohms-Full bridge 40% 30% 20% 10% 0% 0 50 100 150 200 Output power (W) 250 300 ±B Supply = ±35V Fig 16 Efficiency versus Output Power, IRAUDAMP7D-100, 8 Ω, Bridged . 90% Efficiency (%) 80% 70% 60% 50V-4ohms 50% 40% 30% 20% 10% 0% 0 50 100 150 200 250 300 Output power (W) ±B Supply = ±50V Fig 17 Efficiency versus Output Power, IRAUDAMP7D-150, 4 Ω, Stereo www.irf.com IRAUDAMP7D REV 2.9 Page 15 of 41 . 100% 90% Efficiency (%) 80% 70% 60% 50% 50V-8ohms-Full bridge 40% 30% 20% 10% 0% 0 50 100 150 200 250 300 350 Output power (W) 400 450 500 550 ±B Supply = ±50V Fig 18 Efficiency versus Output Power, IRAUDAMP7D-150, 8 Ω, Bridged . 100% 90% Efficiency (%) 80% 70% 60% 70V-8ohms 50% 40% 30% 20% 10% 0% 0 50 100 150 200 Output power (W) 250 300 ±B supply = ±70V Fig 19 Efficiency versus Output Power, IRAUDAMP7D-200, 8 Ω, Stereo Thermal Considerations With this high efficiency, the IRAUDAMP7D design can handle one-eighth of the continuous rated power, which is generally considered to be a normal operating condition for safety standards, without additional heatsink or forced air-cooling. Power Supply Rejection Ratio (PSRR) The IRAUDAMP7D obtains good power supply rejection ratio of -65 dB at 1kHz shown in Fig 20. With this high PSRR, IRAUDAMP7D accepts any power supply topology as far as the supply voltages fit in the min and max range. www.irf.com IRAUDAMP7D REV 2.9 Page 16 of 41 Cyan: VAA & VSS are fed by +/-B bus Green: VAA & VSS are fed by external +/-5 V regulated power supplies. Fig 20 IRAUDAMP7D Power Supply Rejection Ratio Short Circuit Protection Response Figs 21-23 show over current protection reaction time of the IRAUDAMP7D in a short circuit event. As soon as the IRS2092 detects over current condition, it shuts down PWM. After one second, the IRS2092 tries to resume the PWM. If the short circuit persists, the IRS2092 repeats try and fail sequences until the short circuit is removed. Short Circuit in Positive and Negative Load Current CSD pin VS pin CSD pin Positive OCP VS pin Load current Load current Negative OCP Fig 21 Positive and Negative OCP Waveforms . www.irf.com IRAUDAMP7D REV 2.9 Page 17 of 41 OCP Waveforms Showing CSD Trip and Hiccup CSD pin CSD pin VS pin VS pin Load current Load current . Fig 22 OCP Response with Continuous Short Circuit . Actual Reaction Time OCP Waveforms Showing actual reaction time . Fig. 23 High and Low Side OCP current waveform reaction time IRAUDAMP7D Overview The IRAUDAMP7D features a self-oscillating type PWM modulator for the lowest component count, highest performance and robust design. This topology represents an analog version of a second-order sigma-delta modulation having a Class D switching stage inside the loop. The www.irf.com IRAUDAMP7D REV 2.9 Page 18 of 41 benefit of the sigma-delta modulation, in comparison to the carrier-signal based modulation, is that all the error in the audible frequency range is shifted to the inaudible upper-frequency range by nature of its operation. Also, sigma-delta modulation allows a designer to apply a sufficient amount of error correction. The IRAUDAMP7D self-oscillating topology consists of following essential functional blocks.  Front-end integrator  PWM comparator  Level shifters  Gate drivers and MOSFETs  Output LPF Integrator Referring to Fig 24 below, the input operational amplifier of the IRS2092 forms a front-end secondorder integrator with R7, C4, C6, and R11. The integrator that receives a rectangular feedback signal from the PWM output via R8 and audio input signal via R7 generates quadratic carrier signal in COMP pin. The analog input signal shifts the average value of the quadratic waveform such that the duty cycle varies according to the instantaneous voltage of the analog input signal. PWM Comparator The carrier signal in COMP pin is converted to PWM signal by an internal comparator that has threshold at middle point between VAA and VSS. The comparator has no hysteresis in its input threshold. Level Shifters The internal input level-shifter transfers the PWM signal down to the low-side gate driver section. The gate driver section has another level-shifter that level shifts up the high-side gate signal to the high-side gate driver section. Gate Drivers and MOSFETs The received PWM signal is sent to the dead-time generation block where a programmable amount of dead time is added into the PWM signal between the two gate output signals of LO and HO to prevent potential cross conduction across the output power MOSFETs. The high-side levelshifter shifts up the high-side gate drive signal out of the dead-time block. The IRS2092 drives two MOSFETs, high- and low-sides, in the power stage providing the amplified PWM waveform. Output LPF www.irf.com IRAUDAMP7D REV 2.9 Page 19 of 41 The amplified PWM output is reconstructed back to analog signal by the output LC LPF. Demodulation LC low-pass filter (LPF) formed by L1 and C12, filters out the Class D switching carrier signal leaving the audio output at the speaker load. A single stage output filter can be used with switching frequencies of 400 kHz and greater; a design with a lower switching frequency may require an additional stage of LPF. . R8 R117 +B CP4 0V IN- . GND Modulator and Shift level + Integrator HO VS VCC LP Filter LO COM -VSS -B CP6 IRS2092 R24 D3 R7 INPUT 0V VB COMP R25 FET1 IRFI4024H-117P IRFI4212H-117P IRFI4019H-117P IRFI4020H-117P 0V L1 C12 . +VCC CP5 R11 0V C6 C7 C4 +B +VAA CP2 -B R118 . Fig 24 Simplified Block Diagram of IRAUDAMP7D Class D Amplifier Functional Descriptions IRS2092 Gate Driver IC The IRAUDAMP7D uses IRS2092, a high-voltage (up to 200 V), high-speed power MOSFET driver with internal dead-time and protection functions specifically designed for Class D audio amplifier applications. These functions include OCP and UVP. The IRS2092 integrates bidirectional over current protection for both high-side and low-side MOSFETs. The dead-time can be selected for optimized performance according to the size of the MOSFET, minimizing deadtime while preventing shoot-through. As a result, there is no gate-timing adjustment required externally. Selectable dead-time through the DT pin voltage is an easy and reliable function which requires only two external resistors, R26 and R27 as shown on Fig 25 below. The IRS2092 offers the following functions.  PWM modulator www.irf.com IRAUDAMP7D REV 2.9 Page 20 of 41     Dead-time insertion Over current protection Under voltage protection Level shifters Refer to IRS2092 datasheet and AN-1138 for more details. R117 3.3k 1w R17 R22 R18 10K U1 16 22uF 2 3 GND VB 1nF R3 1nF C7 100R CP3 HO 20R 14 VS1 4 COMP VS 4 L1 22uH R24 13 5 CSD VCC 6 R13 D3 12 VSS LO 11 20R VREF COM 8 OCSET DT IRS2092S DIP 9 R30 R31 10, 1W 2.2k + CH1 - 2 R25 10 10k R12 8.7k C12 0.47uF, 400V 4.7R SPKR1 1 2 R20 -B 7 CH_OUT 3 10uF CP2 22uF R118 3.3k 1w FET1 15 C6 C4 SD D1 1nF IN- CP8 470uF,100V C13 0.1uF, 400V -B 1 3.3k 0.1uF,100V 22uF R2 10uF C11 10k CP6 270R CP1 RCA1 R11 CSH 5 R8 100k VAA D4 9.6k R19 CP4 1 +B 75k R26 R21 R23 10R 4.7K 10k R27 10k CP5 22uF LED1 Blue C14 0.1uF CP7 470uF,100V VCC -B Fig 25 System-level View of IRAUDAMP7D Self-Oscillating Frequency Self-oscillating frequency is determined by the total delay time along the control loop of the system; the propagation delay of the IRS2092, the MOSFETs switching speed, the time-constant of front-end integrator (R7, R8, R11, C4, C6, C7). Variations in +B and –B supply voltages also affect the self-oscillating frequency. The self-oscillating frequency changes with the duty ratio. The frequency is highest at idling. It drops as duty cycle varies away from 50%. Adjustments of Self-Oscillating Frequency Use R11 to set different self-oscillating frequencies. The PWM switching frequency in this type of self-oscillating switching scheme greatly impacts the audio performance, both in absolute www.irf.com IRAUDAMP7D REV 2.9 Page 21 of 41 frequency and frequency relative to the other channels. In the absolute terms, at higher frequencies distortion due to switching-time becomes significant, while at lower frequencies, the bandwidth of the amplifier suffers. In relative terms, interference between channels is most significant if the relative frequency difference is within the audible range. Normally, when adjusting the self-oscillating frequency of the different channels, it is suggested to either match the frequencies accurately, or have them separated by at least 25kHz. Under the normal operating condition with no audio input signal, the switching-frequency is set around 400kHz in the IRAUDAMP7D. Selectable Dead-time The dead-time of the IRS2092 is set based on the voltage applied to the DT pin. Fig 26 lists the suggested component value for each programmable dead-time between 25 and 105 ns. All the IRAUDAMP7D models use DT2 (45ns) dead-time. Dead-time Mode DT1 DT2 DT3 DT4 R1
IRAUDAMP7D 价格&库存

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