PD - 94969B
IRF1405PbF
Typical Applications
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HEXFET® Power MOSFET
Industrial motor drive
D
VDSS = 55V
Benefits
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Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
RDS(on) = 5.3mΩ
G
ID = 169A
S
Description
D
This Stripe Planar design of HEXFET® Power MOSFETs
utilizes the latest processing techniques to achieve extremely
low on-resistance per silicon area. Additional features of this
HEXFET power MOSFET are a 175°C junction operating
temperature, fast switching speed and improved repetitive
avalanche rating. These benefits combine to make this
design an extremely efficient and reliable device for use in
a wide variety of applications.
G
D
S
TO-220AB
Absolute Maximum Ratings
Max.
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
c
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
d
c
e
i
5.0
-55 to + 175
Parameter
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf in (1.1N m)
y
Thermal Resistance
RθJC
RθCS
RθJA
Units
h
h
169
118
680
330
2.2
± 20
560
See Fig.12a, 12b, 15, 16
y
Typ.
Max.
Units
–––
0.50
–––
0.45
–––
62
°C/W
1
05/12/10
IRF1405PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 101A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 101A
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 20V
VGS = -20V
ID = 101A
VDS = 44V
VGS = 10V
VDD = 38V
ID = 101A
RG = 1.1 Ω
VGS = 10V
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
VGS(th)
gfs
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
IS
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
MOSFET symbol
–––
––– 169
showing the
A
integral reverse
–––
–––
680
p-n junction diode.
TJ = 25°C, IS = 101A, VGS = 0V
–––
–––
1.3
V
T
–––
88
130
ns
J = 25°C, IF = 101A
di/dt
= 100A/µs
–––
250
380
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
Coss eff. is a fixed capacitance that gives the same charging time
55
–––
–––
2.0
69
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
g
–––
0.057
4.6
–––
–––
–––
–––
–––
–––
170
44
62
13
190
130
110
–––
–––
5.3
4.0
–––
20
250
200
-200
260
66
93
–––
–––
–––
–––
–––
4.5
–––
–––
7.5
–––
–––
–––
–––
–––
–––
–––
5480
1210
280
5210
900
1500
–––
–––
–––
–––
–––
–––
V
V/°C
mΩ
V
S
µA
nA
nC
ns
nH
pF
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
ISM
VSD
trr
Qrr
ton
c
f
f
f
D
Between lead,
6mm (0.25in.)
G
from package
S
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
Conditions
h
f
f
Notes:
max. junction temperature. (See fig. 11).
Starting TJ = 25°C, L = 0.11mH
RG = 25Ω, IAS = 101A. (See Figure 12).
ISD ≤ 101A, di/dt ≤ 210A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
as Coss while VDS is rising from 0 to 80% VDSS .
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
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IRF1405PbF
1000
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
100
10
4.5V
20µs PULSE WIDTH
TJ = 25 °C
1
0.1
1
10
4.5V
10
0.1
100
Fig 1. Typical Output Characteristics
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 175 ° C
100
10
V DS = 25V
20µs PULSE WIDTH
6
8
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
4
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
20µs PULSE WIDTH
TJ = 175 ° C
12
ID = 169A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF1405PbF
100000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
10000
Ciss
Coss
1000
Crss
100
1
10
100
VGS , Gate-to-Source Voltage (V)
C, Capacitance(pF)
Coss = Cds + Cgd
20
ID = 101A
VDS = 44V
VDS = 27V
16
12
8
4
VDS, Drain-to-Source Voltage (V)
0
FOR TEST CIRCUIT
SEE FIGURE 13
0
60
120
180
240
300
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
10000
TJ = 175 ° C
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000
1000
100
100
TJ = 25 ° C
10
1
0.0
V GS = 0 V
0.5
1.0
1.5
2.0
2.5
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
OPERATION IN THIS AREA
LIMITED BY R DS(on)
3.0
100µsec
1msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
1
0
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF1405PbF
200
VDS
LIMITED BY PACKAGE
VGS
160
D.U.T.
ID , Drain Current (A)
RG
120
RD
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
80
Fig 10a. Switching Time Test Circuit
40
VDS
90%
0
25
50
75
100
125
150
TC , Case Temperature ( ° C)
175
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.01
t1
t2
0.001
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1405PbF
D.U.T
RG
+
- VDD
IAS
20V
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
ID
41A
71A
BOTTOM 101A
TOP
1000
DRIVER
L
VDS
EAS , Single Pulse Avalanche Energy (mJ)
1200
15V
A
800
600
400
200
0
I AS
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
175
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
10 V
QGS
QGD
4.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
VGS(th) , Variace ( V )
3.5
ID = 250µA
3.0
2.5
2.0
.2µF
.3µF
D.U.T.
+
V
- DS
1.5
-75 -50 -25
VGS
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF1405PbF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
0.01
100
0.05
0.10
10
1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
600
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 101A
500
400
300
200
100
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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175
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT jmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF1405PbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 17. For N-channel HEXFET® power MOSFETs
8
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IRF1405PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
(;$03/(
7+,6,6$1,5)
/27&2'(
,17(51$7,21$/
$66(0%/('21::
,17+($66(0%/
