StrongIRFET™
IRF40B207
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
D
4.5m
95A
TO-220AB
IRF40B207
D
Drain
Standard Pack
Form
Quantity
Tube
50
15
S
Source
Orderable Part Number
IRF40B207
100
ID = 57A
12
80
9
TJ = 125°C
6
3
60
40
20
TJ = 25°C
0
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
max
S
D
G
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m)
TO-220
3.6m
ID
G
Gate
IRF40B207
RDS(on) typ.
S
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free*
RoHS Compliant, Halogen-Free
Package Type
40V
G
Base part number
VDSS
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRF40B207
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
TJ
Operating Junction and
Max.
95
67
380
83
0.56
± 20
-55 to + 175
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics
85
EAS (Thermally limited)
Single Pulse Avalanche Energy
167
EAS (Thermally limited)
Single Pulse Avalanche Energy
IAR
Avalanche Current
See Fig 15, 16, 23a, 23b
Repetitive Avalanche Energy
EAR
Thermal Resistance
Symbol
Parameter
Typ.
Max.
Junction-to-Case
RJC
–––
1.8
Case-to-Sink,
Flat
Greased
Surface
RCS
0.50
–––
Junction-to-Ambient
RJA
–––
62
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Min. Typ. Max.
40
––– –––
––– 0.039 –––
–––
3.6
4.5
–––
5.4
–––
2.2
3.0
3.9
––– –––
1.0
––– ––– 150
––– ––– 100
––– ––– -100
–––
2.0
–––
Units
A
W
W/°C
V
°C
mJ
A
mJ
Units
°C/W
Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 57A
m
VGS = 6.0V, ID = 29A
V
VDS = VGS, ID = 50µA
VDS =40 V, VGS = 0V
µA
VDS =40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.052mH, RG = 50, IAS = 57A, VGS =10V.
ISD 57A, di/dt 860A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 18A, VGS =10V.
2
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IRF40B207
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
170
–––
–––
–––
–––
–––
–––
Typ.
–––
45
12
15
30
7.8
35
td(off)
Turn-Off Delay Time
–––
25
tf
Ciss
Coss
Fall Time
Input Capacitance
Output Capacitance
–––
–––
–––
19
2110
340
Crss
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
220
–––
–––
400
–––
VGS = 0V, VDS = 0V to 32V
–––
498
–––
VGS = 0V, VDS = 0V to 32V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
95
–––
–––
380
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
0.9
1.3
dv/dt
Peak Diode Recovery dv/dt
–––
6.4
–––
trr
Reverse Recovery Time
–––
21
–––
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
22
13
15
1.1
–––
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 10V, ID =57A
68
ID = 57A
VDS = 20V
–––
nC
VGS = 10V
–––
–––
–––
VDD = 20V
–––
ID = 30A
ns
–––
RG= 2.7
VGS = 10V
–––
–––
–––
pF
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
Diode Characteristics
Symbol
IS
ISM
3
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A
V
D
G
S
TJ = 25°C,IS = 57A,VGS = 0V
V/ns TJ = 175°C,IS = 57A,VDS = 40V
ns
TJ = 25°C
VDD = 34V
TJ = 125°C
IF = 57A,
TJ = 25°C di/dt = 100A/µs
nC
TJ = 125°C
A TJ = 25°C
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IRF40B207
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
10
4.5V
1
BOTTOM
4.5V
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.1
1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
100
2.2
R DS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current(A)
10
Fig 4. Typical Output Characteristics
1000
TJ = 175°C
100
10
TJ = 25°C
1
VDS = 10V
60µs PULSE WIDTH
0.1
ID = 57A
VGS = 10V
1.8
1.4
1.0
0.6
2
4
6
8
10
-60
60
100
140
180
14
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
10000
Ciss
1000
20
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
-20
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
1
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Coss
Crss
ID= 57A
12
VDS = 32V
VDS = 20V
VDS= 8V
10
8
6
4
2
0
100
0.1
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
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0
10
20
30
40
50
60
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
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IRF40B207
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
100
TJ = 25°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100µsec
10
1msec
1
10msec
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
VGS = 0V
0.01
0.1
0.0
0.5
1.0
1.5
2.0
0.1
2.5
1
100
VDS , Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.30
50
Id = 1.0mA
48
0.25
46
0.20
Energy (µJ)
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
10
44
0.15
42
0.10
40
0.05
38
0.00
-60
-20
20
60
100
140
-5
180
TJ , Temperature ( °C )
5
10 15 20 25 30 35 40 45
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS (on), Drain-to -Source On Resistance (m)
0
Fig 12. Typical Coss Stored Energy
20
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
15
10
5
0
0
20 40 60 80 100 120 140 160 180 200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRF40B207
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
100
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
100
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 57A
80
60
40
20
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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IRF40B207
7
3.5
IRRM (A)
VGS(th), Gate threshold Voltage (V)
4.5
2.5
ID = 50µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.5
6
IF = 38A
VR = 34V
5
TJ = 25°C
TJ = 125°C
4
3
2
1
0
0.5
-75
-25
25
75
125
0
175
200
600
800
diF /dt (A/µs)
TJ , Temperature ( °C )
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
80
7
6
IF = 57A
VR = 34V
70
IF = 38A
VR = 34V
5
TJ = 25°C
TJ = 125°C
60
TJ = 25°C
TJ = 125°C
QRR (nC)
IRRM (A)
400
4
3
50
40
2
30
1
20
10
0
0
200
400
600
0
800
200
400
600
800
diF /dt (A/µs)
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
80
IF = 57A
VR = 34V
70
TJ = 25°C
TJ = 125°C
QRR (nC)
60
50
40
30
20
10
0
0
200
400
600
800
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
7
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Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
tp
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRF40B207
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAM PLE:
T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789
ASSEM BLED O N W W 19, 2000
IN T H E A S S E M B L Y L IN E "C "
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d - F r e e "
IN T E R N A T IO N A L
R E C T IF IE R
LO G O
ASSEM BLY
LO T C O D E
PART NUM BER
D ATE C O D E
YEA R 0 = 2000
W EEK 19
L IN E C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRF40B207
Qualification Information†
Industrial
(per JEDEC JESD47F) ††
Qualification Level
Moisture Sensitivity Level
TO-220
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
10
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IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
