IRF40DM229

IR MOSFET StrongIRFET™ IRF40DM229 DirectFET™ N-Channel Power MOSFET  Application  Brushed Motor drive applications  BLDC Motor drive applications Battery powered circuits  Half-bridge and full-bridge topologies  Synchronous rectifier applications  Resonant mode power supplies  OR-ing and redundant power switches  DC/DC and AC/DC converters  DC/AC Inverters VDSS 40V RDS(on) typ. 1.4m max 1.85m ID (Silicon Limited)   159A   S Benefits  Improved Gate, Avalanche and Dynamic dv/dt Ruggedness  Fully Characterized Capacitance and Avalanche SOA  Enhanced body diode dv/dt and di/dt Capability  Lead-Free, RoHS Compliant Package Type IRF40DM229 DirectFET™ MF S D S DirectFET™ ISOMETRIC MF Standard Pack Orderable Part Number Form Quantity Tape and Reel 4800 6.0 IRF40DM229 175 ID = 97A 150 5.0 4.0 3.0 2.0 TJ = 125°C 1.0 125 100 75 50 25 TJ = 25°C 0.0 0 4 6 8 10 12 14 16 18 20 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage 1 G ID, Drain Current (A) RDS(on), Drain-to -Source On Resistance (m) Base part number S D 25 50 75 100 125 150 TC , Case Temperature (°C) Fig 2. Maximum Drain Current vs. Case Temperature 2016-3-2 IRF40DM229   Absolute Maximum Ratings Symbol Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) Pulsed Drain Current  IDM PD @TC = 25°C Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage VGS Operating Junction and TJ Storage Temperature Range TSTG   Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy  EAS (Thermally limited) Single Pulse Avalanche Energy  Single Pulse Avalanche Energy Tested Value  EAS (tested) IAR Avalanche Current  EAR Repetitive Avalanche Energy    Thermal Resistance Symbol Parameter Junction-to-Ambient  RJA Junction-to-Ambient  RJA Junction-to-Ambient  RJA Junction-to-Case  RJC Junction-to-PCB Mounted RJ-PCB   Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance RG Notes:  Mounted on minimum footprint full size board with metalized back and with small clip heatsink.  Used double sided cooling , mounting pad with large heatsink.  Surface mounted on 1 in. square Cu board (still air). 2   Max. 159 101 636 83 0.67 ± 20 -55 to + 150     Units A   W W/°C V °C   72 169 195 mJ See Fig.15,16, 23a, 23b A mJ   Typ. ––– 12.5 20 ––– 1.0         Max. 45 ––– ––– 1.5 ––– Units °C/W     Min. Typ. Max. Units Conditions 40 ––– ––– V VGS = 0V, ID = 250µA ––– 32 ––– mV/°C Reference to 25°C, ID = 1.0mA ––– 1.4 1.85 VGS = 10V, ID = 97A  m ––– 3.0 –––  VGS = 6.0V, ID = 49A  2.2 2.8 3.9 V VDS = VGS, ID = 100µA ––– ––– 1.0 VDS = 40V, VGS = 0V µA ––– ––– 150 VDS = 40V, VGS = 0V, TJ = 125°C ––– ––– 100 VGS = 20V nA ––– ––– -100 VGS = -20V ––– 1.0 –––   TC measured with thermocouple mounted to top (Drain) of part.  Mounted to a PCB with small clip heatsink (still air)  Mounted on minimum footprint full size   board with metalized back and with small clip heatsink (still air) 2016-3-2 IRF40DM229             Dynamic @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 87 ––– ––– S VDS = 10V, ID = 97A Qg Total Gate Charge ––– 107 161 ID = 97A Qgs Gate-to-Source Charge ––– 30 ––– VDS =20V nC Qgd Gate-to-Drain ("Miller") Charge ––– 39 ––– VGS = 10V  Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 68 ––– td(on) Turn-On Delay Time ––– 16 ––– VDD = 20V tr Rise Time ––– 66 ––– ID = 30A ns td(off) Turn-Off Delay Time ––– 54 ––– RG = 2.7 tf Fall Time ––– 54 ––– VGS = 10V  Ciss Input Capacitance ––– 5317 ––– VGS = 0V Coss Output Capacitance ––– 866 ––– VDS = 25V Crss Reverse Transfer Capacitance ––– 575 ––– pF ƒ = 1.0MHz Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 1037 ––– VGS = 0V, VDS = 0V to 32V  Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 1237 ––– VGS = 0V, VDS = 0V to 32V  Diode Characteristics Symbol Parameter IS Continuous Source Current (Body Diode) ISM Pulsed Source Current (Body Diode)  Diode Forward Voltage VSD           Min. Typ. Max. Units Conditions MOSFET symbol ––– ––– 83 showing the A integral reverse ––– ––– 636 p-n junction diode. ––– ––– 1.2 V TJ= 25°C,IS = 97A, VGS = 0V dv/dt trr Peak Diode Recovery  Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current ––– ––– ––– ––– ––– ––– D G S 3.2 26 27 24 23 1.2 ––– ––– ––– ––– ––– ––– V/ns TJ =150°C,IS = 97A,VDS = 40V TJ = 25° C VR = 34V ns TJ = 125°C IF = 97A TJ = 25°C di/dt = 100A/µs  nC TJ = 125°C A TJ = 25°C Notes: Repetitive rating; pulse width limited by max. junction temperature.  Limited by TJmax, starting TJ = 25°C, L = 0.015mH RG = 50, IAS = 97A, VGS =10V.  ISD ≤ 97A, di/dt ≤ 862A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C. Pulse width ≤ 400µs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 3  Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.  When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note # AN-994. http://www.irf.com/technical-info/appnotes/an-994.pdf  R is measured at TJ approximately 90°C.  This value determined from sample failure population, starting TJ = 25°C, L= 0.015mH, RG = 50, IAS = 97A, VGS =10V. Limited by TJmax, starting TJ = 25°C, L = 1mH RG = 50, IAS = 18A, VGS =10V. 2016-3-2 IRF40DM229   1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 10 4.5V 100 BOTTOM 4.5V 10 60µs PULSE WIDTH 60µs PULSE WIDTH Tj = 150°C Tj = 25°C 1 1 0.1 1 10 0.1 100 100 2.0 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000 TJ = 150°C 100 TJ = 25°C 10 VDS = 10V 60µs PULSE WIDTH ID = 97A VGS = 10V 1.5 1.0 0.5 0.0 1.0 3 4 5 6 7 8 -60 -40 -20 0 9 Fig 5. Typical Transfer Characteristics 100000 Fig 6. Normalized On-Resistance vs. Temperature 14.0 VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 10000 Ciss Coss Crss 1000 20 40 60 80 100 120 140 160 TJ , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) C, Capacitance (pF) 10 Fig 4. Typical Output Characteristics Fig 3. Typical Output Characteristics ID, Drain-to-Source Current(A) 1 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) ID= 97A 12.0 VDS = 32V VDS = 20V 10.0 VDS= 8.0V 8.0 6.0 4.0 2.0 0.0 100 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 7. Typical Capacitance vs. Drain-to-Source Voltage 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 0 20 40 60 80 100 120 140 QG, Total Gate Charge (nC) Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage 2016-3-2 IRF40DM229   10000 100 ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 TJ = 150°C 10 TJ = 25°C 1 OPERATION IN THIS AREA LIMITED BY R (on) DS 1000 100µsec 100 1msec 10 1 DC Tc = 25°C Tj = 150°C Single Pulse 0.1 VGS = 0V 0.01 0.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0.1 1.0 1 10 100 VDS , Drain-to-Source Voltage (V) VSD , Source-to-Drain Voltage (V) Fig 10. Maximum Safe Operating Area Fig 9. Typical Source-Drain Diode Forward Voltage 0.8 49 Id = 1.0mA 0.7 47 0.6 Energy (µJ) V(BR)DSS, Drain-to-Source Breakdown Voltage (V) 10msec 45 43 0.5 0.4 0.3 0.2 41 0.1 0.0 39 -60 -40 -20 0 -5 20 40 60 80 100 120 140 160 5 10 15 20 25 30 35 40 45 VDS, Drain-to-Source Voltage (V) TJ , Temperature ( °C ) Fig 12. Typical Coss Stored Energy Fig 11. Drain-to-Source Breakdown Voltage RDS (on), Drain-to -Source On Resistance (m ) 0 14 VGS = 5.5V VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = 10V 12 10 8 6 4 2 0 0 25 50 75 100 125 150 175 200 ID, Drain Current (A) Fig 13. Typical On-Resistance vs. Drain Current 5 2016-3-2 IRF40DM229   Thermal Response ( Z thJC ) °C/W 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 0.01 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case Avalanche Current (A) 1000 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 125°C and Tstart =25°C (Single Pulse) 100 10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and Tstart = 125°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Avalanche Current vs. Pulse Width 80 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 97A EAR , Avalanche Energy (mJ) 70 60 50 40 30 20 10 0 25 50 75 100 125 150 Starting TJ , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy vs. Temperature 6 Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1.Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav   2016-3-2 IRF40DM229   10 4.0 IF = 65A VR = 34V 8 TJ = 25°C TJ = 125°C 3.5 3.0 ID ID ID ID 2.5 6 IRRM (A) VGS(th), Gate threshold Voltage (V) 4.5 = 100µA = 250µA = 1.0mA = 1.0A 4 2 2.0 1.5 0 -75 -50 -25 0 25 50 75 100 125 150 100 200 TJ , Temperature ( °C ) 500 600 700 Fig 18. Typical Recovery Current vs. dif/dt 10 200 IF = 97A VR = 34V TJ = 25°C TJ = 125°C 6 QRR (nC) IRRM (A) 400 diF /dt (A/µs) Fig 17. Threshold Voltage vs. Temperature 8 300 4 175 IF = 65A VR = 34V 150 TJ = 25°C TJ = 125°C 125 100 75 2 50 0 25 100 200 300 400 500 600 700 100 200 diF /dt (A/µs) 300 400 500 600 700 diF /dt (A/µs) Fig 20. Typical Stored Charge vs. dif/dt Fig 19. Typical Recovery Current vs. dif/dt 225 200 QRR (nC) 175 150 IF = 97A VR = 34V TJ = 25°C TJ = 125°C 125 100 75 50 25 100 200 300 400 500 600 700 diF /dt (A/µs) Fig 21. Typical Stored Charge vs. dif/dt 7 2016-3-2 IRF40DM229   Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS tp 15V L VDS D.U.T RG IAS 20V tp DRIVER + V - DD A I AS 0.01 Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms Id Vds Vgs VDD  Vgs(th) Qgs1 Qgs2 Fig 25a. Gate Charge Test Circuit 8 Qgd Qgodr Fig 25b. Gate Charge Waveform 2016-3-2 IRF40DM229   DirectFET™ Board Footprint, MF Outline (Medium Size Can, E-Designation) Please see DirectFET™ application note AN-1035 for all details regarding the assembly of DirectFET™. This includes all recommendations for stencil and substrate designs. G = GATE D = DRAIN S = SOURCE D D G S S S D D Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2016-3-2 IRF40DM229   DirectFET™ Outline Dimension, MF Outline (Medium Size Can, E-Designation) Please see DirectFET™ application note AN-1035 for all details regarding the assembly of DirectFET™. This includes all recommendations for stencil and substrate designs. DIMENSIONS METRIC IMPERIAL MIN MAX CODE MIN MAX 0.246 6.25 6.35 0.250 A 0.189 4.80 5.05 0.199 B 0.152 3.85 3.95 0.156 C 0.014 0.35 0.45 0.018 D 0.023 0.58 0.62 0.024 E 0.043 1.08 1.12 0.044 F G 0.93 0.97 0.037 0.038 H 1.28 1.32 0.050 0.052 0.015 J 0.38 0.42 0.017 J1 0.58 0.62 0.023 0.024 K 0.835 0.965 0.033 0.038 2.035 2.165 0.080 0.085 L 0.59 0.70 0.023 0.028 M 0.02 0.08 0.0008 0.003 N 0.08 0.17 0.003 0.007 P Dimensions are shown in millimeters (inches) DirectFET™ Part Marking LOGO GATE MARKING PART NUMBER BATCH NUMBER DATE CODE Line above the last character of the date code indicates "Lead-Free" Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 2016-3-2 IRF40DM229   DirectFET™ Tape & Reel Dimension (Showing component orientation). LOADED TAPE FEED DIRECTION NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. Ordered as IRF40DM229. NOTE: CONTROLLING DIMENSIONS IN MM CODE A B C D E F G H DIMENSIONS IMPERIAL METRIC MIN MAX MIN MAX 0.311 0.319 7.90 8.10 0.154 0.161 3.90 4.10 0.469 0.484 11.90 12.30 0.215 0.219 5.45 5.55 0.201 0.209 5.10 5.30 0.256 0.264 6.50 6.70 0.059 1.50 N.C N.C 0.059 0.063 1.50 1.60 REEL DIMENSIONS STANDARD OPTION (QTY 4800) IMPERIAL METRIC MIN CODE MAX MIN MAX 12.992 A 330.0 N.C N.C B 0.795 20.2 N.C N.C 0.504 C 12.8 0.520 13.2 D 0.059 1.5 N.C N.C E 3.937 100.0 N.C N.C F N.C N.C 0.724 18.4 G 0.488 12.4 0.567 14.4 H 0.469 11.9 0.606 15.4 Note: For the most current drawing please refer to IR website at http://www.irf.com/package/   11 2016-3-2 IRF40DM229   Qualification Information†   Industrial * (per JEDEC JESD47F†† guidelines) Qualification Level   Moisture Sensitivity Level DFET 1.5 RoHS Compliant † †† MSL1 (per JEDEC J-STD-020D††) Yes Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability Applicable version of JEDEC standard at the time of product release. * Industrial qualification standards except autoclave test conditions. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. 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Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 12 2016-3-2