StrongIRFET™
IRF40R207
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
VDSS
40V
RDS(on) typ.
max
4.2m
5.1m
ID (Silicon Limited)
90A
ID (Package Limited)
56A
D
G
S
Benefits
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free
RoHS Compliant, Halogen-Free
D-Pak
IRF40R207
G
Gate
Package Type
IRF40R207
D-Pak
Standard Pack
Form
Quantity
Tape and Reel
2000
16
Orderable Part Number
IRF40R207
Limited by package
ID = 55A
14
80
12
10
T J = 125°C
8
6
4
60
40
20
T J = 25°C
2
0
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
S
Source
100
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
Base part number
D
Drain
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25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRF40R207
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
VGS
Gate-to-Source Voltage
TJ
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Avalanche Characteristics
EAS (Thermally limited)
Single Pulse Avalanche Energy
EAS (Thermally limited)
IAR
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
RG
Units
A
W
W/°C
V
-55 to + 175
°C
300
86
mJ
165
Single Pulse Avalanche Energy
Avalanche Current
EAR
Repetitive Avalanche Energy
Thermal Resistance
Symbol
Parameter
Junction-to-Case
RJC
Junction-to-Ambient (PCB Mounted)
RCS
Junction-to-Ambient
RJA
IGSS
Max.
90
64
56
337*
83
0.56
± 20
See Fig 15, 16, 23a, 23b
Typ.
–––
–––
–––
Min. Typ. Max.
40
––– –––
––– 0.039 –––
–––
4.2
5.1
–––
5.9
–––
2.2
3.0
3.9
––– –––
1.0
––– ––– 150
––– ––– 100
––– ––– -100
–––
2.0
–––
Max.
1.8
50
110
A
mJ
Units
°C/W
Units
Conditions
V
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1.0mA
VGS = 10V, ID = 55A
m
VGS = 6.0V, ID = 28A
V
VDS = VGS, ID = 50µA
VDS =40 V, VGS = 0V
µA
VDS =40V,VGS = 0V,TJ =125°C
VGS = 20V
nA
VGS = -20V
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 56A. Note that current
limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.056mH,RG = 50, IAS = 55A, VGS =10V.
ISD 55A, di/dt 890A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH,RG = 50, IAS = 18A, VGS =10V.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994.: http://www.irf.com/technical-info/appnotes/an-994.pdf
* Pulse drain current is limited at 224A by source bonding technology.
2
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IRF40R207
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
Rise Time
Min.
170
–––
–––
–––
–––
–––
–––
Typ.
–––
45
12
15
30
7.8
35
td(off)
Turn-Off Delay Time
–––
25
tf
Ciss
Coss
Fall Time
Input Capacitance
Output Capacitance
–––
–––
–––
19
2110
340
Crss
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
220
–––
–––
400
–––
VGS = 0V, VDS = 0V to 32V
–––
498
–––
VGS = 0V, VDS = 0V to 32V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ.
Max. Units
–––
–––
90
–––
–––
337*
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
0.9
1.3
dv/dt
Peak Diode Recovery dv/dt
–––
6.4
–––
trr
Reverse Recovery Time
–––
21
–––
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
22
13
15
1.1
–––
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 10V, ID = 55A
68
ID = 55A
–––
VDS = 20V
nC
–––
VGS = 10V
–––
–––
VDD = 20V
–––
ID = 30A
ns
–––
RG= 2.7
VGS = 10V
–––
–––
–––
VGS = 0V
VDS = 25V
pF ƒ = 1.0MHz, See Fig.7
Diode Characteristics
Symbol
IS
ISM
3
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A
V
D
G
S
TJ = 25°C,IS = 55A,VGS = 0V
V/ns TJ = 175°C,IS = 55A,VDS = 40V
ns
TJ = 25°C
VDD = 34V
TJ = 125°C
IF = 55A,
TJ = 25°C di/dt = 100A/µs
nC
TJ = 125°C
A TJ = 25°C
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IRF40R207
1000
1000
100
BOTTOM
100
10
4.5V
BOTTOM
4.5V
10
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
2.2
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
1000
100
T J = 175°C
10
T J = 25°C
1
VDS = 10V
60µs PULSE WIDTH
0.1
2
4
6
8
ID = 55A
VGS = 10V
1.8
1.4
1.0
0.6
10
-60
Fig 5. Typical Transfer Characteristics
100000
20
60
100
140
180
Fig 6. Normalized On-Resistance vs. Temperature
14
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
10000
Ciss
1000
-20
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Coss
Crss
100
ID= 55A
12
VDS= 32V
VDS= 20V
10
VDS= 8V
8
6
4
2
0
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
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0
10
20
30
40
50
60
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Drain-to-Source Voltage
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IRF40R207
IRF40R207
1000
T J = 175°C
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
T J = 25°C
10
1
OPERATION IN THIS AREA LIMITED BY RDS(on)
100µsec
100
1msec
LIMITED BY PACKAGE
10
1
10msec
VGS = 0V
0.1
0.01
0.0
0.5
1.0
1.5
2.0
0.1
1
VSD, Source-to-Drain Voltage (V)
10
100
VDS, Drain-to-Source Voltage (V)
Fig 9. Typical Source-Drain Diode Forward Voltage
Fig 10. Maximum Safe Operating Area
0.3
50
Id = 1.0mA
48
0.3
46
0.2
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
44
0.2
42
0.1
40
0.1
0.0
38
-60
-20
20
60
100
140
-5
180
T J , Temperature ( °C )
5
10
15
20
25
30
35
40
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m )
0
Fig 12. Typical Coss Stored Energy
20
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
16
12
8
4
0
0
20 40 60 80 100 120 140 160 180 200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRF40R207
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
100
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
100
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 55A
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves, Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figures 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figure 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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8
IF = 37A
V R = 34V
TJ = 25°C
7
3.5
6
IRRM (A)
VGS(th) , Gate threshold Voltage (V)
4.5
2.5
ID = 50µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
1.5
TJ = 125°C
5
4
3
2
1
0.5
0
-75
-25
25
75
125
175
0
200
T J , Temperature ( °C )
600
800
diF /dt (A/µs)
Fig 18. Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
120
8
IF = 55A
V R = 34V
7
100
TJ = 25°C
TJ = 125°C
90
80
QRR (nC)
5
IF = 37A
V R = 34V
110
TJ = 25°C
TJ = 125°C
6
IRRM (A)
400
4
3
70
60
50
40
30
2
20
1
10
0
0
0
200
400
600
0
800
200
400
600
800
diF /dt (A/µs)
diF /dt (A/µs)
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
120
90
IF = 55A
V R = 34V
TJ = 25°C
80
TJ = 125°C
110
QRR (nC)
100
70
60
50
40
30
20
10
0
0
200
400
600
800
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
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Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
L
VDS
D.U.T
RG
IAS
20V
tp
DRIVER
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRF40R207
D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
LOT CODE 1234
ASSEMBLED ON WW 16, 2001
IN THE ASSEMBLY LINE "A"
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line position
indicates "Lead-Free"
IRFR120
12
116A
34
ASSEMBLY
LOT CODE
DATE CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in assembly line position indicates
"Lead-Free" qualification to the consumer-level
OR
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
IRFR120
12
ASSEMBLY
LOT CODE
34
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
P = DESIGNATES LEAD-FREE
PRODUCT QUALIFIED TO THE
CONSUMER LEVEL (OPTIONAL)
YEAR 1 = 2001
WEEK 16
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRF40R207
Qualification Information†
Industrial
Qualification Level
(per JEDEC JESD47F††)
Moisture Sensitivity Level
MSL1
D-Pak
(per JEDEC J-STD-20D††)
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
For further information on the product, technology,
delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(www.infineon.com).
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
