IRF40SC240ARMA1

IRF40SC240 MOSFET StrongIRFETª D²-PAK7pin Features •VerylowRDS(on) •Highcurrentcarryingcapability •175°Coperatingtemperature •Optimizedforbroadestavailabilityfromdistributionpartners Benefits •Reducedconductionlosses •Increasedpowerdensity •Increasedreliabilityversus150°Cratedparts •Halogen-freeaccordingtoIEC61249-2-21 Drain tab Productvalidation QualifiedaccordingtoJEDECStandard Gate Pin 1 Source Pin 2-7 Table1KeyPerformanceParameters Parameter Value Unit VDS 40 V RDS(on),typ 0.5 mΩ RDS(on),max 0.65 mΩ ID(SiliconLimited) 564 A ID(PackageLimited) 360 A QG(0V..10V) 366 nC Type/OrderingCode Package IRF40SC240 PG-TO263-7 Final Data Sheet Marking IRF40SC240 1 RelatedLinks - Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Values Unit Note/TestCondition 360 564 379 A VGS=10V,TC=25°C VGS=10V,TC=25°C(siliconlimited) VGS=10V,TC=100°C(silicon limited)1) - 1440 A TC=25°C - - 1331 mJ ID=100A,RGS=50Ω VGS -20 - 20 V - Power dissipation Ptot - - 417 2.4 W TC=25°C TA=25°C,RTHJA=62°C/W3) Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - ID,pulse - Avalanche energy, single pulse EAS Gate source voltage Continuous drain current Pulsed drain current1) 2) 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, 04) Values Min. Typ. Max. RthJC - - 0.36 °C/W - Thermal resistance, junction -Ambient, RthJA 0 - - 62 °C/W - RthCS - 0.5 - °C/W - Case-to-Sink, Flat Greased Surface 1) See Diagram 3 for more detailed information See Diagram 13 for more detailed information 3) When mounted on 1″ square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994: 4) RthJC is measured at TJ approximately 90°C. 2) Final Data Sheet 3 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage V(BR)DSS Breakdown voltage temperature coefficient Values Unit Note/TestCondition - V VGS=0V,ID=250uA 36 - mV/°C ID=5mA,referencedto25°C 2.2 - 3.7 V VDS=VGS,ID=250µA IDSS - - 1 150 µA VDS=40V,VGS=0V,Tj=25°C VDS=40V,VGS=0V,Tj=125°C Gate-source leakage current IGSS - - 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 0.5 0.7 0.65 - mΩ VGS=10V,ID=100A VGS=6V,ID=50A Gate resistance1) RG - 2.2 - Ω - Transconductance gfs - 320 - S |VDS|≥2|ID|RDS(on)max,ID=100A Unit Note/TestCondition Min. Typ. Max. 40 - dV(BR)DSS/dTj - Gate threshold voltage VGS(th) Zero gate voltage drain current Table5Dynamiccharacteristics Parameter Symbol Values Min. Typ. Ciss - 18000 - pF VGS=0V,VDS=20V,f=1MHz Coss - 2900 - pF VGS=0V,VDS=20V,f=1MHz Reverse transfer capacitance Crss - 2000 - pF VGS=0V,VDS=20V,f=1MHz Turn-on delay time td(on) - 23 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=2.7Ω Rise time tr - 75 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=2.7Ω Turn-off delay time td(off) - 197 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=2.7Ω Fall time tf - 114 - ns VDD=20V,VGS=10V,ID=30A, RG,ext=2.7Ω Input capacitance1) 1) Output capacitance 1) 1) Max. Defined by design. Not subject to production test. Final Data Sheet 4 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 Table6Gatechargecharacteristics1) Parameter Symbol Gate to source charge Values Unit Note/TestCondition - nC VDD=20V,ID=100A,VGS=0to10V 54 - nC VDD=20V,ID=100A,VGS=0to10V - 121 - nC VDD=20V,ID=100A,VGS=0to10V Qsw - 152 - nC VDD=20V,ID=100A,VGS=0to10V Gate charge total Qg - 366 458 nC VDD=20V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.8 - V VDD=20V,ID=100A,VGS=0to10V Gate charge total, sync. FET Qg(sync) - 245 - nC VDS=0.1V,VGS=0to10V Output charge1) Qoss - 101 - nC VDD=20V,VGS=0V Unit Note/TestCondition Min. Typ. Max. Qgs - 85 Gate charge at threshold Qg(th) - Gate to drain charge2) Qgd Switching charge 2) Table7Reversediode Parameter Symbol Diode continuous forward current Values Min. Typ. Max. IS - - 347 A TC=25°C Diode pulse current IS,pulse - - 1440 A TC=25°C Diode forward voltage VSD - - 1.2 V VGS=0V,IF=100A,Tj=25°C trr - 53 - ns VR=34V,IF=100A,diF/dt=100A/µs Qrr - 79 - nC VR=34V,IF=100A,diF/dt=100A/µs Reverse recovery time2) 2) Reverse recovery charge 1) 2) See ″Gate charge waveforms″ for parameter definition Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 450 640 package limit silicon limit 400 560 350 480 300 250 ID[A] Ptot[W] 400 200 320 240 150 160 100 80 50 0 0 25 50 75 100 125 150 0 175 0 25 50 75 TC[°C] 100 125 150 175 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 4 10 101 10 µs 103 100 µs single pulse 0.01 0.02 0.05 0.1 0.2 0.5 100 102 ZthJC[K/W] ID[A] 1 ms DC 1 10 10-1 10 ms 10-2 100 10-1 10-1 100 101 102 10-3 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 1440 5.0 4.5 V 5V 5.5 V 6V 8V 10 V 15 V 1260 1080 4.0 5.5 V RDS(on)[mΩ] ID[A] 900 720 540 3.0 5V 2.0 6V 360 1.0 7V 180 0 10 V 0 1 2 3 4 0.0 5 0 180 360 540 VDS[V] 720 900 1080 1260 1440 16 18 20 ID[A] ID=f(VDS),Tj=25°C;parameter:VGS RDS(on)=f(ID),Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.drain-sourceonresistance 1440 3.0 1260 2.5 1080 2.0 RDS(on)[mΩ] ID[A] 900 720 540 1.5 1.0 125 °C 360 175 °C 0.5 180 25 °C 25 °C 0 2 3 4 5 6 7 8 VGS[V] 4 6 8 10 12 14 VGS[V] ID=f(VGS),|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 0.0 RDS(on)=f(VGS),ID=100A;parameter:Tj 7 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 Diagram10:Typ.gatethresholdvoltage 2.2 4.0 1.8 3.0 2500 µA VGS(th)[V] RDS(on)(normalizedto25°C) Diagram9:Normalizeddrain-sourceonresistance 1.4 1.0 2.0 250 µA 1.0 0.6 -60 -20 20 60 100 140 0.0 -75 180 -25 25 Tj[°C] 75 125 175 Tj[°C] RDS(on)=f(Tj),ID=100A,VGS=10V VGS(th=f(Tj),VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 103 10 25 °C 175 °C 102 IF[A] C[pF] Ciss 104 101 100 Coss Crss 103 0 5 10 15 20 25 30 35 40 10-1 0.0 0.2 VDS[V] 0.6 0.8 1.0 1.2 1.4 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 0.4 IF=f(VSD);parameter:Tj 8 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 14 103 8V 20 V 32 V 12 10 102 VGS[V] IAV[A] 8 25 °C 100 °C 101 6 4 150 °C 2 100 10-1 100 101 102 103 104 tAV[µs] 0 0 50 100 150 200 250 300 350 400 450 500 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj,start VGS=f(Qgate),ID=100Apulsed,Tj=25°C;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 46 44 VBR(DSS)[V] 42 40 38 36 -75 -25 25 75 125 175 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 5PackageOutlines Figure1OutlinePG-TO263-7,dimensionsinmm/inches Final Data Sheet 10 Rev.2.2,2020-08-10 StrongIRFETª IRF40SC240 RevisionHistory IRF40SC240 Revision:2020-08-10,Rev.2.2 Previous Revision Revision Date Subjects (major changes since last revision) 1.0 2018-11-29 Release of preliminary version 2.0 2018-12-04 Release of final version 2019-05-08 Removed "Qualified according to JEDEC standard" from the features section since it’s redundant-page1 2020-08-10 Removed IR MOSFET, should only be StrongIRFET in the header. Update the package picture to the picture with StrongIRFET TM 2.1 2.2 Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2020InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.2,2020-08-10