IRF7807D1

PD- 93761 IRF7807D1 FETKY™ MOSFET / SCHOTTKY DIODE • Co-Pack N-channel HEXFET Power MOSFET and Schottky Diode • Ideal for Synchronous Rectifiers in DC-DC Converters Up to 5A Output • Low Conduction Losses • Low Switching Losses • Low Vf Schottky Rectifier 1 8 K/D A/S 2 7 K/D A/S 3 6 K/D G 4 5 K/D D A/S SO-8 Description The FETKY™ family of Co-Pack HEXFETMOSFETs and Schottky diodes offers the designer an innovative, board space saving solution for switching regulator and power management applications. HEXFET power MOSFETs utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. Combining this technology with International Rectifier’s low forward drop Schottky rectifiers results in an extremely efficient device suitable for use in a wide variety of portable electronics applications. Top View Device Features (Max Values) IRF7807D1 VDS RDS(on) Qg Qsw Qoss 30V 25mΩ 14nC 5.2nC 18.4nC The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics. The SO8 package is designed for vapor phase, infrared or wave soldering techniques. Absolute Maximum Ratings Parameter Symbol Max. Drain-Source Voltage VDS 30 Gate-Source Voltage VGS ±12 ID 8.3 Continuous Drain or Source 25°C Current (VGS ≥ 4.5V) 70°C Pulsed Drain Current Power Dissipation 25°C 6.6 IDM 66 PD 2.5 70°C Schottky and Body Diode 25°C Average ForwardCurrent„ 70°C Junction & Storage Temperature Range Thermal Resistance Parameter Maximum Junction-to-Ambientƒ www.irf.com 1.6 Units V A W IF (AV) 3.5 A TJ, TSTG –55 to 150 °C RθJA Max. 50 Units °C/W 2.2 1 11/8/99 IRF7807D1 Electrical Characteristics Parameter Min Drain-to-Source Breakdown Voltage* V(BR)DSS Static Drain-Source on Resistance* RDS(on) Typ Max 30 17 Gate Threshold Voltage* VGS(th) 25 1.0 Units Conditions V VGS = 0V, ID = 250µA mΩ VGS = 4.5V, ID = 7A‚ V VDS = VGS,ID = 250µA Drain-Source Leakage Current* IDSS 90 7.2 µA mA VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, Tj = 125°C Gate-Source Leakage Current* Total Gate Charge Synch FET* Total Gate Charge Control FET* Pre-Vth Gate-Source Charge Post-Vth Gate-Source Charge Gate to Drain Charge Switch Charge* (Qgs2 + Qgd) IGSS +/- 100 nA VGS = +/-12V Qgsync 10.5 14 Qgcont 12 17 Qgs1 2.1 Qgs2 0.76 Qgd QSW 2.9 3.66 5.2 Output Charge* Qoss 15.3 18.4 Gate Resistance Rg 1.2 VDS